* [PATCH 2/5] drm/i915: clean up virtual PCH special case handling
2018-05-31 5:55 [PATCH 1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems Jani Nikula
@ 2018-05-31 5:55 ` Jani Nikula
2018-05-31 5:55 ` [PATCH 3/5] drm/i915: be more strict about HAS_PCH_NOP() usage Jani Nikula
` (4 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2018-05-31 5:55 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Use intel_pch_type() also for mapping the no PCH case (PCH id 0) to
PCH_NONE to simplify code.
Also make sure that intel_pch_type() knows all the PCH ids returned by
intel_virt_detect_pch(). Loudly fail if this isn't the case; this
shouldn't happen anyway.
Cc: Colin Xu <Colin.Xu@intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/i915_drv.c | 13 ++++++-------
1 file changed, 6 insertions(+), 7 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index c42e389a27f3..1842a067a604 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -282,13 +282,12 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
} else if (intel_is_virt_pch(id, pch->subsystem_vendor,
pch->subsystem_device)) {
id = intel_virt_detect_pch(dev_priv);
- if (id) {
- pch_type = intel_pch_type(dev_priv, id);
- if (WARN_ON(pch_type == PCH_NONE))
- pch_type = PCH_NOP;
- } else {
- pch_type = PCH_NONE;
- }
+ pch_type = intel_pch_type(dev_priv, id);
+
+ /* Sanity check virtual PCH id */
+ if (WARN_ON(id && pch_type == PCH_NONE))
+ id = 0;
+
dev_priv->pch_type = pch_type;
dev_priv->pch_id = id;
break;
--
2.11.0
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 3/5] drm/i915: be more strict about HAS_PCH_NOP() usage
2018-05-31 5:55 [PATCH 1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems Jani Nikula
2018-05-31 5:55 ` [PATCH 2/5] drm/i915: clean up virtual PCH special case handling Jani Nikula
@ 2018-05-31 5:55 ` Jani Nikula
2018-05-31 5:55 ` [PATCH 4/5] drm/i915/gem: " Jani Nikula
` (3 subsequent siblings)
5 siblings, 0 replies; 10+ messages in thread
From: Jani Nikula @ 2018-05-31 5:55 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
HAS_PCH_NOP() implies a PCH platform without south display, not generic
disabled display. Prefer num_pipes == 0 for PCH independent checks.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
drivers/gpu/drm/i915/intel_bios.c | 2 +-
drivers/gpu/drm/i915/intel_i2c.c | 2 +-
2 files changed, 2 insertions(+), 2 deletions(-)
diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
index 1cf073b6ac8a..94428633a9d3 100644
--- a/drivers/gpu/drm/i915/intel_bios.c
+++ b/drivers/gpu/drm/i915/intel_bios.c
@@ -1700,7 +1700,7 @@ void intel_bios_init(struct drm_i915_private *dev_priv)
const struct bdb_header *bdb;
u8 __iomem *bios = NULL;
- if (HAS_PCH_NOP(dev_priv)) {
+ if (INTEL_INFO(dev_priv)->num_pipes == 0) {
DRM_DEBUG_KMS("Skipping VBT init due to disabled display.\n");
return;
}
diff --git a/drivers/gpu/drm/i915/intel_i2c.c b/drivers/gpu/drm/i915/intel_i2c.c
index e6875509bcd9..61729bf84e08 100644
--- a/drivers/gpu/drm/i915/intel_i2c.c
+++ b/drivers/gpu/drm/i915/intel_i2c.c
@@ -771,7 +771,7 @@ int intel_setup_gmbus(struct drm_i915_private *dev_priv)
unsigned int pin;
int ret;
- if (HAS_PCH_NOP(dev_priv))
+ if (INTEL_INFO(dev_priv)->num_pipes == 0)
return 0;
if (IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv))
--
2.11.0
_______________________________________________
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^ permalink raw reply related [flat|nested] 10+ messages in thread* [PATCH 4/5] drm/i915/gem: be more strict about HAS_PCH_NOP() usage
2018-05-31 5:55 [PATCH 1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems Jani Nikula
2018-05-31 5:55 ` [PATCH 2/5] drm/i915: clean up virtual PCH special case handling Jani Nikula
2018-05-31 5:55 ` [PATCH 3/5] drm/i915: be more strict about HAS_PCH_NOP() usage Jani Nikula
@ 2018-05-31 5:55 ` Jani Nikula
2018-05-31 11:35 ` Ville Syrjälä
2018-05-31 5:55 ` [PATCH 5/5] drm/i915: fix PCH_NOP setting for non-PCH platforms Jani Nikula
` (2 subsequent siblings)
5 siblings, 1 reply; 10+ messages in thread
From: Jani Nikula @ 2018-05-31 5:55 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
HAS_PCH_NOP() implies a PCH platform without south display, not generic
disabled display. Prefer num_pipes == 0 for PCH independent checks.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
I'm actually not sure about this. What should VLV, CHV, BXT and GLK do
in this branch if display gets disabled? See next patch.
---
drivers/gpu/drm/i915/i915_gem.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
index 530d6d0109b4..d6be1a08848d 100644
--- a/drivers/gpu/drm/i915/i915_gem.c
+++ b/drivers/gpu/drm/i915/i915_gem.c
@@ -5137,7 +5137,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev_priv) ?
LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
- if (HAS_PCH_NOP(dev_priv)) {
+ if (INTEL_INFO(dev_priv)->num_pipes == 0) {
if (IS_IVYBRIDGE(dev_priv)) {
u32 temp = I915_READ(GEN7_MSG_CTL);
temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK);
--
2.11.0
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 4/5] drm/i915/gem: be more strict about HAS_PCH_NOP() usage
2018-05-31 5:55 ` [PATCH 4/5] drm/i915/gem: " Jani Nikula
@ 2018-05-31 11:35 ` Ville Syrjälä
0 siblings, 0 replies; 10+ messages in thread
From: Ville Syrjälä @ 2018-05-31 11:35 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Thu, May 31, 2018 at 08:55:23AM +0300, Jani Nikula wrote:
> HAS_PCH_NOP() implies a PCH platform without south display, not generic
> disabled display. Prefer num_pipes == 0 for PCH independent checks.
>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Chris Wilson <chris@chris-wilson.co.uk>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
>
> ---
>
> I'm actually not sure about this. What should VLV, CHV, BXT and GLK do
> in this branch if display gets disabled? See next patch.
> ---
> drivers/gpu/drm/i915/i915_gem.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_gem.c b/drivers/gpu/drm/i915/i915_gem.c
> index 530d6d0109b4..d6be1a08848d 100644
> --- a/drivers/gpu/drm/i915/i915_gem.c
> +++ b/drivers/gpu/drm/i915/i915_gem.c
> @@ -5137,7 +5137,7 @@ int i915_gem_init_hw(struct drm_i915_private *dev_priv)
> I915_WRITE(MI_PREDICATE_RESULT_2, IS_HSW_GT3(dev_priv) ?
> LOWER_SLICE_ENABLED : LOWER_SLICE_DISABLED);
>
> - if (HAS_PCH_NOP(dev_priv)) {
> + if (INTEL_INFO(dev_priv)->num_pipes == 0) {
So we're specifically trying to disable the PCH display reset handshake.
That would only seem applicaple for platforms with a PCH. So PCH_NOP
seems like the correct thing to check here.
However since we're just clearing the bits I think it should actually
be safe to do this on non-PCH platforms as well. But with the current
code I think we'd end up poking at the wrong register on VLV. It should
probably use the IVB register instead of the HSW+ register.
> if (IS_IVYBRIDGE(dev_priv)) {
> u32 temp = I915_READ(GEN7_MSG_CTL);
> temp &= ~(WAIT_FOR_PCH_FLR_ACK | WAIT_FOR_PCH_RESET_ACK);
> --
> 2.11.0
--
Ville Syrjälä
Intel
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* [PATCH 5/5] drm/i915: fix PCH_NOP setting for non-PCH platforms
2018-05-31 5:55 [PATCH 1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems Jani Nikula
` (2 preceding siblings ...)
2018-05-31 5:55 ` [PATCH 4/5] drm/i915/gem: " Jani Nikula
@ 2018-05-31 5:55 ` Jani Nikula
2018-05-31 11:39 ` Ville Syrjälä
2018-05-31 6:26 ` ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems Patchwork
2018-05-31 7:17 ` ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 1 reply; 10+ messages in thread
From: Jani Nikula @ 2018-05-31 5:55 UTC (permalink / raw)
To: intel-gfx; +Cc: jani.nikula
Setting PCH type to PCH_NOP before checking whether we actually have a
PCH ends up returning true for HAS_PCH_SPLIT() on all non-PCH split
platforms. Fix this by using PCH_NOP only for platforms that actually
have a PCH.
Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
Signed-off-by: Jani Nikula <jani.nikula@intel.com>
---
Should we log this with "Found No Point PCH"? ;)
---
drivers/gpu/drm/i915/i915_drv.c | 19 +++++++++++--------
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
index 1842a067a604..5deee698881b 100644
--- a/drivers/gpu/drm/i915/i915_drv.c
+++ b/drivers/gpu/drm/i915/i915_drv.c
@@ -246,14 +246,6 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
{
struct pci_dev *pch = NULL;
- /* In all current cases, num_pipes is equivalent to the PCH_NOP setting
- * (which really amounts to a PCH but no South Display).
- */
- if (INTEL_INFO(dev_priv)->num_pipes == 0) {
- dev_priv->pch_type = PCH_NOP;
- return;
- }
-
/*
* The reason to probe ISA bridge instead of Dev31:Fun0 is to
* make graphics device passthrough work easy for VMM, that only
@@ -293,6 +285,17 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
break;
}
}
+
+ /*
+ * Use PCH_NOP (PCH but no South Display) for PCH platforms without
+ * display.
+ */
+ if (pch && INTEL_INFO(dev_priv)->num_pipes == 0) {
+ DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
+ dev_priv->pch_type = PCH_NOP;
+ dev_priv->pch_id = 0;
+ }
+
if (!pch)
DRM_DEBUG_KMS("No PCH found.\n");
--
2.11.0
_______________________________________________
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Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply related [flat|nested] 10+ messages in thread* Re: [PATCH 5/5] drm/i915: fix PCH_NOP setting for non-PCH platforms
2018-05-31 5:55 ` [PATCH 5/5] drm/i915: fix PCH_NOP setting for non-PCH platforms Jani Nikula
@ 2018-05-31 11:39 ` Ville Syrjälä
0 siblings, 0 replies; 10+ messages in thread
From: Ville Syrjälä @ 2018-05-31 11:39 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
On Thu, May 31, 2018 at 08:55:24AM +0300, Jani Nikula wrote:
> Setting PCH type to PCH_NOP before checking whether we actually have a
> PCH ends up returning true for HAS_PCH_SPLIT() on all non-PCH split
> platforms. Fix this by using PCH_NOP only for platforms that actually
> have a PCH.
>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Signed-off-by: Jani Nikula <jani.nikula@intel.com>
Apart from patch 4 the series looks good to me.
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
>
> ---
>
> Should we log this with "Found No Point PCH"? ;)
> ---
> drivers/gpu/drm/i915/i915_drv.c | 19 +++++++++++--------
> 1 file changed, 11 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_drv.c b/drivers/gpu/drm/i915/i915_drv.c
> index 1842a067a604..5deee698881b 100644
> --- a/drivers/gpu/drm/i915/i915_drv.c
> +++ b/drivers/gpu/drm/i915/i915_drv.c
> @@ -246,14 +246,6 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
> {
> struct pci_dev *pch = NULL;
>
> - /* In all current cases, num_pipes is equivalent to the PCH_NOP setting
> - * (which really amounts to a PCH but no South Display).
> - */
> - if (INTEL_INFO(dev_priv)->num_pipes == 0) {
> - dev_priv->pch_type = PCH_NOP;
> - return;
> - }
> -
> /*
> * The reason to probe ISA bridge instead of Dev31:Fun0 is to
> * make graphics device passthrough work easy for VMM, that only
> @@ -293,6 +285,17 @@ static void intel_detect_pch(struct drm_i915_private *dev_priv)
> break;
> }
> }
> +
> + /*
> + * Use PCH_NOP (PCH but no South Display) for PCH platforms without
> + * display.
> + */
> + if (pch && INTEL_INFO(dev_priv)->num_pipes == 0) {
> + DRM_DEBUG_KMS("Display disabled, reverting to NOP PCH\n");
> + dev_priv->pch_type = PCH_NOP;
> + dev_priv->pch_id = 0;
> + }
> +
> if (!pch)
> DRM_DEBUG_KMS("No PCH found.\n");
>
> --
> 2.11.0
--
Ville Syrjälä
Intel
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread
* ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems
2018-05-31 5:55 [PATCH 1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems Jani Nikula
` (3 preceding siblings ...)
2018-05-31 5:55 ` [PATCH 5/5] drm/i915: fix PCH_NOP setting for non-PCH platforms Jani Nikula
@ 2018-05-31 6:26 ` Patchwork
2018-05-31 7:17 ` ✗ Fi.CI.IGT: failure " Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2018-05-31 6:26 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems
URL : https://patchwork.freedesktop.org/series/43986/
State : success
== Summary ==
= CI Bug Log - changes from CI_DRM_4261 -> Patchwork_9153 =
== Summary - SUCCESS ==
No regressions found.
External URL: https://patchwork.freedesktop.org/api/1.0/series/43986/revisions/1/mbox/
== Known issues ==
Here are the changes found in Patchwork_9153 that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@gem_exec_nop@basic-series:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#105719)
igt@gem_mmap_gtt@basic-small-bo-tiledx:
fi-gdg-551: PASS -> FAIL (fdo#102575)
igt@kms_flip@basic-flip-vs-modeset:
fi-glk-j4005: PASS -> DMESG-WARN (fdo#106000)
==== Possible fixes ====
igt@gem_exec_suspend@basic-s3:
fi-glk-j4005: DMESG-WARN (fdo#106097) -> PASS
igt@kms_flip@basic-flip-vs-wf_vblank:
fi-glk-j4005: FAIL (fdo#100368) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575
fdo#105719 https://bugs.freedesktop.org/show_bug.cgi?id=105719
fdo#106000 https://bugs.freedesktop.org/show_bug.cgi?id=106000
fdo#106097 https://bugs.freedesktop.org/show_bug.cgi?id=106097
== Participating hosts (45 -> 38) ==
Missing (7): fi-ilk-m540 fi-cnl-y3 fi-byt-squawks fi-bsw-cyan fi-ctg-p8600 fi-cfl-u2 fi-skl-6700hq
== Build changes ==
* Linux: CI_DRM_4261 -> Patchwork_9153
CI_DRM_4261: 505628b3d930ed326287c244afdd3c2f8fe274b7 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4501: 6796a604bab6df9c84af149e799902360afdd157 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9153: 901fca0ad70c0df783f85d70a90fc26c1be7b6f0 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
901fca0ad70c drm/i915: fix PCH_NOP setting for non-PCH platforms
a64c2c9c96d3 drm/i915/gem: be more strict about HAS_PCH_NOP() usage
442d8100231f drm/i915: be more strict about HAS_PCH_NOP() usage
09183ac797f5 drm/i915: clean up virtual PCH special case handling
e0781503e209 drm/i915: fix guest virtual PCH detection on non-PCH systems
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9153/issues.html
_______________________________________________
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https://lists.freedesktop.org/mailman/listinfo/intel-gfx
^ permalink raw reply [flat|nested] 10+ messages in thread* ✗ Fi.CI.IGT: failure for series starting with [1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems
2018-05-31 5:55 [PATCH 1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems Jani Nikula
` (4 preceding siblings ...)
2018-05-31 6:26 ` ✓ Fi.CI.BAT: success for series starting with [1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems Patchwork
@ 2018-05-31 7:17 ` Patchwork
5 siblings, 0 replies; 10+ messages in thread
From: Patchwork @ 2018-05-31 7:17 UTC (permalink / raw)
To: Jani Nikula; +Cc: intel-gfx
== Series Details ==
Series: series starting with [1/5] drm/i915: fix guest virtual PCH detection on non-PCH systems
URL : https://patchwork.freedesktop.org/series/43986/
State : failure
== Summary ==
= CI Bug Log - changes from CI_DRM_4261_full -> Patchwork_9153_full =
== Summary - FAILURE ==
Serious unknown changes coming with Patchwork_9153_full absolutely need to be
verified manually.
If you think the reported changes have nothing to do with the changes
introduced in Patchwork_9153_full, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.
External URL: https://patchwork.freedesktop.org/api/1.0/series/43986/revisions/1/mbox/
== Possible new issues ==
Here are the unknown changes that may have been introduced in Patchwork_9153_full:
=== IGT changes ===
==== Possible regressions ====
igt@perf_pmu@multi-client-vcs0:
shard-snb: PASS -> FAIL
==== Warnings ====
igt@gem_exec_schedule@deep-vebox:
shard-kbl: SKIP -> PASS
igt@gem_mocs_settings@mocs-rc6-vebox:
shard-kbl: PASS -> SKIP
== Known issues ==
Here are the changes found in Patchwork_9153_full that come from known issues:
=== IGT changes ===
==== Issues hit ====
igt@drm_read@fault-buffer:
shard-glk: PASS -> DMESG-WARN (fdo#106247) +2
igt@gem_exec_parallel@render-fds:
shard-snb: PASS -> INCOMPLETE (fdo#105411)
igt@kms_atomic_transition@1x-modeset-transitions-nonblocking-fencing:
shard-glk: PASS -> FAIL (fdo#105703)
igt@kms_cursor_legacy@2x-long-cursor-vs-flip-legacy:
shard-hsw: PASS -> FAIL (fdo#105767)
igt@kms_flip@wf_vblank-ts-check:
shard-hsw: PASS -> FAIL (fdo#100368)
igt@kms_flip_tiling@flip-to-y-tiled:
shard-glk: PASS -> FAIL (fdo#104724) +1
igt@kms_flip_tiling@flip-x-tiled:
shard-glk: PASS -> FAIL (fdo#104724, fdo#103822)
igt@kms_vblank@pipe-b-wait-busy:
shard-apl: PASS -> DMESG-WARN (fdo#105602, fdo#103558) +10
==== Possible fixes ====
igt@drv_selftest@live_gtt:
shard-apl: FAIL (fdo#105347) -> PASS
igt@kms_cursor_legacy@2x-nonblocking-modeset-vs-cursor-atomic:
shard-glk: FAIL (fdo#106509, fdo#105454) -> PASS
igt@kms_rotation_crc@cursor-rotation-180:
shard-hsw: FAIL (fdo#104724, fdo#103925) -> PASS
igt@kms_setmode@basic:
shard-apl: FAIL (fdo#99912) -> PASS
shard-kbl: FAIL (fdo#99912) -> PASS
igt@perf@polling:
shard-hsw: FAIL (fdo#102252) -> PASS
fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368
fdo#102252 https://bugs.freedesktop.org/show_bug.cgi?id=102252
fdo#103558 https://bugs.freedesktop.org/show_bug.cgi?id=103558
fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822
fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925
fdo#104724 https://bugs.freedesktop.org/show_bug.cgi?id=104724
fdo#105347 https://bugs.freedesktop.org/show_bug.cgi?id=105347
fdo#105411 https://bugs.freedesktop.org/show_bug.cgi?id=105411
fdo#105454 https://bugs.freedesktop.org/show_bug.cgi?id=105454
fdo#105602 https://bugs.freedesktop.org/show_bug.cgi?id=105602
fdo#105703 https://bugs.freedesktop.org/show_bug.cgi?id=105703
fdo#105767 https://bugs.freedesktop.org/show_bug.cgi?id=105767
fdo#106247 https://bugs.freedesktop.org/show_bug.cgi?id=106247
fdo#106509 https://bugs.freedesktop.org/show_bug.cgi?id=106509
fdo#99912 https://bugs.freedesktop.org/show_bug.cgi?id=99912
== Participating hosts (5 -> 5) ==
No changes in participating hosts
== Build changes ==
* Linux: CI_DRM_4261 -> Patchwork_9153
CI_DRM_4261: 505628b3d930ed326287c244afdd3c2f8fe274b7 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_4501: 6796a604bab6df9c84af149e799902360afdd157 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_9153: 901fca0ad70c0df783f85d70a90fc26c1be7b6f0 @ git://anongit.freedesktop.org/gfx-ci/linux
== Logs ==
For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_9153/shards.html
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