From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Imre Deak <imre.deak@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH v2] drm/i915/skl: Add warn about unsupported CDCLK rates
Date: Fri, 8 Jun 2018 17:36:15 +0300 [thread overview]
Message-ID: <20180608143615.GS23723@intel.com> (raw)
In-Reply-To: <20180608140002.6795-1-imre.deak@intel.com>
On Fri, Jun 08, 2018 at 05:00:02PM +0300, Imre Deak wrote:
> While checking workarounds related to the CDCLK PLL, I noticed that the
> DMC firmware bits for WA#1183 are missing for SKL. After that I
> clarified with HW people that it's not needed on SKL, since it doesn't
> support eDP1.4 which would be the only thing requiring the problematic
> CDCLK clock rates. So in theory we shouldn't ever choose these
> frequencies, but add an assert in any case for catching such cases and
> for documentation.
>
> v2:
> - Move the check to skl_set_cdclk and warn whenever using the
> corresponding VCO freq. (Ville)
>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>
> ---
> drivers/gpu/drm/i915/intel_cdclk.c | 10 ++++++++++
> 1 file changed, 10 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/intel_cdclk.c b/drivers/gpu/drm/i915/intel_cdclk.c
> index 704ddb4d3ca7..a1e9434698b9 100644
> --- a/drivers/gpu/drm/i915/intel_cdclk.c
> +++ b/drivers/gpu/drm/i915/intel_cdclk.c
> @@ -991,6 +991,16 @@ static void skl_set_cdclk(struct drm_i915_private *dev_priv,
> u32 freq_select, cdclk_ctl;
> int ret;
>
> + /*
> + * Based on WA#1183 CDCLK rates 308 and 617MHz CDCLK rates are
> + * unsupported on SKL. In theory this should never happen since only
> + * the eDP1.4 2.16 and 4.32Gbps rates require it, but eDP1.4 is not
> + * supported on SKL either, see the above WA. WARN whenever trying to
> + * use the corresponding VCO freq as that always leads to using the
> + * minimum 308MHz CDCLK.
> + */
> + WARN_ON_ONCE(vco == 8640000);
Needs IS_SKYLAKE()
with that
Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
> +
> mutex_lock(&dev_priv->pcu_lock);
> ret = skl_pcode_request(dev_priv, SKL_PCODE_CDCLK_CONTROL,
> SKL_CDCLK_PREPARE_FOR_CHANGE,
> --
> 2.13.2
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2018-06-08 14:36 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-07 16:13 [PATCH] drm/i915/icl: Add warn about unsupported CDCLK rates Imre Deak
2018-06-07 16:46 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-06-07 17:01 ` [PATCH] " Ville Syrjälä
2018-06-07 17:17 ` Imre Deak
2018-06-07 20:07 ` ✓ Fi.CI.IGT: success for " Patchwork
2018-06-08 14:00 ` [PATCH v2] drm/i915/skl: " Imre Deak
2018-06-08 14:36 ` Ville Syrjälä [this message]
2018-06-08 14:41 ` [PATCH v3] " Imre Deak
2018-06-08 14:47 ` ✓ Fi.CI.BAT: success for drm/i915/icl: Add warn about unsupported CDCLK rates (rev2) Patchwork
2018-06-08 15:06 ` ✓ Fi.CI.BAT: success for drm/i915/icl: Add warn about unsupported CDCLK rates (rev3) Patchwork
2018-06-08 18:44 ` ✓ Fi.CI.IGT: " Patchwork
2018-06-11 12:57 ` Imre Deak
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