From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Date: Thu, 14 Jun 2018 15:34:13 +0300 Message-ID: <20180614123413.GB20518@intel.com> References: <20180613160553.11664-1-ville.syrjala@linux.intel.com> <87o9gdzha5.fsf@intel.com> <87k1r1zh9a.fsf@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga05.intel.com (mga05.intel.com [192.55.52.43]) by gabe.freedesktop.org (Postfix) with ESMTPS id 6603F6E73C for ; Thu, 14 Jun 2018 12:34:17 +0000 (UTC) Content-Disposition: inline In-Reply-To: <87k1r1zh9a.fsf@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org List-Id: intel-gfx@lists.freedesktop.org T24gVGh1LCBKdW4gMTQsIDIwMTggYXQgMDM6MjY6MDlQTSArMDMwMCwgSmFuaSBOaWt1bGEgd3Jv dGU6Cj4gT24gVGh1LCAxNCBKdW4gMjAxOCwgSmFuaSBOaWt1bGEgPGphbmkubmlrdWxhQGxpbnV4 LmludGVsLmNvbT4gd3JvdGU6Cj4gPiBPbiBXZWQsIDEzIEp1biAyMDE4LCBWaWxsZSBTeXJqYWxh IDx2aWxsZS5zeXJqYWxhQGxpbnV4LmludGVsLmNvbT4gd3JvdGU6Cj4gPj4gRnJvbTogVmlsbGUg U3lyasOkbMOkIDx2aWxsZS5zeXJqYWxhQGxpbnV4LmludGVsLmNvbT4KPiA+Pgo+ID4+IExvb2tz IGxpa2UgaW50ZXJsYWNlZCBEUCBvdXRwdXQgZG9lc24ndCB3b3JrIG9uIGc0eCBlaXRoZXIuIE5v dCBhbGwKPiA+PiB0aGF0IHN1cnByaXNpbmcgY29uc2lkZXJpbmcgd2UgYWxyZWFkeSBlc3RhYmxp c2hlZCB0aGF0IGludGVybGFjZWQKPiA+PiBEUCBvdXRwdXQgaXMgYnVzdGVkIG9uIFZMVi9DSFYu Cj4gPj4KPiA+PiBDYzogc3RhYmxlQHZnZXIua2VybmVsLm9yZwo+ID4+IFNpZ25lZC1vZmYtYnk6 IFZpbGxlIFN5cmrDpGzDpCA8dmlsbGUuc3lyamFsYUBsaW51eC5pbnRlbC5jb20+Cj4gPgo+ID4g UmV2aWV3ZWQtYnk6IEphbmkgTmlrdWxhIDxqYW5pLm5pa3VsYUBpbnRlbC5jb20+Cj4gCj4gT2gs IGRpZCB5b3UgaGF2ZSBhIGJ1ZyByZWZlcmVuY2U/CgpOby4gSnVzdCBub3RpY2VkIGl0IG9uIG15 IG93biBtYWNoaW5lLgoKPiAKPiAKPiA+Cj4gPgo+ID4+IC0tLQo+ID4+ICBkcml2ZXJzL2dwdS9k cm0vaTkxNS9pbnRlbF9kcC5jIHwgNCArKy0tCj4gPj4gIDEgZmlsZSBjaGFuZ2VkLCAyIGluc2Vy dGlvbnMoKyksIDIgZGVsZXRpb25zKC0pCj4gPj4KPiA+PiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9n cHUvZHJtL2k5MTUvaW50ZWxfZHAuYyBiL2RyaXZlcnMvZ3B1L2RybS9pOTE1L2ludGVsX2RwLmMK PiA+PiBpbmRleCA0MGZmZDkxNjMxNzUuLjYwNjg5ODZmZDk4NSAxMDA2NDQKPiA+PiAtLS0gYS9k cml2ZXJzL2dwdS9kcm0vaTkxNS9pbnRlbF9kcC5jCj4gPj4gKysrIGIvZHJpdmVycy9ncHUvZHJt L2k5MTUvaW50ZWxfZHAuYwo+ID4+IEBAIC0xODY5LDcgKzE4NjksNyBAQCBpbnRlbF9kcF9jb21w dXRlX2NvbmZpZyhzdHJ1Y3QgaW50ZWxfZW5jb2RlciAqZW5jb2RlciwKPiA+PiAgCQkJCQkJY29u bl9zdGF0ZS0+c2NhbGluZ19tb2RlKTsKPiA+PiAgCX0KPiA+PiAgCj4gPj4gLQlpZiAoKElTX1ZB TExFWVZJRVcoZGV2X3ByaXYpIHx8IElTX0NIRVJSWVZJRVcoZGV2X3ByaXYpKSAmJgo+ID4+ICsJ aWYgKEhBU19HTUNIX0RJU1BMQVkoZGV2X3ByaXYpICYmCj4gPj4gIAkgICAgYWRqdXN0ZWRfbW9k ZS0+ZmxhZ3MgJiBEUk1fTU9ERV9GTEFHX0lOVEVSTEFDRSkKPiA+PiAgCQlyZXR1cm4gZmFsc2U7 Cj4gPj4gIAo+ID4+IEBAIC02MzUxLDcgKzYzNTEsNyBAQCBpbnRlbF9kcF9pbml0X2Nvbm5lY3Rv cihzdHJ1Y3QgaW50ZWxfZGlnaXRhbF9wb3J0ICppbnRlbF9kaWdfcG9ydCwKPiA+PiAgCWRybV9j b25uZWN0b3JfaW5pdChkZXYsIGNvbm5lY3RvciwgJmludGVsX2RwX2Nvbm5lY3Rvcl9mdW5jcywg dHlwZSk7Cj4gPj4gIAlkcm1fY29ubmVjdG9yX2hlbHBlcl9hZGQoY29ubmVjdG9yLCAmaW50ZWxf ZHBfY29ubmVjdG9yX2hlbHBlcl9mdW5jcyk7Cj4gPj4gIAo+ID4+IC0JaWYgKCFJU19WQUxMRVlW SUVXKGRldl9wcml2KSAmJiAhSVNfQ0hFUlJZVklFVyhkZXZfcHJpdikpCj4gPj4gKwlpZiAoIUhB U19HTUNIX0RJU1BMQVkoZGV2X3ByaXYpKQo+ID4+ICAJCWNvbm5lY3Rvci0+aW50ZXJsYWNlX2Fs bG93ZWQgPSB0cnVlOwo+ID4+ICAJY29ubmVjdG9yLT5kb3VibGVzY2FuX2FsbG93ZWQgPSAwOwo+ IAo+IC0tIAo+IEphbmkgTmlrdWxhLCBJbnRlbCBPcGVuIFNvdXJjZSBHcmFwaGljcyBDZW50ZXIK Ci0tIApWaWxsZSBTeXJqw6Rsw6QKSW50ZWwKX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX18KSW50ZWwtZ2Z4IG1haWxpbmcgbGlzdApJbnRlbC1nZnhAbGlzdHMu ZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlz dGluZm8vaW50ZWwtZ2Z4Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mga01.intel.com ([192.55.52.88]:5709 "EHLO mga01.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1755193AbeFNMeR (ORCPT ); Thu, 14 Jun 2018 08:34:17 -0400 Date: Thu, 14 Jun 2018 15:34:13 +0300 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= To: Jani Nikula Cc: intel-gfx@lists.freedesktop.org, stable@vger.kernel.org Subject: Re: [Intel-gfx] [PATCH 1/2] drm/i915: Disallow interlaced modes on g4x DP outputs Message-ID: <20180614123413.GB20518@intel.com> References: <20180613160553.11664-1-ville.syrjala@linux.intel.com> <87o9gdzha5.fsf@intel.com> <87k1r1zh9a.fsf@intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=iso-8859-1 Content-Disposition: inline Content-Transfer-Encoding: 8bit In-Reply-To: <87k1r1zh9a.fsf@intel.com> Sender: stable-owner@vger.kernel.org List-ID: On Thu, Jun 14, 2018 at 03:26:09PM +0300, Jani Nikula wrote: > On Thu, 14 Jun 2018, Jani Nikula wrote: > > On Wed, 13 Jun 2018, Ville Syrjala wrote: > >> From: Ville Syrj�l� > >> > >> Looks like interlaced DP output doesn't work on g4x either. Not all > >> that surprising considering we already established that interlaced > >> DP output is busted on VLV/CHV. > >> > >> Cc: stable@vger.kernel.org > >> Signed-off-by: Ville Syrj�l� > > > > Reviewed-by: Jani Nikula > > Oh, did you have a bug reference? No. Just noticed it on my own machine. > > > > > > > >> --- > >> drivers/gpu/drm/i915/intel_dp.c | 4 ++-- > >> 1 file changed, 2 insertions(+), 2 deletions(-) > >> > >> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c > >> index 40ffd9163175..6068986fd985 100644 > >> --- a/drivers/gpu/drm/i915/intel_dp.c > >> +++ b/drivers/gpu/drm/i915/intel_dp.c > >> @@ -1869,7 +1869,7 @@ intel_dp_compute_config(struct intel_encoder *encoder, > >> conn_state->scaling_mode); > >> } > >> > >> - if ((IS_VALLEYVIEW(dev_priv) || IS_CHERRYVIEW(dev_priv)) && > >> + if (HAS_GMCH_DISPLAY(dev_priv) && > >> adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE) > >> return false; > >> > >> @@ -6351,7 +6351,7 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port, > >> drm_connector_init(dev, connector, &intel_dp_connector_funcs, type); > >> drm_connector_helper_add(connector, &intel_dp_connector_helper_funcs); > >> > >> - if (!IS_VALLEYVIEW(dev_priv) && !IS_CHERRYVIEW(dev_priv)) > >> + if (!HAS_GMCH_DISPLAY(dev_priv)) > >> connector->interlace_allowed = true; > >> connector->doublescan_allowed = 0; > > -- > Jani Nikula, Intel Open Source Graphics Center -- Ville Syrj�l� Intel