From: "Daniel P. Berrangé" <berrange@redhat.com>
To: Peter Maydell <peter.maydell@linaro.org>
Cc: "Alistair Francis" <alistair23@gmail.com>,
"Michael Clark" <mjc@sifive.com>,
"Alistair Francis" <alistair.francis@wdc.com>,
"Philippe Mathieu-Daudé" <f4bug@amsat.org>,
"QEMU Developers" <qemu-devel@nongnu.org>
Subject: Re: [Qemu-devel] [PULL 0/7] riscv-pull queue
Date: Fri, 29 Jun 2018 15:49:05 +0100 [thread overview]
Message-ID: <20180629144905.GU27016@redhat.com> (raw)
In-Reply-To: <CAFEAcA98fthhG_q0skQcWzhLMFYVPQpc=jAJOL+8CrrEpGLvQw@mail.gmail.com>
On Fri, Jun 29, 2018 at 03:21:08PM +0100, Peter Maydell wrote:
> On 29 June 2018 at 15:13, Alistair Francis <alistair23@gmail.com> wrote:
> > Can you import it manually? The armour export is below:
>
> Aha. I tried that, which didn't work either, which prompted
> me to try --verbose, which says:
>
> e104462:xenial:qemu-for-merges$ gpg --verbose --import /tmp/alistair.gpg
> gpg: armour header: Version: GnuPG v2
> gpg: can't handle public key algorithm 19
This is an ECC algorithm, and only supported by gpg2 tool not gpg AFAICT.
Regards,
Daniel
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prev parent reply other threads:[~2018-06-29 14:49 UTC|newest]
Thread overview: 18+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-06-27 17:44 [Qemu-devel] [PULL 0/7] riscv-pull queue Alistair Francis
2018-06-27 17:44 ` [Qemu-devel] [PULL 1/7] hw/riscv/sifive_u: Create a SiFive U SoC object Alistair Francis
2018-06-27 17:44 ` [Qemu-devel] [PULL 2/7] hw/riscv/sifive_e: Create a SiFive E " Alistair Francis
2018-06-27 17:44 ` [Qemu-devel] [PULL 3/7] hw/riscv/sifive_plic: Use gpios instead of irqs Alistair Francis
2018-06-27 17:44 ` [Qemu-devel] [PULL 4/7] hw/riscv/sifive_u: Set the soc device tree node as a simple-bus Alistair Francis
2018-06-27 17:44 ` [Qemu-devel] [PULL 5/7] hw/riscv/sifive_u: Set the interrupt controler number of interrupts Alistair Francis
2018-06-27 17:44 ` [Qemu-devel] [PULL 6/7] hw/riscv/sifive_u: Move the uart device tree node under /soc/ Alistair Francis
2018-06-27 17:44 ` [Qemu-devel] [PULL 7/7] hw/riscv/sifive_u: Connect the Cadence GEM Ethernet device Alistair Francis
2018-06-28 16:52 ` [Qemu-devel] [PULL 0/7] riscv-pull queue Peter Maydell
2018-06-28 21:35 ` Philippe Mathieu-Daudé
2018-06-29 9:41 ` Peter Maydell
2018-06-29 14:13 ` Alistair Francis
2018-06-29 14:21 ` Peter Maydell
2018-06-29 14:27 ` Alistair Francis
2018-06-29 14:49 ` Peter Maydell
2018-06-29 14:52 ` Alistair Francis
2018-06-29 14:31 ` Philippe Mathieu-Daudé
2018-06-29 14:49 ` Daniel P. Berrangé [this message]
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