From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from mail.linuxfoundation.org ([140.211.169.12]:39984 "EHLO mail.linuxfoundation.org" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1754260AbeGJORD (ORCPT ); Tue, 10 Jul 2018 10:17:03 -0400 Date: Tue, 10 Jul 2018 16:17:00 +0200 From: Greg KH To: Martin Kaiser Cc: stable@vger.kernel.org, boris.brezillon@bootlin.com, miquel.raynal@bootlin.com, s.hauer@pengutronix.de Subject: Re: [PATCH] mtd: rawnand: mxc: set spare area size register explicitly Message-ID: <20180710141700.GR1123@kroah.com> References: <153043896075107@kroah.com> <1530462993-2125-1-git-send-email-martin@kaiser.cx> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: <1530462993-2125-1-git-send-email-martin@kaiser.cx> Sender: stable-owner@vger.kernel.org List-ID: On Sun, Jul 01, 2018 at 06:36:33PM +0200, Martin Kaiser wrote: > commit 3f77f244d8ec28e3a0a81240ffac7d626390060c upstream. > > The v21 version of the NAND flash controller contains a Spare Area Size > Register (SPAS) at offset 0x10. Its setting defaults to the maximum > spare area size of 218 bytes. The size that is set in this register is > used by the controller when it calculates the ECC bytes internally in > hardware. > > Usually, this register is updated from settings in the IIM fuses when > the system is booting from NAND flash. For other boot media, however, > the SPAS register remains at the default setting, which may not work for > the particular flash chip on the board. The same goes for flash chips > whose configuration cannot be set in the IIM fuses (e.g. chips with 2k > sector size and 128 bytes spare area size can't be configured in the IIM > fuses on imx25 systems). > > Set the SPAS register explicitly during the preset operation. Derive the > register value from mtd->oobsize that was detected during probe by > decoding the flash chip's ID bytes. > > While at it, rename the define for the spare area register's offset to > NFC_V21_RSLTSPARE_AREA. The register at offset 0x10 on v1 controllers is > different from the register on v21 controllers. > > Fixes: d484018 ("mtd: mxc_nand: set NFC registers after reset") > Cc: stable@vger.kernel.org > Signed-off-by: Martin Kaiser > Reviewed-by: Sascha Hauer > Reviewed-by: Miquel Raynal > Signed-off-by: Boris Brezillon > --- > Hello Greg, > > the file that this patch modifies was renamed after 4.14. This patch > uses the previous name. I tested it to apply to the 4.4, 4.9 and 4.14 > stable branches. Could you add it to the queues again? Now applied, thanks. greg k-h