From mboxrd@z Thu Jan 1 00:00:00 1970 From: Christoph Hellwig Subject: Re: [PATCH 12/25] MIPS: loongson: untangle dma implementations Date: Wed, 11 Jul 2018 14:57:36 +0200 Message-ID: <20180711125736.GA19191@lst.de> References: <20180525092111.18516-1-hch@lst.de> <20180525092111.18516-13-hch@lst.de> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org Errors-To: iommu-bounces-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org To: "Maciej W. Rozycki" Cc: linux-mips-6z/3iImG2C8G8FEW9MqTrA@public.gmane.org, Florian Fainelli , David Daney , James Hogan , Kevin Cernekee , Ralf Baechle , iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org, Tom Bogendoerfer , Jiaxun Yang , Huacai Chen , Christoph Hellwig List-Id: iommu@lists.linux-foundation.org On Wed, Jul 11, 2018 at 01:46:31PM +0100, Maciej W. Rozycki wrote: > > Only loongson-3 is DMA coherent and uses swiotlb. So move the dma > > address translations stubs directly to the loongson-3 code, and remove > > a few Kconfig indirections. > > SiByte should too though, at least for those boards, such as the SWARM > and the BigSur, that can have DRAM over 4GiB (and 32-bit PCI devices > plugged). Only in this case refers to loonson boards. > I never got to have the wiring of swiotlb completed for these boards as > I got distracted with getting set up to debug a DRAM controller issue > observed in the form of memory data corruption with the banks fully > populated (which might have to do something with the parameters of bank > interleaving enabled in such a configuration, as replacing a single > module with a smaller-sized one and therefore disabling interleaving, > which can only work with all modules being the same size, makes the > problem go away). After this series enabling swiotlb for another board is trivial as all the code has been consolidated. Just select SWIOTLB and add a call to swiotlb_init to the board setup code. > > FWIW, > > Maciej ---end quoted text--- From mboxrd@z Thu Jan 1 00:00:00 1970 Received: with ECARTIS (v1.0.0; list linux-mips); Wed, 11 Jul 2018 14:55:58 +0200 (CEST) Received: from verein.lst.de ([213.95.11.211]:42846 "EHLO newverein.lst.de" rhost-flags-OK-OK-OK-OK) by eddie.linux-mips.org with ESMTP id S23993514AbeGKMzw3l6ji (ORCPT ); Wed, 11 Jul 2018 14:55:52 +0200 Received: by newverein.lst.de (Postfix, from userid 2407) id 4645468B97; Wed, 11 Jul 2018 14:57:36 +0200 (CEST) Date: Wed, 11 Jul 2018 14:57:36 +0200 From: Christoph Hellwig To: "Maciej W. Rozycki" Cc: Christoph Hellwig , Ralf Baechle , James Hogan , Kevin Cernekee , Florian Fainelli , Huacai Chen , Jiaxun Yang , David Daney , Tom Bogendoerfer , linux-mips@linux-mips.org, iommu@lists.linux-foundation.org Subject: Re: [PATCH 12/25] MIPS: loongson: untangle dma implementations Message-ID: <20180711125736.GA19191@lst.de> References: <20180525092111.18516-1-hch@lst.de> <20180525092111.18516-13-hch@lst.de> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii Content-Disposition: inline In-Reply-To: User-Agent: Mutt/1.5.17 (2007-11-01) Return-Path: X-Envelope-To: <"|/home/ecartis/ecartis -s linux-mips"> (uid 0) X-Orcpt: rfc822;linux-mips@linux-mips.org Original-Recipient: rfc822;linux-mips@linux-mips.org X-archive-position: 64794 X-ecartis-version: Ecartis v1.0.0 Sender: linux-mips-bounce@linux-mips.org Errors-to: linux-mips-bounce@linux-mips.org X-original-sender: hch@lst.de Precedence: bulk List-help: List-unsubscribe: List-software: Ecartis version 1.0.0 List-Id: linux-mips X-List-ID: linux-mips List-subscribe: List-owner: List-post: List-archive: X-list: linux-mips On Wed, Jul 11, 2018 at 01:46:31PM +0100, Maciej W. Rozycki wrote: > > Only loongson-3 is DMA coherent and uses swiotlb. So move the dma > > address translations stubs directly to the loongson-3 code, and remove > > a few Kconfig indirections. > > SiByte should too though, at least for those boards, such as the SWARM > and the BigSur, that can have DRAM over 4GiB (and 32-bit PCI devices > plugged). Only in this case refers to loonson boards. > I never got to have the wiring of swiotlb completed for these boards as > I got distracted with getting set up to debug a DRAM controller issue > observed in the form of memory data corruption with the banks fully > populated (which might have to do something with the parameters of bank > interleaving enabled in such a configuration, as replacing a single > module with a smaller-sized one and therefore disabling interleaving, > which can only work with all modules being the same size, makes the > problem go away). After this series enabling swiotlb for another board is trivial as all the code has been consolidated. Just select SWIOTLB and add a call to swiotlb_init to the board setup code. > > FWIW, > > Maciej ---end quoted text---