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From: Mauro Rossi <issor.oruam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: Mauro Rossi <issor.oruam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
Subject: [PATCH] RFC: drm/amd/display: enable ABGR and XBGR formats (v2)
Date: Mon, 16 Jul 2018 04:03:30 +0200	[thread overview]
Message-ID: <20180716020330.21525-1-user@ANDROIDDEV> (raw)

From: Mauro Rossi <issor.oruam@gmail.com>

(v1) {A,X}BGR8888 code paths are added in amdgpu_dm, by using an fb_format
     already listed in dc/dc_hw_types.h (SURFACE_PIXEL_FORMAT_GRPH_ABGR8888),
     and in dce 8.0, 10.0 and 11.0, i.e. Bonaire and later. 
     GRPH_FORMAT_ARGB8888 is used due to lack of specific GRPH_FORMAT_ABGR8888

(v2) support for {A,X}BGR8888 in atombios_crtc (now in dce4 path, to be refined)
     to initialize frame buffer device and avoid following dmesg error:
     "[drm] Cannot find any crtc or sizes"

Tested with oreo-x86 (hwcomposer.drm + gralloc.gbm + mesa-dev/radv)
SurfaceFlinger can now select RGBA_8888 format for HWC_FRAMEBUFFER_TARGET
No major regression or crash observed so far, but some android 2D overlay 
may be affected by color artifacts. Kind feedback requested.

Signed-off-by: Mauro Rossi <issor.oruam@gmail.com>
---
 drivers/gpu/drm/amd/amdgpu/dce_v10_0.c            | 9 +++++++++
 drivers/gpu/drm/amd/amdgpu/dce_v11_0.c            | 9 +++++++++
 drivers/gpu/drm/amd/amdgpu/dce_v8_0.c             | 8 ++++++++
 drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c | 6 ++++++
 drivers/gpu/drm/radeon/atombios_crtc.c            | 8 ++++++++
 5 files changed, 40 insertions(+)

diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
index 022f303463fc..d4280d2e7737 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v10_0.c
@@ -2005,6 +2005,15 @@ static int dce_v10_0_crtc_do_set_base(struct drm_crtc *crtc,
 		/* Greater 8 bpc fb needs to bypass hw-lut to retain precision */
 		bypass_lut = true;
 		break;
+	case DRM_FORMAT_XBGR8888:
+	case DRM_FORMAT_ABGR8888:
+		fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2);
+		fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); /* Hack */
+#ifdef __BIG_ENDIAN
+		fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP,
+					ENDIAN_8IN32);
+#endif
+		break;
 	default:
 		DRM_ERROR("Unsupported screen format %s\n",
 		          drm_get_format_name(target_fb->format->format, &format_name));
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
index 800a9f36ab4f..d48ee8f2e192 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v11_0.c
@@ -2044,6 +2044,15 @@ static int dce_v11_0_crtc_do_set_base(struct drm_crtc *crtc,
 		/* Greater 8 bpc fb needs to bypass hw-lut to retain precision */
 		bypass_lut = true;
 		break;
+	case DRM_FORMAT_XBGR8888:
+	case DRM_FORMAT_ABGR8888:
+		fb_format = REG_SET_FIELD(0, GRPH_CONTROL, GRPH_DEPTH, 2);
+		fb_format = REG_SET_FIELD(fb_format, GRPH_CONTROL, GRPH_FORMAT, 0); /* Hack */
+#ifdef __BIG_ENDIAN
+		fb_swap = REG_SET_FIELD(fb_swap, GRPH_SWAP_CNTL, GRPH_ENDIAN_SWAP,
+					ENDIAN_8IN32);
+#endif
+		break;
 	default:
 		DRM_ERROR("Unsupported screen format %s\n",
 		          drm_get_format_name(target_fb->format->format, &format_name));
diff --git a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
index 012e0a9ae0ff..0e2fc1ac475f 100644
--- a/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/dce_v8_0.c
@@ -1929,6 +1929,14 @@ static int dce_v8_0_crtc_do_set_base(struct drm_crtc *crtc,
 		/* Greater 8 bpc fb needs to bypass hw-lut to retain precision */
 		bypass_lut = true;
 		break;
+	case DRM_FORMAT_XBGR8888:
+	case DRM_FORMAT_ABGR8888:
+		fb_format = ((GRPH_DEPTH_32BPP << GRPH_CONTROL__GRPH_DEPTH__SHIFT) |
+		             (GRPH_FORMAT_ARGB8888 << GRPH_CONTROL__GRPH_FORMAT__SHIFT)); /* Hack */
+#ifdef __BIG_ENDIAN
+		fb_swap = (GRPH_ENDIAN_8IN32 << GRPH_SWAP_CNTL__GRPH_ENDIAN_SWAP__SHIFT);
+#endif
+		break;
 	default:
 		DRM_ERROR("Unsupported screen format %s\n",
 		          drm_get_format_name(target_fb->format->format, &format_name));
diff --git a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
index 63c67346d316..6c10fa291150 100644
--- a/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
+++ b/drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
@@ -1824,6 +1824,10 @@ static int fill_plane_attributes_from_fb(struct amdgpu_device *adev,
 	case DRM_FORMAT_ABGR2101010:
 		plane_state->format = SURFACE_PIXEL_FORMAT_GRPH_ABGR2101010;
 		break;
+	case DRM_FORMAT_XBGR8888:
+	case DRM_FORMAT_ABGR8888:
+		plane_state->format = SURFACE_PIXEL_FORMAT_GRPH_ABGR8888;
+		break;
 	case DRM_FORMAT_NV21:
 		plane_state->format = SURFACE_PIXEL_FORMAT_VIDEO_420_YCbCr;
 		break;
@@ -3115,6 +3119,8 @@ static const uint32_t rgb_formats[] = {
 	DRM_FORMAT_XBGR2101010,
 	DRM_FORMAT_ARGB2101010,
 	DRM_FORMAT_ABGR2101010,
+	DRM_FORMAT_XBGR8888,
+	DRM_FORMAT_ABGR8888,
 };
 
 static const uint32_t yuv_formats[] = {
diff --git a/drivers/gpu/drm/radeon/atombios_crtc.c b/drivers/gpu/drm/radeon/atombios_crtc.c
index 02baaaf20e9d..b954b3658a33 100644
--- a/drivers/gpu/drm/radeon/atombios_crtc.c
+++ b/drivers/gpu/drm/radeon/atombios_crtc.c
@@ -1259,6 +1259,14 @@ static int dce4_crtc_do_set_base(struct drm_crtc *crtc,
 		/* Greater 8 bpc fb needs to bypass hw-lut to retain precision */
 		bypass_lut = true;
 		break;
+	case DRM_FORMAT_XBGR8888:
+	case DRM_FORMAT_ABGR8888:
+		fb_format = (EVERGREEN_GRPH_DEPTH(EVERGREEN_GRPH_DEPTH_32BPP) |
+			     EVERGREEN_GRPH_FORMAT(EVERGREEN_GRPH_FORMAT_ARGB8888));
+#ifdef __BIG_ENDIAN
+		fb_swap = EVERGREEN_GRPH_ENDIAN_SWAP(EVERGREEN_GRPH_ENDIAN_8IN32);
+#endif
+		break;
 	default:
 		DRM_ERROR("Unsupported screen format %s\n",
 		          drm_get_format_name(target_fb->format->format, &format_name));
-- 
2.17.1

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             reply	other threads:[~2018-07-16  2:03 UTC|newest]

Thread overview: 10+ messages / expand[flat|nested]  mbox.gz  Atom feed  top
2018-07-16  2:03 Mauro Rossi [this message]
2018-07-17 13:43 ` [PATCH] RFC: drm/amd/display: enable ABGR and XBGR formats (v2) Alex Deucher
     [not found]   ` <CADnq5_P0_pLHZ+9ccQ6hro9NBBuqL-G8UjYp3NTr-Oka+0KYAA-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-07-17 18:38     ` Mauro Rossi
     [not found]       ` <CAEQFVGbAQ+1BbdhC+4sGiFukH-JVSui9Y+ZhxPswCVHw+rcbFw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-07-24 20:41         ` Alex Deucher
     [not found]           ` <CADnq5_PAtdwddz1ctBSixX9AqgY3pq=vryBMsSvytw8=JG+8Rw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-08-01  8:25             ` drm/radeon,amdgpu,dc: enable ABGR and XBGR formats Mauro Rossi
     [not found]               ` <20180801082506.17184-1-issor.oruam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-08-01  8:25                 ` [PATCH 1/3] drm/amd/display: enable ABGR and XBGR formats (v3) Mauro Rossi
     [not found]                   ` <20180801082506.17184-2-issor.oruam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-08-01 16:08                     ` Alex Deucher
2018-08-01  8:25                 ` [PATCH 2/3] drm/amdgpu: enable enable ABGR and XBGR formats Mauro Rossi
2018-08-01  8:25                 ` [PATCH 3/3] drm/radeon: " Mauro Rossi
     [not found]                   ` <20180801082506.17184-4-issor.oruam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-08-01 16:11                     ` Alex Deucher

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