From mboxrd@z Thu Jan 1 00:00:00 1970 From: thomas.petazzoni@bootlin.com (Thomas Petazzoni) Date: Mon, 16 Jul 2018 21:38:19 +0200 Subject: [PATCH v4 10/14] dt-bindings/interrupt-controller: update Marvell ICU bindings In-Reply-To: <20180716152734.GA4581@rob-hp-laptop> References: <20180705124011.7661-1-miquel.raynal@bootlin.com> <20180705124011.7661-11-miquel.raynal@bootlin.com> <20180716152734.GA4581@rob-hp-laptop> Message-ID: <20180716213819.48e13e4d@windsurf> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hello, On Mon, 16 Jul 2018 09:27:34 -0600, Rob Herring wrote: > > +Required properties for the icu_nsr/icu_sei subnodes: > > + > > +- compatible: Should be "marvell,cp110-icu-nsr" or "marvell,cp110-icu-sei". > > + > > I raised this before and still don't understand. You had 4 types before > and now you only have 2 types? How do you handle SR and REI with the new > binding? As I replied to a different e-mail, the current binding pretended to support SR, SEI and REI, but it definitely could not. The ICU collects wired interrupts from the CP, and forwards them to the AP as MSIs. And contrary to what we thought when designing the current binding, the target of the MSIs is different depending on the type of interrupt. NSRs go to the GICP controller in the AP, SEIs go to a special SEI controller in the AP, REIs go to a special REI controller in the AP. In order to represent that in the Device Tree, you need to have a different msi-parent property for each of NSR, SEI and REI. This is not something that the current broken binding allows to express, and it's the reason why we're migrating to this new binding. So even if the current binding documents that it supports NSR, SEI, REI and SR, it definitely cannot support anything but NSR. Therefore, the introduction of the new binding by Miqu?l does not introduce any regression in functionality: it simply allows to really support SEIs. Does this explanation clarify the situation, and what we're trying to achieve ? Thanks! Thomas -- Thomas Petazzoni, CTO, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com From mboxrd@z Thu Jan 1 00:00:00 1970 From: Thomas Petazzoni Subject: Re: [PATCH v4 10/14] dt-bindings/interrupt-controller: update Marvell ICU bindings Date: Mon, 16 Jul 2018 21:38:19 +0200 Message-ID: <20180716213819.48e13e4d@windsurf> References: <20180705124011.7661-1-miquel.raynal@bootlin.com> <20180705124011.7661-11-miquel.raynal@bootlin.com> <20180716152734.GA4581@rob-hp-laptop> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <20180716152734.GA4581@rob-hp-laptop> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Rob Herring Cc: Mark Rutland , Andrew Lunn , Jason Cooper , devicetree@vger.kernel.org, Marc Zyngier , Catalin Marinas , Gregory Clement , Haim Boot , Will Deacon , Maxime Chevallier , Nadav Haklai , Antoine Tenart , Miquel Raynal , Thomas Gleixner , Hanna Hawa , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth List-Id: devicetree@vger.kernel.org SGVsbG8sCgpPbiBNb24sIDE2IEp1bCAyMDE4IDA5OjI3OjM0IC0wNjAwLCBSb2IgSGVycmluZyB3 cm90ZToKCj4gPiArUmVxdWlyZWQgcHJvcGVydGllcyBmb3IgdGhlIGljdV9uc3IvaWN1X3NlaSBz dWJub2RlczoKPiA+ICsKPiA+ICstIGNvbXBhdGlibGU6IFNob3VsZCBiZSAibWFydmVsbCxjcDEx MC1pY3UtbnNyIiBvciAibWFydmVsbCxjcDExMC1pY3Utc2VpIi4KPiA+ICsgIAo+IAo+IEkgcmFp c2VkIHRoaXMgYmVmb3JlIGFuZCBzdGlsbCBkb24ndCB1bmRlcnN0YW5kLiBZb3UgaGFkIDQgdHlw ZXMgYmVmb3JlIAo+IGFuZCBub3cgeW91IG9ubHkgaGF2ZSAyIHR5cGVzPyBIb3cgZG8geW91IGhh bmRsZSBTUiBhbmQgUkVJIHdpdGggdGhlIG5ldyAKPiBiaW5kaW5nPwoKQXMgSSByZXBsaWVkIHRv IGEgZGlmZmVyZW50IGUtbWFpbCwgdGhlIGN1cnJlbnQgYmluZGluZyBwcmV0ZW5kZWQgdG8Kc3Vw cG9ydCBTUiwgU0VJIGFuZCBSRUksIGJ1dCBpdCBkZWZpbml0ZWx5IGNvdWxkIG5vdC4KClRoZSBJ Q1UgY29sbGVjdHMgd2lyZWQgaW50ZXJydXB0cyBmcm9tIHRoZSBDUCwgYW5kIGZvcndhcmRzIHRo ZW0gdG8gdGhlCkFQIGFzIE1TSXMuIEFuZCBjb250cmFyeSB0byB3aGF0IHdlIHRob3VnaHQgd2hl biBkZXNpZ25pbmcgdGhlIGN1cnJlbnQKYmluZGluZywgdGhlIHRhcmdldCBvZiB0aGUgTVNJcyBp cyBkaWZmZXJlbnQgZGVwZW5kaW5nIG9uIHRoZSB0eXBlIG9mCmludGVycnVwdC4gTlNScyBnbyB0 byB0aGUgR0lDUCBjb250cm9sbGVyIGluIHRoZSBBUCwgU0VJcyBnbyB0byBhCnNwZWNpYWwgU0VJ IGNvbnRyb2xsZXIgaW4gdGhlIEFQLCBSRUlzIGdvIHRvIGEgc3BlY2lhbCBSRUkgY29udHJvbGxl cgppbiB0aGUgQVAuCgpJbiBvcmRlciB0byByZXByZXNlbnQgdGhhdCBpbiB0aGUgRGV2aWNlIFRy ZWUsIHlvdSBuZWVkIHRvIGhhdmUgYQpkaWZmZXJlbnQgbXNpLXBhcmVudCBwcm9wZXJ0eSBmb3Ig ZWFjaCBvZiBOU1IsIFNFSSBhbmQgUkVJLiBUaGlzIGlzIG5vdApzb21ldGhpbmcgdGhhdCB0aGUg Y3VycmVudCBicm9rZW4gYmluZGluZyBhbGxvd3MgdG8gZXhwcmVzcywgYW5kIGl0J3MKdGhlIHJl YXNvbiB3aHkgd2UncmUgbWlncmF0aW5nIHRvIHRoaXMgbmV3IGJpbmRpbmcuCgpTbyBldmVuIGlm IHRoZSBjdXJyZW50IGJpbmRpbmcgZG9jdW1lbnRzIHRoYXQgaXQgc3VwcG9ydHMgTlNSLCBTRUks IFJFSQphbmQgU1IsIGl0IGRlZmluaXRlbHkgY2Fubm90IHN1cHBvcnQgYW55dGhpbmcgYnV0IE5T Ui4gVGhlcmVmb3JlLCB0aGUKaW50cm9kdWN0aW9uIG9mIHRoZSBuZXcgYmluZGluZyBieSBNaXF1 w6hsIGRvZXMgbm90IGludHJvZHVjZSBhbnkKcmVncmVzc2lvbiBpbiBmdW5jdGlvbmFsaXR5OiBp dCBzaW1wbHkgYWxsb3dzIHRvIHJlYWxseSBzdXBwb3J0IFNFSXMuCgpEb2VzIHRoaXMgZXhwbGFu YXRpb24gY2xhcmlmeSB0aGUgc2l0dWF0aW9uLCBhbmQgd2hhdCB3ZSdyZSB0cnlpbmcgdG8KYWNo aWV2ZSA/CgpUaGFua3MhCgpUaG9tYXMKLS0gClRob21hcyBQZXRhenpvbmksIENUTywgQm9vdGxp biAoZm9ybWVybHkgRnJlZSBFbGVjdHJvbnMpCkVtYmVkZGVkIExpbnV4IGFuZCBLZXJuZWwgZW5n aW5lZXJpbmcKaHR0cHM6Ly9ib290bGluLmNvbQoKX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QKbGludXgt YXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRlYWQub3Jn L21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo=