From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v5 11/13] drm/i915/icl: Add macros for MMIO of DSI transcoder registers Date: Thu, 19 Jul 2018 19:22:41 +0300 Message-ID: <20180719162241.GE5565@intel.com> References: <1531215614-6828-1-git-send-email-madhav.chauhan@intel.com> <1531215614-6828-12-git-send-email-madhav.chauhan@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga14.intel.com (mga14.intel.com [192.55.52.115]) by gabe.freedesktop.org (Postfix) with ESMTPS id B72766E8E5 for ; Thu, 19 Jul 2018 16:23:01 +0000 (UTC) Content-Disposition: inline In-Reply-To: <1531215614-6828-12-git-send-email-madhav.chauhan@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: Madhav Chauhan Cc: jani.nikula@intel.com, intel-gfx@lists.freedesktop.org, paulo.r.zanoni@intel.com, rodrigo.vivi@intel.com List-Id: intel-gfx@lists.freedesktop.org T24gVHVlLCBKdWwgMTAsIDIwMTggYXQgMDM6MTA6MTJQTSArMDUzMCwgTWFkaGF2IENoYXVoYW4g d3JvdGU6Cj4gVGhpcyBwYXRjaCBhZGRzIF9NTUlPX0RTSSBhbmQgX0RTSV9UUkFOUyBtYWNyb3Mg Zm9yIGFjY2Vzc2luZwo+IERTSSB0cmFuc2NvZGVyIHJlZ2lzdGVycy4KPiAKPiBDcmVkaXRzLXRv OiBKYW5pIE4KPiAKPiBDYzogSmFuaSBOaWt1bGEgPGphbmkubmlrdWxhQGludGVsLmNvbT4KPiBT aWduZWQtb2ZmLWJ5OiBNYWRoYXYgQ2hhdWhhbiA8bWFkaGF2LmNoYXVoYW5AaW50ZWwuY29tPgo+ IC0tLQo+ICBkcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oIHwgNSArKysrKwo+ICAxIGZp bGUgY2hhbmdlZCwgNSBpbnNlcnRpb25zKCspCj4gCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1 L2RybS9pOTE1L2k5MTVfcmVnLmggYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9pOTE1X3JlZy5oCj4g aW5kZXggMWQxM2JhOS4uNjJiYzc2ZSAxMDA2NDQKPiAtLS0gYS9kcml2ZXJzL2dwdS9kcm0vaTkx NS9pOTE1X3JlZy5oCj4gKysrIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9yZWcuaAo+IEBA IC05NTc2LDYgKzk1NzYsMTEgQEAgZW51bSBza2xfcG93ZXJfZ2F0ZSB7Cj4gICNkZWZpbmUgX01J UElfUE9SVChwb3J0LCBhLCBjKQkoKChwb3J0KSA9PSBQT1JUX0EpID8gYSA6IGMpCS8qIHBvcnRz IEEgYW5kIEMgb25seSAqLwo+ICAjZGVmaW5lIF9NTUlPX01JUEkocG9ydCwgYSwgYykJX01NSU8o X01JUElfUE9SVChwb3J0LCBhLCBjKSkKPiAgCj4gKy8qIGdlbjExIERTSSAqLwo+ICsjZGVmaW5l IF9EU0lfVFJBTlModGMsIGRzaTAsIGRzaTEpCSgoKHRjKSA9PSBUUkFOU0NPREVSX0RTSV8wKSA/ CVwKPiArCQkJCQkgKGRzaTApIDogKGRzaTEpKQoKX1BJUEUoKSBldGMuIHNob3VsZCByZXN1bHQg aW4gc2x1Z2h0bHkgYmV0dGVyIGNvZGUgSUlSQy4KCj4gKyNkZWZpbmUgX01NSU9fRFNJKHRjLCBk c2kwLCBkc2kxKQlfTU1JTyhfRFNJX1RSQU5TKHRjLCBkc2kwLCBkc2kxKSkKPiArCj4gICNkZWZp bmUgTUlQSU9fVFhFU0NfQ0xLX0RJVjEJCQlfTU1JTygweDE2MDAwNCkKPiAgI2RlZmluZSAgR0xL X1RYX0VTQ19DTEtfRElWMV9NQVNLCQkJMHgzRkYKPiAgI2RlZmluZSBNSVBJT19UWEVTQ19DTEtf RElWMgkJCV9NTUlPKDB4MTYwMDA4KQo+IC0tIAo+IDIuNy40Cj4gCj4gX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KPiBJbnRlbC1nZnggbWFpbGluZyBsaXN0 Cj4gSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwo+IGh0dHBzOi8vbGlzdHMuZnJlZWRl c2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50ZWwtZ2Z4CgotLSAKVmlsbGUgU3lyasOkbMOk CkludGVsCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCklu dGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRw czovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=