From mboxrd@z Thu Jan 1 00:00:00 1970 From: Maxime Ripard Date: Tue, 24 Jul 2018 10:40:10 +0200 Subject: [U-Boot] [PATCH v2.1 11/13] sunxi: add DRAM support to H6 In-Reply-To: <20180722221334.3679-1-icenowy@aosc.io> References: <20180721082032.39980-12-icenowy@aosc.io> <20180722221334.3679-1-icenowy@aosc.io> Message-ID: <20180724084010.rowebpigyvilxv4y@flea> List-Id: MIME-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit To: u-boot@lists.denx.de On Mon, Jul 23, 2018 at 06:13:34AM +0800, Icenowy Zheng wrote: > The Allwinner H6 SoC comes with a set of new DRAM controller+PHY combo. > Both the controller and the PHY seem to be originate from DesignWare, > and are similar to the ones in ZynqMP SoCs. > > This commit introduces an initial DRAM driver for H6, which contains > only LPDDR3 support. The currently known SBCs with H6 all come with > LPDDR3 memory, including Pine H64 and several Orange Pi's. > > The BSP DRAM initialization code is closed source and violates GPL. Code > in this commit is written by experimenting, referring the code/document > of other users of the IPs (mainly the ZynqMP, as it's the only found PHY > reference) and disassebling the BSP blob. > > Thanks for Jernej Skrabec for review and fix some issues in this driver > (including the most critical one which made it to work), and rewrite > some code from register dump! > > Signed-off-by: Icenowy Zheng Acked-by: Maxime Ripard Maxime -- Maxime Ripard, Bootlin (formerly Free Electrons) Embedded Linux and Kernel engineering https://bootlin.com -------------- next part -------------- A non-text attachment was scrubbed... Name: signature.asc Type: application/pgp-signature Size: 833 bytes Desc: not available URL: