diff for duplicates of <20180724135837.7a85fedc@xhacker.debian> diff --git a/a/1.txt b/N1/1.txt index a73a569..8d92d0d 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -53,7 +53,7 @@ move it to the board file. > > + #address-cells = <1>; > > + #size-cells = <0>; > > + -> > + cpu0: cpu at 0 { +> > + cpu0: cpu@0 { > > + compatible = "arm,cortex-a53", "arm,armv8"; > > + device_type = "cpu"; > > + reg = <0x0>; @@ -62,7 +62,7 @@ move it to the board file. > > + cpu-idle-states = <&CPU_SLEEP_0>; > > + }; > > + -> > + cpu1: cpu at 1 { +> > + cpu1: cpu@1 { > > + compatible = "arm,cortex-a53", "arm,armv8"; > > + device_type = "cpu"; > > + reg = <0x1>; @@ -71,7 +71,7 @@ move it to the board file. > > + cpu-idle-states = <&CPU_SLEEP_0>; > > + }; > > + -> > + cpu2: cpu at 2 { +> > + cpu2: cpu@2 { > > + compatible = "arm,cortex-a53", "arm,armv8"; > > + device_type = "cpu"; > > + reg = <0x2>; @@ -80,7 +80,7 @@ move it to the board file. > > + cpu-idle-states = <&CPU_SLEEP_0>; > > + }; > > + -> > + cpu3: cpu at 3 { +> > + cpu3: cpu@3 { > > + compatible = "arm,cortex-a53", "arm,armv8"; > > + device_type = "cpu"; > > + reg = <0x3>; @@ -143,13 +143,13 @@ reported by drivers/base/cacheinfo.c > > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > > + }; > > + -> > + soc at f7000000 { +> > + soc@f7000000 { > > + compatible = "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0 0 0xf7000000 0x1000000>; > > + -> > + gic: interrupt-controller at 901000 { +> > + gic: interrupt-controller@901000 { > > + compatible = "arm,gic-400"; > > + #interrupt-cells = <3>; > > + interrupt-controller; @@ -160,15 +160,15 @@ reported by drivers/base/cacheinfo.c > > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; > > + }; > > + -> > + apb at e80000 { +> > + apb@e80000 { > > + compatible = "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0 0xe80000 0x10000>; > > + -> > + uart0: uart at 0c00 { +> > + uart0: uart@0c00 { > -> serial at c00 +> serial@c00 will do in v2 diff --git a/a/content_digest b/N1/content_digest index cb3efe7..797f13b 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,10 +1,15 @@ "ref\020180713171712.05f58a74@xhacker.debian\0" "ref\020180713172626.5ca0e30f@xhacker.debian\0" "ref\020180720152117.GB26487@rob-hp-laptop\0" - "From\0Jisheng.Zhang@synaptics.com (Jisheng Zhang)\0" - "Subject\0[PATCH 3/3] arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC\0" + "From\0Jisheng Zhang <Jisheng.Zhang@synaptics.com>\0" + "Subject\0Re: [PATCH 3/3] arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC\0" "Date\0Tue, 24 Jul 2018 13:58:37 +0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Rob Herring <robh@kernel.org>\0" + "Cc\0Mark Rutland <mark.rutland@arm.com>" + devicetree@vger.kernel.org + linux-kernel@vger.kernel.org + linux-arm-kernel@lists.infradead.org + " Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" "\00:1\0" "b\0" "Hi Rob,\n" @@ -62,7 +67,7 @@ "> > +\t\t#address-cells = <1>;\n" "> > +\t\t#size-cells = <0>;\n" "> > +\n" - "> > +\t\tcpu0: cpu at 0 {\n" + "> > +\t\tcpu0: cpu@0 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "> > +\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\treg = <0x0>;\n" @@ -71,7 +76,7 @@ "> > +\t\t\tcpu-idle-states = <&CPU_SLEEP_0>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tcpu1: cpu at 1 {\n" + "> > +\t\tcpu1: cpu@1 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "> > +\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\treg = <0x1>;\n" @@ -80,7 +85,7 @@ "> > +\t\t\tcpu-idle-states = <&CPU_SLEEP_0>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tcpu2: cpu at 2 {\n" + "> > +\t\tcpu2: cpu@2 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "> > +\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\treg = <0x2>;\n" @@ -89,7 +94,7 @@ "> > +\t\t\tcpu-idle-states = <&CPU_SLEEP_0>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tcpu3: cpu at 3 {\n" + "> > +\t\tcpu3: cpu@3 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "> > +\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\treg = <0x3>;\n" @@ -152,13 +157,13 @@ "> > +\t\t\t <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;\n" "> > +\t};\n" "> > +\n" - "> > +\tsoc at f7000000 {\n" + "> > +\tsoc@f7000000 {\n" "> > +\t\tcompatible = \"simple-bus\";\n" "> > +\t\t#address-cells = <1>;\n" "> > +\t\t#size-cells = <1>;\n" "> > +\t\tranges = <0 0 0xf7000000 0x1000000>;\n" "> > +\n" - "> > +\t\tgic: interrupt-controller at 901000 {\n" + "> > +\t\tgic: interrupt-controller@901000 {\n" "> > +\t\t\tcompatible = \"arm,gic-400\";\n" "> > +\t\t\t#interrupt-cells = <3>;\n" "> > +\t\t\tinterrupt-controller;\n" @@ -169,18 +174,18 @@ "> > +\t\t\tinterrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tapb at e80000 {\n" + "> > +\t\tapb@e80000 {\n" "> > +\t\t\tcompatible = \"simple-bus\";\n" "> > +\t\t\t#address-cells = <1>;\n" "> > +\t\t\t#size-cells = <1>;\n" "> > +\t\t\tranges = <0 0xe80000 0x10000>;\n" "> > +\n" - "> > +\t\t\tuart0: uart at 0c00 { \n" + "> > +\t\t\tuart0: uart@0c00 { \n" "> \n" - "> serial at c00\n" + "> serial@c00\n" "\n" "will do in v2\n" "\n" Thanks a lot -7dea1e419bfec25f2c47a2534efe00a52a335c88c6145c3157175cea302955c3 +c5be96ffcd5b189d623d169357b13d837d5ad702a7b4de52a8e418bcd1e19025
diff --git a/a/1.txt b/N2/1.txt index a73a569..8d92d0d 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -53,7 +53,7 @@ move it to the board file. > > + #address-cells = <1>; > > + #size-cells = <0>; > > + -> > + cpu0: cpu at 0 { +> > + cpu0: cpu@0 { > > + compatible = "arm,cortex-a53", "arm,armv8"; > > + device_type = "cpu"; > > + reg = <0x0>; @@ -62,7 +62,7 @@ move it to the board file. > > + cpu-idle-states = <&CPU_SLEEP_0>; > > + }; > > + -> > + cpu1: cpu at 1 { +> > + cpu1: cpu@1 { > > + compatible = "arm,cortex-a53", "arm,armv8"; > > + device_type = "cpu"; > > + reg = <0x1>; @@ -71,7 +71,7 @@ move it to the board file. > > + cpu-idle-states = <&CPU_SLEEP_0>; > > + }; > > + -> > + cpu2: cpu at 2 { +> > + cpu2: cpu@2 { > > + compatible = "arm,cortex-a53", "arm,armv8"; > > + device_type = "cpu"; > > + reg = <0x2>; @@ -80,7 +80,7 @@ move it to the board file. > > + cpu-idle-states = <&CPU_SLEEP_0>; > > + }; > > + -> > + cpu3: cpu at 3 { +> > + cpu3: cpu@3 { > > + compatible = "arm,cortex-a53", "arm,armv8"; > > + device_type = "cpu"; > > + reg = <0x3>; @@ -143,13 +143,13 @@ reported by drivers/base/cacheinfo.c > > + <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>; > > + }; > > + -> > + soc at f7000000 { +> > + soc@f7000000 { > > + compatible = "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0 0 0xf7000000 0x1000000>; > > + -> > + gic: interrupt-controller at 901000 { +> > + gic: interrupt-controller@901000 { > > + compatible = "arm,gic-400"; > > + #interrupt-cells = <3>; > > + interrupt-controller; @@ -160,15 +160,15 @@ reported by drivers/base/cacheinfo.c > > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>; > > + }; > > + -> > + apb at e80000 { +> > + apb@e80000 { > > + compatible = "simple-bus"; > > + #address-cells = <1>; > > + #size-cells = <1>; > > + ranges = <0 0xe80000 0x10000>; > > + -> > + uart0: uart at 0c00 { +> > + uart0: uart@0c00 { > -> serial at c00 +> serial@c00 will do in v2 diff --git a/a/content_digest b/N2/content_digest index cb3efe7..131fed9 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,10 +1,15 @@ "ref\020180713171712.05f58a74@xhacker.debian\0" "ref\020180713172626.5ca0e30f@xhacker.debian\0" "ref\020180720152117.GB26487@rob-hp-laptop\0" - "From\0Jisheng.Zhang@synaptics.com (Jisheng Zhang)\0" - "Subject\0[PATCH 3/3] arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC\0" + "From\0Jisheng Zhang <Jisheng.Zhang@synaptics.com>\0" + "Subject\0Re: [PATCH 3/3] arm64: dts: synaptics: add dtsi file for Synaptics AS370 SoC\0" "Date\0Tue, 24 Jul 2018 13:58:37 +0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Rob Herring <robh@kernel.org>\0" + "Cc\0Mark Rutland <mark.rutland@arm.com>" + <devicetree@vger.kernel.org> + <linux-kernel@vger.kernel.org> + <linux-arm-kernel@lists.infradead.org> + " Sebastian Hesselbarth <sebastian.hesselbarth@gmail.com>\0" "\00:1\0" "b\0" "Hi Rob,\n" @@ -62,7 +67,7 @@ "> > +\t\t#address-cells = <1>;\n" "> > +\t\t#size-cells = <0>;\n" "> > +\n" - "> > +\t\tcpu0: cpu at 0 {\n" + "> > +\t\tcpu0: cpu@0 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "> > +\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\treg = <0x0>;\n" @@ -71,7 +76,7 @@ "> > +\t\t\tcpu-idle-states = <&CPU_SLEEP_0>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tcpu1: cpu at 1 {\n" + "> > +\t\tcpu1: cpu@1 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "> > +\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\treg = <0x1>;\n" @@ -80,7 +85,7 @@ "> > +\t\t\tcpu-idle-states = <&CPU_SLEEP_0>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tcpu2: cpu at 2 {\n" + "> > +\t\tcpu2: cpu@2 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "> > +\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\treg = <0x2>;\n" @@ -89,7 +94,7 @@ "> > +\t\t\tcpu-idle-states = <&CPU_SLEEP_0>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tcpu3: cpu at 3 {\n" + "> > +\t\tcpu3: cpu@3 {\n" "> > +\t\t\tcompatible = \"arm,cortex-a53\", \"arm,armv8\";\n" "> > +\t\t\tdevice_type = \"cpu\";\n" "> > +\t\t\treg = <0x3>;\n" @@ -152,13 +157,13 @@ "> > +\t\t\t <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;\n" "> > +\t};\n" "> > +\n" - "> > +\tsoc at f7000000 {\n" + "> > +\tsoc@f7000000 {\n" "> > +\t\tcompatible = \"simple-bus\";\n" "> > +\t\t#address-cells = <1>;\n" "> > +\t\t#size-cells = <1>;\n" "> > +\t\tranges = <0 0 0xf7000000 0x1000000>;\n" "> > +\n" - "> > +\t\tgic: interrupt-controller at 901000 {\n" + "> > +\t\tgic: interrupt-controller@901000 {\n" "> > +\t\t\tcompatible = \"arm,gic-400\";\n" "> > +\t\t\t#interrupt-cells = <3>;\n" "> > +\t\t\tinterrupt-controller;\n" @@ -169,18 +174,18 @@ "> > +\t\t\tinterrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;\n" "> > +\t\t};\n" "> > +\n" - "> > +\t\tapb at e80000 {\n" + "> > +\t\tapb@e80000 {\n" "> > +\t\t\tcompatible = \"simple-bus\";\n" "> > +\t\t\t#address-cells = <1>;\n" "> > +\t\t\t#size-cells = <1>;\n" "> > +\t\t\tranges = <0 0xe80000 0x10000>;\n" "> > +\n" - "> > +\t\t\tuart0: uart at 0c00 { \n" + "> > +\t\t\tuart0: uart@0c00 { \n" "> \n" - "> serial at c00\n" + "> serial@c00\n" "\n" "will do in v2\n" "\n" Thanks a lot -7dea1e419bfec25f2c47a2534efe00a52a335c88c6145c3157175cea302955c3 +6bf8f81d76e68cc912e7397e986c2667516e2c27ec995edd3ad952eaa7930222
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