All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <20180727094816.GM28088@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index 4ddc212..cce4360 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -6,15 +6,15 @@ I don't think so, given that we don't actually support PRI upstream.
 Will
 
 > On 2018/7/23 20:56, Shaokun Zhang wrote:
-> > From: Miao Zhong <zhongmiao-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
+> > From: Miao Zhong <zhongmiao@hisilicon.com>
 > > 
 > > When PRI queue occurs overflow, driver should update the OVACKFLG to
 > > the PRIQ consumer register, otherwise subsequent PRI requests will not
 > > be processed.
 > > 
-> > Cc: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>
-> > Cc: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> 
-> > Signed-off-by: Miao Zhong <zhongmiao-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>
+> > Cc: Will Deacon <will.deacon@arm.com>
+> > Cc: Robin Murphy <robin.murphy@arm.com> 
+> > Signed-off-by: Miao Zhong <zhongmiao@hisilicon.com>
 > > ---
 > >  drivers/iommu/arm-smmu-v3.c | 1 +
 > >  1 file changed, 1 insertion(+)
diff --git a/a/content_digest b/N1/content_digest
index 30f8187..8452da5 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,14 +1,9 @@
  "ref\01532350618-16486-1-git-send-email-zhangshaokun@hisilicon.com\0"
  "ref\0dfeaf347-afd4-b3f2-eb01-2781028371e8@hisilicon.com\0"
- "ref\0dfeaf347-afd4-b3f2-eb01-2781028371e8-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org\0"
- "From\0Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\0"
- "Subject\0Re: [PATCH] iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register\0"
+ "From\0will.deacon@arm.com (Will Deacon)\0"
+ "Subject\0[PATCH] iommu/arm-smmu-v3: sync the OVACKFLG to PRIQ consumer register\0"
  "Date\0Fri, 27 Jul 2018 10:48:17 +0100\0"
- "To\0Zhangshaokun <zhangshaokun-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\0"
- "Cc\0Miao Zhong <zhongmiao-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>"
-  iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org
-  Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org>
- " linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Fri, Jul 27, 2018 at 05:41:46PM +0800, Zhangshaokun wrote:\n"
@@ -19,15 +14,15 @@
  "Will\n"
  "\n"
  "> On 2018/7/23 20:56, Shaokun Zhang wrote:\n"
- "> > From: Miao Zhong <zhongmiao-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\n"
+ "> > From: Miao Zhong <zhongmiao@hisilicon.com>\n"
  "> > \n"
  "> > When PRI queue occurs overflow, driver should update the OVACKFLG to\n"
  "> > the PRIQ consumer register, otherwise subsequent PRI requests will not\n"
  "> > be processed.\n"
  "> > \n"
- "> > Cc: Will Deacon <will.deacon-5wv7dgnIgG8@public.gmane.org>\n"
- "> > Cc: Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> \n"
- "> > Signed-off-by: Miao Zhong <zhongmiao-C8/M+/jPZTeaMJb+Lgu22Q@public.gmane.org>\n"
+ "> > Cc: Will Deacon <will.deacon@arm.com>\n"
+ "> > Cc: Robin Murphy <robin.murphy@arm.com> \n"
+ "> > Signed-off-by: Miao Zhong <zhongmiao@hisilicon.com>\n"
  "> > ---\n"
  "> >  drivers/iommu/arm-smmu-v3.c | 1 +\n"
  "> >  1 file changed, 1 insertion(+)\n"
@@ -47,4 +42,4 @@
  "> > \n"
  >
 
-456fddaf367c89c5511d38d7a8cf8c48696098bd25f906d3ef4cefc68032012c
+701e760a1b69896f4f415bee48f070a26fcfa3c3619eb5087e8a6d14c2abbea8

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.