From mboxrd@z Thu Jan 1 00:00:00 1970 From: Miquel Raynal Subject: Re: [PATCH v3 06/23] thermal: armada: average over samples to avoid glitches Date: Sun, 29 Jul 2018 21:30:55 +0200 Message-ID: <20180729213055.2215bd53@xps13> References: <20180716144206.30985-1-miquel.raynal@bootlin.com> <20180716144206.30985-7-miquel.raynal@bootlin.com> <2ab1a1f6-e0c3-3eed-a088-9b04e88fce12@linaro.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: In-Reply-To: <2ab1a1f6-e0c3-3eed-a088-9b04e88fce12@linaro.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: Daniel Lezcano Cc: Mark Rutland , Andrew Lunn , Jason Cooper , Nadav Haklai , devicetree@vger.kernel.org, Antoine Tenart , Catalin Marinas , Gregory Clement , linux-pm@vger.kernel.org, Will Deacon , Maxime Chevallier , Eduardo Valentin , David Sniatkiwicz , Rob Herring , Thomas Petazzoni , Zhang Rui , linux-arm-kernel@lists.infradead.org, Sebastian Hesselbarth List-Id: linux-pm@vger.kernel.org SGkgRGFuaWVsLAoKRGFuaWVsIExlemNhbm8gPGRhbmllbC5sZXpjYW5vQGxpbmFyby5vcmc+IHdy b3RlIG9uIEZyaSwgMjcgSnVsIDIwMTgKMTg6Mjk6MDEgKzAyMDA6Cgo+IE9uIDE2LzA3LzIwMTgg MTY6NDEsIE1pcXVlbCBSYXluYWwgd3JvdGU6Cj4gPiBDb25maWd1cmUgdGhlIHNhbXBsZSBmcmVx dWVuY3kgYW5kIG51bWJlciBvZiBhdmVyYWdlZCBzYW1wbGVzLgo+ID4gCj4gPiBUaGlzIGlzIG5l ZWRlZCBmb3IgdHdvIHJlYXNvbnM6Cj4gPiAxLyBUbyBiZSBib290bG9hZGVyIGluZGVwZW5kZW50 Lgo+ID4gMi8gVG8gcHJlcGFyZSB0aGUgaW50cm9kdWN0aW9uIG9mIG11bHRpLXNlbnNvcnMgc3Vw cG9ydCBieSBwcmV2ZW50aW5nCj4gPiAgICBpbmNvbnNpc3RlbmNpZXMgd2hlbiByZWFkaW5nIHRl bXBlcmF0dXJlcyB0aGF0IGNvdWxkIGJlIGEgbWVhbiBvZgo+ID4gICAgc2FtcGxlcyB0b29rIGZy b20gZGlmZmVyZW50IHNlbnNvcnMuCj4gPiAKPiA+IFNpZ25lZC1vZmYtYnk6IE1pcXVlbCBSYXlu YWwgPG1pcXVlbC5yYXluYWxAYm9vdGxpbi5jb20+Cj4gPiAtLS0KPiA+ICBkcml2ZXJzL3RoZXJt YWwvYXJtYWRhX3RoZXJtYWwuYyB8IDI1ICsrKysrKysrKysrKysrKysrKysrKysrKysKPiA+ICAx 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IHN0YXRpYyBib29sIGFybWFkYV9pc192YWxpZChzdHJ1Y3QgYXJtYWRhX3RoZXJtYWxfcHJpdiAq cHJpdikKPiA+ICAgCj4gCj4gCgpUaGFua3MKTWlxdcOobAoKX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX18KbGludXgtYXJtLWtlcm5lbCBtYWlsaW5nIGxpc3QK bGludXgtYXJtLWtlcm5lbEBsaXN0cy5pbmZyYWRlYWQub3JnCmh0dHA6Ly9saXN0cy5pbmZyYWRl YWQub3JnL21haWxtYW4vbGlzdGluZm8vbGludXgtYXJtLWtlcm5lbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: miquel.raynal@bootlin.com (Miquel Raynal) Date: Sun, 29 Jul 2018 21:30:55 +0200 Subject: [PATCH v3 06/23] thermal: armada: average over samples to avoid glitches In-Reply-To: <2ab1a1f6-e0c3-3eed-a088-9b04e88fce12@linaro.org> References: <20180716144206.30985-1-miquel.raynal@bootlin.com> <20180716144206.30985-7-miquel.raynal@bootlin.com> <2ab1a1f6-e0c3-3eed-a088-9b04e88fce12@linaro.org> Message-ID: <20180729213055.2215bd53@xps13> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org Hi Daniel, Daniel Lezcano wrote on Fri, 27 Jul 2018 18:29:01 +0200: > On 16/07/2018 16:41, Miquel Raynal wrote: > > Configure the sample frequency and number of averaged samples. > > > > This is needed for two reasons: > > 1/ To be bootloader independent. > > 2/ To prepare the introduction of multi-sensors support by preventing > > inconsistencies when reading temperatures that could be a mean of > > samples took from different sensors. > > > > Signed-off-by: Miquel Raynal > > --- > > drivers/thermal/armada_thermal.c | 25 +++++++++++++++++++++++++ > > 1 file changed, 25 insertions(+) > > > > diff --git a/drivers/thermal/armada_thermal.c b/drivers/thermal/armada_thermal.c > > index 9291ea3ad2f7..1f9706d96a0d 100644 > > --- a/drivers/thermal/armada_thermal.c > > +++ b/drivers/thermal/armada_thermal.c > > @@ -54,7 +54,12 @@ > > #define CONTROL0_TSEN_START BIT(0) > > #define CONTROL0_TSEN_RESET BIT(1) > > #define CONTROL0_TSEN_ENABLE BIT(2) > > +#define CONTROL0_TSEN_AVG_BYPASS BIT(6) > > +#define CONTROL0_TSEN_OSR_SHIFT 24 > > +#define CONTROL0_TSEN_OSR_MAX 0x3 > > > > +#define CONTROL1_TSEN_AVG_SHIFT 0 > > Why shift by zero ? > I know some people do not like it, it's a matter of taste, as this IP registers documentation is a bit fuzzy, I wanted to make it clear that it was the first region in the CONTROL1 register. It's optimized out by the compiler anyway. > > > > +#define CONTROL1_TSEN_AVG_MASK 0x7 > > #define CONTROL1_EXT_TSEN_SW_RESET BIT(7) > > #define CONTROL1_EXT_TSEN_HW_RESETn BIT(8) > > > > @@ -194,6 +199,13 @@ static void armada_ap806_init(struct platform_device *pdev, > > reg = readl_relaxed(priv->control0); > > reg &= ~CONTROL0_TSEN_RESET; > > reg |= CONTROL0_TSEN_START | CONTROL0_TSEN_ENABLE; > > + > > + /* Sample every ~2ms */ > > + reg |= CONTROL0_TSEN_OSR_MAX << CONTROL0_TSEN_OSR_SHIFT; > > + > > + /* Enable average (2 samples by default) */ > > + reg &= ~CONTROL0_TSEN_AVG_BYPASS; > > + > > writel(reg, priv->control0); > > > > /* Wait the sensors to be valid or the core will warn the user */ > > @@ -203,7 +215,20 @@ static void armada_ap806_init(struct platform_device *pdev, > > static void armada_cp110_init(struct platform_device *pdev, > > struct armada_thermal_priv *priv) > > { > > + u32 reg; > > + > > armada380_init(pdev, priv); > > + > > + /* Sample every ~2ms */ > > + reg = readl_relaxed(priv->control0); > > + reg |= CONTROL0_TSEN_OSR_MAX << CONTROL0_TSEN_OSR_SHIFT; > > + writel(reg, priv->control0); > > + > > + /* Average the output value over 2^1 = 2 samples */ > > + reg = readl_relaxed(priv->control1); > > + reg &= ~CONTROL1_TSEN_AVG_MASK << CONTROL1_TSEN_AVG_SHIFT; > > + reg |= 1 << CONTROL1_TSEN_AVG_SHIFT; > > + writel(reg, priv->control1); > > } > > > > static bool armada_is_valid(struct armada_thermal_priv *priv) > > > > Thanks Miqu?l