From: Quentin Schulz <quentin.schulz@bootlin.com>
To: andrew@lunn.ch, f.fainelli@gmail.com, davem@davemloft.net
Cc: netdev@vger.kernel.org, alexandre.belloni@bootlin.com,
linux-kernel@vger.kernel.org, thomas.petazzoni@bootlin.com,
Quentin Schulz <quentin.schulz@bootlin.com>
Subject: [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits
Date: Mon, 30 Jul 2018 14:53:13 +0200 [thread overview]
Message-ID: <20180730125313.3405-1-quentin.schulz@bootlin.com> (raw)
The Extended Page Access is a 16-bit register, so change the page
parameter of vsc85xx_phy_page_set to a u16.
Signed-off-by: Quentin Schulz <quentin.schulz@bootlin.com>
---
drivers/net/phy/mscc.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
index 650c2667d523..84ca9ff40ae0 100644
--- a/drivers/net/phy/mscc.c
+++ b/drivers/net/phy/mscc.c
@@ -123,7 +123,7 @@ static const struct vsc8531_edge_rate_table edge_table[] = {
};
#endif /* CONFIG_OF_MDIO */
-static int vsc85xx_phy_page_set(struct phy_device *phydev, u8 page)
+static int vsc85xx_phy_page_set(struct phy_device *phydev, u16 page)
{
int rc;
--
2.17.1
next reply other threads:[~2018-07-30 12:53 UTC|newest]
Thread overview: 6+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-07-30 12:53 Quentin Schulz [this message]
2018-07-30 14:01 ` [PATCH net-next] net: phy: mscc: the extended page access register is 16 bits Andrew Lunn
2018-07-30 14:13 ` Alexandre Belloni
2018-07-30 16:43 ` David Miller
2018-07-30 16:53 ` Florian Fainelli
2018-07-31 6:43 ` Quentin Schulz
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