From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: "Souza, Jose" <jose.souza@intel.com>
Cc: "intel-gfx@lists.freedesktop.org" <intel-gfx@lists.freedesktop.org>
Subject: Re: [PATCH] drm/i915/cfl: Add a new CFL PCI ID.
Date: Wed, 8 Aug 2018 22:46:25 -0700 [thread overview]
Message-ID: <20180809054625.GA3343@intel.com> (raw)
In-Reply-To: <5aecbdef082f251d392f6a91db366e5747130dc0.camel@intel.com>
On Fri, Aug 03, 2018 at 04:40:56PM -0700, Souza, Jose wrote:
> On Fri, 2018-08-03 at 16:27 -0700, Rodrigo Vivi wrote:
> > One more CFL ID added to spec.
> >
>
> Reviewed-by: José Roberto de Souza <jose.souza@intel.com>
thanks, pushed... and patches to the rest of stack propagated.
>
> > Cc: José Roberto de Souza <jose.souza@intel.com>
> > Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
> > ---
> > include/drm/i915_pciids.h | 1 +
> > 1 file changed, 1 insertion(+)
> >
> > diff --git a/include/drm/i915_pciids.h b/include/drm/i915_pciids.h
> > index fbf5cfc9b352..fd965ffbb92e 100644
> > --- a/include/drm/i915_pciids.h
> > +++ b/include/drm/i915_pciids.h
> > @@ -386,6 +386,7 @@
> > INTEL_VGA_DEVICE(0x3E91, info), /* SRV GT2 */ \
> > INTEL_VGA_DEVICE(0x3E92, info), /* SRV GT2 */ \
> > INTEL_VGA_DEVICE(0x3E96, info), /* SRV GT2 */ \
> > + INTEL_VGA_DEVICE(0x3E98, info), /* SRV GT2 */ \
> > INTEL_VGA_DEVICE(0x3E9A, info) /* SRV GT2 */
> >
> > /* CFL H */
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next prev parent reply other threads:[~2018-08-09 5:46 UTC|newest]
Thread overview: 7+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-03 23:27 [PATCH] drm/i915/cfl: Add a new CFL PCI ID Rodrigo Vivi
2018-08-03 23:40 ` Souza, Jose
2018-08-09 5:46 ` Rodrigo Vivi [this message]
2018-08-04 0:20 ` ✓ Fi.CI.BAT: success for " Patchwork
2018-08-04 1:29 ` ✓ Fi.CI.IGT: " Patchwork
-- strict thread matches above, loose matches on Subject: below --
2019-08-20 3:14 [PATCH] " wan.fahim.asqalanix.wan.yusof
2019-08-20 16:21 ` Greg KH
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