From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v9,3/4] dmaengine: fsl-edma: fix macros From: Angelo Dureghello Message-Id: <20180811112649.20752-3-angelo@sysam.it> Date: Sat, 11 Aug 2018 13:26:48 +0200 To: vinod.koul@linaro.org Cc: dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-m68k@vger.kernel.org, stefan@agner.ch, krzk@kernel.org, Angelo Dureghello List-ID: VGhpcyBwYXRjaCBmaXhlcyBtYWNyb3MgdG8gdXNlIEJJVCgpIGFuZCBHRU5NQVNLKCksIHJlbW92 aW5nCmFsc28gc29tZSB1bm5lZWRlZC4KClNpZ25lZC1vZmYtYnk6IEFuZ2VsbyBEdXJlZ2hlbGxv IDxhbmdlbG9Ac3lzYW0uaXQ+Ci0tLQpDaGFuZ2VzIGZvciB2OToKLSB0aGlzIHBhdGNoICgzLzQp IGhhcyBqdXN0IGJlZW4gYWRkZWQuCi0tLQogZHJpdmVycy9kbWEvZnNsLWVkbWEtY29tbW9uLmgg fCA1MCArKysrKysrKysrKysrKystLS0tLS0tLS0tLS0tLS0tLS0tLQogMSBmaWxlIGNoYW5nZWQs IDIyIGluc2VydGlvbnMoKyksIDI4IGRlbGV0aW9ucygtKQoKZGlmZiAtLWdpdCBhL2RyaXZlcnMv ZG1hL2ZzbC1lZG1hLWNvbW1vbi5oIGIvZHJpdmVycy9kbWEvZnNsLWVkbWEtY29tbW9uLmgKaW5k ZXggYjJlZTg5ZWE4OTVhLi5hNmY1Yjk5ZWU5NWYgMTAwNjQ0Ci0tLSBhL2RyaXZlcnMvZG1hL2Zz bC1lZG1hLWNvbW1vbi5oCisrKyBiL2RyaXZlcnMvZG1hL2ZzbC1lZG1hLWNvbW1vbi5oCkBAIC0x OCwzNCArMTgsMjggQEAKICNkZWZpbmUgRURNQV9DUl9FQ1gJCUJJVCgxNikKICNkZWZpbmUgRURN QV9DUl9DWAkJQklUKDE3KQogCi0jZGVmaW5lIEVETUFfU0VFSV9TRUVJKHgpCSgoeCkgJiAweDFG KQotI2RlZmluZSBFRE1BX0NFRUlfQ0VFSSh4KQkoKHgpICYgMHgxRikKLSNkZWZpbmUgRURNQV9D SU5UX0NJTlQoeCkJKCh4KSAmIDB4MUYpCi0jZGVmaW5lIEVETUFfQ0VSUl9DRVJSKHgpCSgoeCkg JiAweDFGKQotCi0jZGVmaW5lIEVETUFfVENEX0FUVFJfRFNJWkUoeCkJCSgoKHgpICYgMHgwMDA3 KSkKLSNkZWZpbmUgRURNQV9UQ0RfQVRUUl9ETU9EKHgpCQkoKCh4KSAmIDB4MDAxRikgPDwgMykK LSNkZWZpbmUgRURNQV9UQ0RfQVRUUl9TU0laRSh4KQkJKCgoeCkgJiAweDAwMDcpIDw8IDgpCi0j ZGVmaW5lIEVETUFfVENEX0FUVFJfU01PRCh4KQkJKCgoeCkgJiAweDAwMUYpIDw8IDExKQotI2Rl ZmluZSBFRE1BX1RDRF9BVFRSX1NTSVpFXzhCSVQJKDB4MDAwMCkKLSNkZWZpbmUgRURNQV9UQ0Rf QVRUUl9TU0laRV8xNkJJVAkoMHgwMTAwKQotI2RlZmluZSBFRE1BX1RDRF9BVFRSX1NTSVpFXzMy QklUCSgweDAyMDApCi0jZGVmaW5lIEVETUFfVENEX0FUVFJfU1NJWkVfNjRCSVQJKDB4MDMwMCkK LSNkZWZpbmUgRURNQV9UQ0RfQVRUUl9TU0laRV8zMkJZVEUJKDB4MDUwMCkKLSNkZWZpbmUgRURN QV9UQ0RfQVRUUl9EU0laRV84QklUCSgweDAwMDApCi0jZGVmaW5lIEVETUFfVENEX0FUVFJfRFNJ WkVfMTZCSVQJKDB4MDAwMSkKLSNkZWZpbmUgRURNQV9UQ0RfQVRUUl9EU0laRV8zMkJJVAkoMHgw MDAyKQotI2RlZmluZSBFRE1BX1RDRF9BVFRSX0RTSVpFXzY0QklUCSgweDAwMDMpCi0jZGVmaW5l IEVETUFfVENEX0FUVFJfRFNJWkVfMzJCWVRFCSgweDAwMDUpCi0KLSNkZWZpbmUgRURNQV9UQ0Rf U09GRl9TT0ZGKHgpCQkoeCkKLSNkZWZpbmUgRURNQV9UQ0RfTkJZVEVTX05CWVRFUyh4KQkoeCkK LSNkZWZpbmUgRURNQV9UQ0RfU0xBU1RfU0xBU1QoeCkJCSh4KQotI2RlZmluZSBFRE1BX1RDRF9E QUREUl9EQUREUih4KQkJKHgpCi0jZGVmaW5lIEVETUFfVENEX0NJVEVSX0NJVEVSKHgpCQkoKHgp ICYgMHg3RkZGKQotI2RlZmluZSBFRE1BX1RDRF9ET0ZGX0RPRkYoeCkJCSh4KQotI2RlZmluZSBF RE1BX1RDRF9ETEFTVF9TR0FfRExBU1RfU0dBKHgpCSh4KQotI2RlZmluZSBFRE1BX1RDRF9CSVRF Ul9CSVRFUih4KQkJKCh4KSAmIDB4N0ZGRikKKyNkZWZpbmUgRURNQV9TRUVJX1NFRUkoeCkJKCh4 KSAmIEdFTk1BU0soNCwgMCkpCisjZGVmaW5lIEVETUFfQ0VFSV9DRUVJKHgpCSgoeCkgJiBHRU5N QVNLKDQsIDApKQorI2RlZmluZSBFRE1BX0NJTlRfQ0lOVCh4KQkoKHgpICYgR0VOTUFTSyg0LCAw KSkKKyNkZWZpbmUgRURNQV9DRVJSX0NFUlIoeCkJKCh4KSAmIEdFTk1BU0soNCwgMCkpCisKKyNk ZWZpbmUgRURNQV9UQ0RfQVRUUl9EU0laRSh4KQkJKCgoeCkgJiBHRU5NQVNLKDIsIDApKSkKKyNk ZWZpbmUgRURNQV9UQ0RfQVRUUl9ETU9EKHgpCQkoKCh4KSAmIEdFTk1BU0soNCwgMCkpIDw8IDMp CisjZGVmaW5lIEVETUFfVENEX0FUVFJfU1NJWkUoeCkJCSgoKHgpICYgR0VOTUFTSygyLCAwKSkg PDwgOCkKKyNkZWZpbmUgRURNQV9UQ0RfQVRUUl9TTU9EKHgpCQkoKCh4KSAmIEdFTk1BU0soNCwg MCkpIDw8IDExKQorI2RlZmluZSBFRE1BX1RDRF9BVFRSX0RTSVpFXzhCSVQJMAorI2RlZmluZSBF RE1BX1RDRF9BVFRSX0RTSVpFXzE2QklUCUJJVCgwKQorI2RlZmluZSBFRE1BX1RDRF9BVFRSX0RT SVpFXzMyQklUCUJJVCgxKQorI2RlZmluZSBFRE1BX1RDRF9BVFRSX0RTSVpFXzY0QklUCShCSVQo MCkgfCBCSVQoMSkpCisjZGVmaW5lIEVETUFfVENEX0FUVFJfRFNJWkVfMzJCWVRFCShCSVQoMykg fCBCSVQoMCkpCisjZGVmaW5lIEVETUFfVENEX0FUVFJfU1NJWkVfOEJJVAkwCisjZGVmaW5lIEVE TUFfVENEX0FUVFJfU1NJWkVfMTZCSVQJKEVETUFfVENEX0FUVFJfRFNJWkVfMTZCSVQgPDwgOCkK KyNkZWZpbmUgRURNQV9UQ0RfQVRUUl9TU0laRV8zMkJJVAkoRURNQV9UQ0RfQVRUUl9EU0laRV8z MkJJVCA8PCA4KQorI2RlZmluZSBFRE1BX1RDRF9BVFRSX1NTSVpFXzY0QklUCShFRE1BX1RDRF9B VFRSX0RTSVpFXzY0QklUIDw8IDgpCisjZGVmaW5lIEVETUFfVENEX0FUVFJfU1NJWkVfMzJCWVRF CShFRE1BX1RDRF9BVFRSX0RTSVpFXzMyQllURSA8PCA4KQorCisjZGVmaW5lIEVETUFfVENEX0NJ VEVSX0NJVEVSKHgpCQkoKHgpICYgR0VOTUFTSygxNCwgMCkpCisjZGVmaW5lIEVETUFfVENEX0JJ VEVSX0JJVEVSKHgpCQkoKHgpICYgR0VOTUFTSygxNCwgMCkpCiAKICNkZWZpbmUgRURNQV9UQ0Rf Q1NSX1NUQVJUCQlCSVQoMCkKICNkZWZpbmUgRURNQV9UQ0RfQ1NSX0lOVF9NQUpPUgkJQklUKDEp Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: Angelo Dureghello Subject: [PATCH v9 3/4] dmaengine: fsl-edma: fix macros Date: Sat, 11 Aug 2018 13:26:48 +0200 Message-ID: <20180811112649.20752-3-angelo@sysam.it> References: <20180811112649.20752-1-angelo@sysam.it> Mime-Version: 1.0 Content-Type: text/plain; charset="us-ascii" Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <20180811112649.20752-1-angelo@sysam.it> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+linux-arm-kernel=m.gmane.org@lists.infradead.org To: vinod.koul@linaro.org Cc: linux-m68k@vger.kernel.org, Angelo Dureghello , krzk@kernel.org, stefan@agner.ch, dmaengine@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: linux-m68k@vger.kernel.org This patch fixes macros to use BIT() and GENMASK(), removing also some unneeded. Signed-off-by: Angelo Dureghello --- Changes for v9: - this patch (3/4) has just been added. --- drivers/dma/fsl-edma-common.h | 50 +++++++++++++++-------------------- 1 file changed, 22 insertions(+), 28 deletions(-) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index b2ee89ea895a..a6f5b99ee95f 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -18,34 +18,28 @@ #define EDMA_CR_ECX BIT(16) #define EDMA_CR_CX BIT(17) -#define EDMA_SEEI_SEEI(x) ((x) & 0x1F) -#define EDMA_CEEI_CEEI(x) ((x) & 0x1F) -#define EDMA_CINT_CINT(x) ((x) & 0x1F) -#define EDMA_CERR_CERR(x) ((x) & 0x1F) - -#define EDMA_TCD_ATTR_DSIZE(x) (((x) & 0x0007)) -#define EDMA_TCD_ATTR_DMOD(x) (((x) & 0x001F) << 3) -#define EDMA_TCD_ATTR_SSIZE(x) (((x) & 0x0007) << 8) -#define EDMA_TCD_ATTR_SMOD(x) (((x) & 0x001F) << 11) -#define EDMA_TCD_ATTR_SSIZE_8BIT (0x0000) -#define EDMA_TCD_ATTR_SSIZE_16BIT (0x0100) -#define EDMA_TCD_ATTR_SSIZE_32BIT (0x0200) -#define EDMA_TCD_ATTR_SSIZE_64BIT (0x0300) -#define EDMA_TCD_ATTR_SSIZE_32BYTE (0x0500) -#define EDMA_TCD_ATTR_DSIZE_8BIT (0x0000) -#define EDMA_TCD_ATTR_DSIZE_16BIT (0x0001) -#define EDMA_TCD_ATTR_DSIZE_32BIT (0x0002) -#define EDMA_TCD_ATTR_DSIZE_64BIT (0x0003) -#define EDMA_TCD_ATTR_DSIZE_32BYTE (0x0005) - -#define EDMA_TCD_SOFF_SOFF(x) (x) -#define EDMA_TCD_NBYTES_NBYTES(x) (x) -#define EDMA_TCD_SLAST_SLAST(x) (x) -#define EDMA_TCD_DADDR_DADDR(x) (x) -#define EDMA_TCD_CITER_CITER(x) ((x) & 0x7FFF) -#define EDMA_TCD_DOFF_DOFF(x) (x) -#define EDMA_TCD_DLAST_SGA_DLAST_SGA(x) (x) -#define EDMA_TCD_BITER_BITER(x) ((x) & 0x7FFF) +#define EDMA_SEEI_SEEI(x) ((x) & GENMASK(4, 0)) +#define EDMA_CEEI_CEEI(x) ((x) & GENMASK(4, 0)) +#define EDMA_CINT_CINT(x) ((x) & GENMASK(4, 0)) +#define EDMA_CERR_CERR(x) ((x) & GENMASK(4, 0)) + +#define EDMA_TCD_ATTR_DSIZE(x) (((x) & GENMASK(2, 0))) +#define EDMA_TCD_ATTR_DMOD(x) (((x) & GENMASK(4, 0)) << 3) +#define EDMA_TCD_ATTR_SSIZE(x) (((x) & GENMASK(2, 0)) << 8) +#define EDMA_TCD_ATTR_SMOD(x) (((x) & GENMASK(4, 0)) << 11) +#define EDMA_TCD_ATTR_DSIZE_8BIT 0 +#define EDMA_TCD_ATTR_DSIZE_16BIT BIT(0) +#define EDMA_TCD_ATTR_DSIZE_32BIT BIT(1) +#define EDMA_TCD_ATTR_DSIZE_64BIT (BIT(0) | BIT(1)) +#define EDMA_TCD_ATTR_DSIZE_32BYTE (BIT(3) | BIT(0)) +#define EDMA_TCD_ATTR_SSIZE_8BIT 0 +#define EDMA_TCD_ATTR_SSIZE_16BIT (EDMA_TCD_ATTR_DSIZE_16BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_32BIT (EDMA_TCD_ATTR_DSIZE_32BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_64BIT (EDMA_TCD_ATTR_DSIZE_64BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_32BYTE (EDMA_TCD_ATTR_DSIZE_32BYTE << 8) + +#define EDMA_TCD_CITER_CITER(x) ((x) & GENMASK(14, 0)) +#define EDMA_TCD_BITER_BITER(x) ((x) & GENMASK(14, 0)) #define EDMA_TCD_CSR_START BIT(0) #define EDMA_TCD_CSR_INT_MAJOR BIT(1) -- 2.18.0 From mboxrd@z Thu Jan 1 00:00:00 1970 From: angelo@sysam.it (Angelo Dureghello) Date: Sat, 11 Aug 2018 13:26:48 +0200 Subject: [PATCH v9 3/4] dmaengine: fsl-edma: fix macros In-Reply-To: <20180811112649.20752-1-angelo@sysam.it> References: <20180811112649.20752-1-angelo@sysam.it> Message-ID: <20180811112649.20752-3-angelo@sysam.it> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org This patch fixes macros to use BIT() and GENMASK(), removing also some unneeded. Signed-off-by: Angelo Dureghello --- Changes for v9: - this patch (3/4) has just been added. --- drivers/dma/fsl-edma-common.h | 50 +++++++++++++++-------------------- 1 file changed, 22 insertions(+), 28 deletions(-) diff --git a/drivers/dma/fsl-edma-common.h b/drivers/dma/fsl-edma-common.h index b2ee89ea895a..a6f5b99ee95f 100644 --- a/drivers/dma/fsl-edma-common.h +++ b/drivers/dma/fsl-edma-common.h @@ -18,34 +18,28 @@ #define EDMA_CR_ECX BIT(16) #define EDMA_CR_CX BIT(17) -#define EDMA_SEEI_SEEI(x) ((x) & 0x1F) -#define EDMA_CEEI_CEEI(x) ((x) & 0x1F) -#define EDMA_CINT_CINT(x) ((x) & 0x1F) -#define EDMA_CERR_CERR(x) ((x) & 0x1F) - -#define EDMA_TCD_ATTR_DSIZE(x) (((x) & 0x0007)) -#define EDMA_TCD_ATTR_DMOD(x) (((x) & 0x001F) << 3) -#define EDMA_TCD_ATTR_SSIZE(x) (((x) & 0x0007) << 8) -#define EDMA_TCD_ATTR_SMOD(x) (((x) & 0x001F) << 11) -#define EDMA_TCD_ATTR_SSIZE_8BIT (0x0000) -#define EDMA_TCD_ATTR_SSIZE_16BIT (0x0100) -#define EDMA_TCD_ATTR_SSIZE_32BIT (0x0200) -#define EDMA_TCD_ATTR_SSIZE_64BIT (0x0300) -#define EDMA_TCD_ATTR_SSIZE_32BYTE (0x0500) -#define EDMA_TCD_ATTR_DSIZE_8BIT (0x0000) -#define EDMA_TCD_ATTR_DSIZE_16BIT (0x0001) -#define EDMA_TCD_ATTR_DSIZE_32BIT (0x0002) -#define EDMA_TCD_ATTR_DSIZE_64BIT (0x0003) -#define EDMA_TCD_ATTR_DSIZE_32BYTE (0x0005) - -#define EDMA_TCD_SOFF_SOFF(x) (x) -#define EDMA_TCD_NBYTES_NBYTES(x) (x) -#define EDMA_TCD_SLAST_SLAST(x) (x) -#define EDMA_TCD_DADDR_DADDR(x) (x) -#define EDMA_TCD_CITER_CITER(x) ((x) & 0x7FFF) -#define EDMA_TCD_DOFF_DOFF(x) (x) -#define EDMA_TCD_DLAST_SGA_DLAST_SGA(x) (x) -#define EDMA_TCD_BITER_BITER(x) ((x) & 0x7FFF) +#define EDMA_SEEI_SEEI(x) ((x) & GENMASK(4, 0)) +#define EDMA_CEEI_CEEI(x) ((x) & GENMASK(4, 0)) +#define EDMA_CINT_CINT(x) ((x) & GENMASK(4, 0)) +#define EDMA_CERR_CERR(x) ((x) & GENMASK(4, 0)) + +#define EDMA_TCD_ATTR_DSIZE(x) (((x) & GENMASK(2, 0))) +#define EDMA_TCD_ATTR_DMOD(x) (((x) & GENMASK(4, 0)) << 3) +#define EDMA_TCD_ATTR_SSIZE(x) (((x) & GENMASK(2, 0)) << 8) +#define EDMA_TCD_ATTR_SMOD(x) (((x) & GENMASK(4, 0)) << 11) +#define EDMA_TCD_ATTR_DSIZE_8BIT 0 +#define EDMA_TCD_ATTR_DSIZE_16BIT BIT(0) +#define EDMA_TCD_ATTR_DSIZE_32BIT BIT(1) +#define EDMA_TCD_ATTR_DSIZE_64BIT (BIT(0) | BIT(1)) +#define EDMA_TCD_ATTR_DSIZE_32BYTE (BIT(3) | BIT(0)) +#define EDMA_TCD_ATTR_SSIZE_8BIT 0 +#define EDMA_TCD_ATTR_SSIZE_16BIT (EDMA_TCD_ATTR_DSIZE_16BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_32BIT (EDMA_TCD_ATTR_DSIZE_32BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_64BIT (EDMA_TCD_ATTR_DSIZE_64BIT << 8) +#define EDMA_TCD_ATTR_SSIZE_32BYTE (EDMA_TCD_ATTR_DSIZE_32BYTE << 8) + +#define EDMA_TCD_CITER_CITER(x) ((x) & GENMASK(14, 0)) +#define EDMA_TCD_BITER_BITER(x) ((x) & GENMASK(14, 0)) #define EDMA_TCD_CSR_START BIT(0) #define EDMA_TCD_CSR_INT_MAJOR BIT(1) -- 2.18.0