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diff for duplicates of <20180811162549.12312-1-ctatlor97@gmail.com>

diff --git a/a/1.txt b/N1/1.txt
index 8addba1..d4002aa 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -99,7 +99,7 @@ index 000000000000..512792c23369
 +};
 +
 +&soc {
-+	serial@c170000 {
++	serial at c170000 {
 +		status = "okay";
 +		pinctrl-names = "default";
 +		pinctrl-0 = <&blsp1_uart1_default>;
@@ -140,7 +140,7 @@ index 000000000000..8a544979b7c0
 +		#address-cells = <2>;
 +		#size-cells = <0>;
 +
-+		CPU0: cpu@100 {
++		CPU0: cpu at 100 {
 +			device_type = "cpu";
 +			compatible = "arm,armv8";
 +			reg = <0x0 0x100>;
@@ -159,7 +159,7 @@ index 000000000000..8a544979b7c0
 +			};
 +		};
 +
-+		CPU1: cpu@101 {
++		CPU1: cpu at 101 {
 +			device_type = "cpu";
 +			compatible = "arm,armv8";
 +			reg = <0x0 0x101>;
@@ -174,7 +174,7 @@ index 000000000000..8a544979b7c0
 +			};
 +		};
 +
-+		CPU2: cpu@102 {
++		CPU2: cpu at 102 {
 +			device_type = "cpu";
 +			compatible = "arm,armv8";
 +			reg = <0x0 0x102>;
@@ -189,7 +189,7 @@ index 000000000000..8a544979b7c0
 +			};
 +		};
 +
-+		CPU3: cpu@103 {
++		CPU3: cpu at 103 {
 +			device_type = "cpu";
 +			compatible = "arm,armv8";
 +			reg = <0x0 0x103>;
@@ -204,7 +204,7 @@ index 000000000000..8a544979b7c0
 +			};
 +		};
 +
-+		CPU4: cpu@0 {
++		CPU4: cpu at 0 {
 +			device_type = "cpu";
 +			compatible = "arm,armv8";
 +			reg = <0x0 0x0>;
@@ -223,7 +223,7 @@ index 000000000000..8a544979b7c0
 +			};
 +		};
 +
-+		CPU5: cpu@1 {
++		CPU5: cpu at 1 {
 +			device_type = "cpu";
 +			compatible = "arm,armv8";
 +			reg = <0x0 0x1>;
@@ -238,7 +238,7 @@ index 000000000000..8a544979b7c0
 +			};
 +		};
 +
-+		CPU6: cpu@2 {
++		CPU6: cpu at 2 {
 +			device_type = "cpu";
 +			compatible = "arm,armv8";
 +			reg = <0x0 0x2>;
@@ -253,7 +253,7 @@ index 000000000000..8a544979b7c0
 +			};
 +		};
 +
-+		CPU7: cpu@3 {
++		CPU7: cpu at 3 {
 +			device_type = "cpu";
 +			compatible = "arm,armv8";
 +			reg = <0x0 0x3>;
@@ -359,7 +359,7 @@ index 000000000000..8a544979b7c0
 +		ranges = <0 0 0 0xffffffff>;
 +		compatible = "simple-bus";
 +
-+		intc: interrupt-controller@17a00000 {
++		intc: interrupt-controller at 17a00000 {
 +			compatible = "arm,gic-v3";
 +			reg = <0x17a00000 0x10000>,
 +			      <0x17b00000 0x100000>;
@@ -373,7 +373,7 @@ index 000000000000..8a544979b7c0
 +			interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;
 +		};
 +
-+		gcc: clock-controller@100000 {
++		gcc: clock-controller at 100000 {
 +			compatible = "qcom,gcc-sdm660";
 +			#clock-cells = <1>;
 +			#reset-cells = <1>;
@@ -381,7 +381,7 @@ index 000000000000..8a544979b7c0
 +			reg = <0x100000 0x94000>;
 +		};
 +
-+		tlmm: pinctrl@3000000 {
++		tlmm: pinctrl at 3000000 {
 +			compatible = "qcom,sdm660-pinctrl";
 +			reg = <0x3000000 0xc00000>;
 +			interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;
@@ -391,7 +391,7 @@ index 000000000000..8a544979b7c0
 +			#interrupt-cells = <2>;
 +		};
 +
-+		blsp1_uart1: serial@c170000 {
++		blsp1_uart1: serial at c170000 {
 +			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 +			reg = <0xc170000 0x1000>;
 +			interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
@@ -401,14 +401,14 @@ index 000000000000..8a544979b7c0
 +			status = "disabled";
 +		};
 +
-+		timer@17920000 {
++		timer at 17920000 {
 +			#address-cells = <1>;
 +			#size-cells = <1>;
 +			ranges;
 +			compatible = "arm,armv7-timer-mem";
 +			reg = <0x17920000 0x1000>;
 +
-+			frame@17921000 {
++			frame at 17921000 {
 +				frame-number = <0>;
 +				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
 +					     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
@@ -416,42 +416,42 @@ index 000000000000..8a544979b7c0
 +				      <0x17922000 0x1000>;
 +			};
 +
-+			frame@17923000 {
++			frame at 17923000 {
 +				frame-number = <1>;
 +				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 +				reg = <0x17923000 0x1000>;
 +				status = "disabled";
 +			};
 +
-+			frame@17924000 {
++			frame at 17924000 {
 +				frame-number = <2>;
 +				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 +				reg = <0x17924000 0x1000>;
 +				status = "disabled";
 +			};
 +
-+			frame@17925000 {
++			frame at 17925000 {
 +				frame-number = <3>;
 +				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 +				reg = <0x17925000 0x1000>;
 +				status = "disabled";
 +			};
 +
-+			frame@17926000 {
++			frame at 17926000 {
 +				frame-number = <4>;
 +				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 +				reg = <0x17926000 0x1000>;
 +				status = "disabled";
 +			};
 +
-+			frame@17927000 {
++			frame at 17927000 {
 +				frame-number = <5>;
 +				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 +				reg = <0x17927000 0x1000>;
 +				status = "disabled";
 +			};
 +
-+			frame@17928000 {
++			frame at 17928000 {
 +				frame-number = <6>;
 +				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 +				reg = <0x17928000 0x1000>;
@@ -459,7 +459,7 @@ index 000000000000..8a544979b7c0
 +			};
 +		};
 +
-+		spmi_bus: qcom,spmi@800f000 {
++		spmi_bus: qcom,spmi at 800f000 {
 +			compatible = "qcom,spmi-pmic-arb";
 +			reg =	<0x800f000 0x1000>,
 +				<0x8400000 0x1000000>,
@@ -478,12 +478,12 @@ index 000000000000..8a544979b7c0
 +			cell-index = <0>;
 +		};
 +
-+		rpm_msg_ram: memory@778000 {
++		rpm_msg_ram: memory at 778000 {
 +			compatible = "qcom,rpm-msg-ram";
 +			reg = <0x778000 0x7000>;
 +		};
 +
-+		apcs_glb: mailbox@17911000 {
++		apcs_glb: mailbox at 17911000 {
 +			compatible = "qcom,msm8998-apcs-hmss-global";
 +			reg = <0x17911000 0x1000>;
 +
diff --git a/a/content_digest b/N1/content_digest
index 49876f7..dc6148c 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,18 +1,7 @@
- "From\0Craig Tatlor <ctatlor97@gmail.com>\0"
+ "From\0ctatlor97@gmail.com (Craig Tatlor)\0"
  "Subject\0[PATCH] arm64: dts: sdm630 SoC and Sony Pioneer (Xperia XA2) support\0"
  "Date\0Sat, 11 Aug 2018 17:25:47 +0100\0"
- "Cc\0ctatlor97@gmail.com"
-  linux-arm-msm@vger.kernel.org
-  Andy Gross <andy.gross@linaro.org>
-  David Brown <david.brown@linaro.org>
-  Rob Herring <robh+dt@kernel.org>
-  Mark Rutland <mark.rutland@arm.com>
-  Catalin Marinas <catalin.marinas@arm.com>
-  Will Deacon <will.deacon@arm.com>
-  linux-soc@vger.kernel.org
-  devicetree@vger.kernel.org
-  linux-arm-kernel@lists.infradead.org
- " linux-kernel@vger.kernel.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "Initial device tree support for Qualcomm SDM630 SoC and\n"
@@ -116,7 +105,7 @@
  "+};\n"
  "+\n"
  "+&soc {\n"
- "+\tserial@c170000 {\n"
+ "+\tserial at c170000 {\n"
  "+\t\tstatus = \"okay\";\n"
  "+\t\tpinctrl-names = \"default\";\n"
  "+\t\tpinctrl-0 = <&blsp1_uart1_default>;\n"
@@ -157,7 +146,7 @@
  "+\t\t#address-cells = <2>;\n"
  "+\t\t#size-cells = <0>;\n"
  "+\n"
- "+\t\tCPU0: cpu@100 {\n"
+ "+\t\tCPU0: cpu at 100 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,armv8\";\n"
  "+\t\t\treg = <0x0 0x100>;\n"
@@ -176,7 +165,7 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tCPU1: cpu@101 {\n"
+ "+\t\tCPU1: cpu at 101 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,armv8\";\n"
  "+\t\t\treg = <0x0 0x101>;\n"
@@ -191,7 +180,7 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tCPU2: cpu@102 {\n"
+ "+\t\tCPU2: cpu at 102 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,armv8\";\n"
  "+\t\t\treg = <0x0 0x102>;\n"
@@ -206,7 +195,7 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tCPU3: cpu@103 {\n"
+ "+\t\tCPU3: cpu at 103 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,armv8\";\n"
  "+\t\t\treg = <0x0 0x103>;\n"
@@ -221,7 +210,7 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tCPU4: cpu@0 {\n"
+ "+\t\tCPU4: cpu at 0 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,armv8\";\n"
  "+\t\t\treg = <0x0 0x0>;\n"
@@ -240,7 +229,7 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tCPU5: cpu@1 {\n"
+ "+\t\tCPU5: cpu at 1 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,armv8\";\n"
  "+\t\t\treg = <0x0 0x1>;\n"
@@ -255,7 +244,7 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tCPU6: cpu@2 {\n"
+ "+\t\tCPU6: cpu at 2 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,armv8\";\n"
  "+\t\t\treg = <0x0 0x2>;\n"
@@ -270,7 +259,7 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tCPU7: cpu@3 {\n"
+ "+\t\tCPU7: cpu at 3 {\n"
  "+\t\t\tdevice_type = \"cpu\";\n"
  "+\t\t\tcompatible = \"arm,armv8\";\n"
  "+\t\t\treg = <0x0 0x3>;\n"
@@ -376,7 +365,7 @@
  "+\t\tranges = <0 0 0 0xffffffff>;\n"
  "+\t\tcompatible = \"simple-bus\";\n"
  "+\n"
- "+\t\tintc: interrupt-controller@17a00000 {\n"
+ "+\t\tintc: interrupt-controller at 17a00000 {\n"
  "+\t\t\tcompatible = \"arm,gic-v3\";\n"
  "+\t\t\treg = <0x17a00000 0x10000>,\n"
  "+\t\t\t      <0x17b00000 0x100000>;\n"
@@ -390,7 +379,7 @@
  "+\t\t\tinterrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tgcc: clock-controller@100000 {\n"
+ "+\t\tgcc: clock-controller at 100000 {\n"
  "+\t\t\tcompatible = \"qcom,gcc-sdm660\";\n"
  "+\t\t\t#clock-cells = <1>;\n"
  "+\t\t\t#reset-cells = <1>;\n"
@@ -398,7 +387,7 @@
  "+\t\t\treg = <0x100000 0x94000>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\ttlmm: pinctrl@3000000 {\n"
+ "+\t\ttlmm: pinctrl at 3000000 {\n"
  "+\t\t\tcompatible = \"qcom,sdm660-pinctrl\";\n"
  "+\t\t\treg = <0x3000000 0xc00000>;\n"
  "+\t\t\tinterrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -408,7 +397,7 @@
  "+\t\t\t#interrupt-cells = <2>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tblsp1_uart1: serial@c170000 {\n"
+ "+\t\tblsp1_uart1: serial at c170000 {\n"
  "+\t\t\tcompatible = \"qcom,msm-uartdm-v1.4\", \"qcom,msm-uartdm\";\n"
  "+\t\t\treg = <0xc170000 0x1000>;\n"
  "+\t\t\tinterrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -418,14 +407,14 @@
  "+\t\t\tstatus = \"disabled\";\n"
  "+\t\t};\n"
  "+\n"
- "+\t\ttimer@17920000 {\n"
+ "+\t\ttimer at 17920000 {\n"
  "+\t\t\t#address-cells = <1>;\n"
  "+\t\t\t#size-cells = <1>;\n"
  "+\t\t\tranges;\n"
  "+\t\t\tcompatible = \"arm,armv7-timer-mem\";\n"
  "+\t\t\treg = <0x17920000 0x1000>;\n"
  "+\n"
- "+\t\t\tframe@17921000 {\n"
+ "+\t\t\tframe at 17921000 {\n"
  "+\t\t\t\tframe-number = <0>;\n"
  "+\t\t\t\tinterrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,\n"
  "+\t\t\t\t\t     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -433,42 +422,42 @@
  "+\t\t\t\t      <0x17922000 0x1000>;\n"
  "+\t\t\t};\n"
  "+\n"
- "+\t\t\tframe@17923000 {\n"
+ "+\t\t\tframe at 17923000 {\n"
  "+\t\t\t\tframe-number = <1>;\n"
  "+\t\t\t\tinterrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;\n"
  "+\t\t\t\treg = <0x17923000 0x1000>;\n"
  "+\t\t\t\tstatus = \"disabled\";\n"
  "+\t\t\t};\n"
  "+\n"
- "+\t\t\tframe@17924000 {\n"
+ "+\t\t\tframe at 17924000 {\n"
  "+\t\t\t\tframe-number = <2>;\n"
  "+\t\t\t\tinterrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;\n"
  "+\t\t\t\treg = <0x17924000 0x1000>;\n"
  "+\t\t\t\tstatus = \"disabled\";\n"
  "+\t\t\t};\n"
  "+\n"
- "+\t\t\tframe@17925000 {\n"
+ "+\t\t\tframe at 17925000 {\n"
  "+\t\t\t\tframe-number = <3>;\n"
  "+\t\t\t\tinterrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;\n"
  "+\t\t\t\treg = <0x17925000 0x1000>;\n"
  "+\t\t\t\tstatus = \"disabled\";\n"
  "+\t\t\t};\n"
  "+\n"
- "+\t\t\tframe@17926000 {\n"
+ "+\t\t\tframe at 17926000 {\n"
  "+\t\t\t\tframe-number = <4>;\n"
  "+\t\t\t\tinterrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;\n"
  "+\t\t\t\treg = <0x17926000 0x1000>;\n"
  "+\t\t\t\tstatus = \"disabled\";\n"
  "+\t\t\t};\n"
  "+\n"
- "+\t\t\tframe@17927000 {\n"
+ "+\t\t\tframe at 17927000 {\n"
  "+\t\t\t\tframe-number = <5>;\n"
  "+\t\t\t\tinterrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;\n"
  "+\t\t\t\treg = <0x17927000 0x1000>;\n"
  "+\t\t\t\tstatus = \"disabled\";\n"
  "+\t\t\t};\n"
  "+\n"
- "+\t\t\tframe@17928000 {\n"
+ "+\t\t\tframe at 17928000 {\n"
  "+\t\t\t\tframe-number = <6>;\n"
  "+\t\t\t\tinterrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;\n"
  "+\t\t\t\treg = <0x17928000 0x1000>;\n"
@@ -476,7 +465,7 @@
  "+\t\t\t};\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tspmi_bus: qcom,spmi@800f000 {\n"
+ "+\t\tspmi_bus: qcom,spmi at 800f000 {\n"
  "+\t\t\tcompatible = \"qcom,spmi-pmic-arb\";\n"
  "+\t\t\treg =\t<0x800f000 0x1000>,\n"
  "+\t\t\t\t<0x8400000 0x1000000>,\n"
@@ -495,12 +484,12 @@
  "+\t\t\tcell-index = <0>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\trpm_msg_ram: memory@778000 {\n"
+ "+\t\trpm_msg_ram: memory at 778000 {\n"
  "+\t\t\tcompatible = \"qcom,rpm-msg-ram\";\n"
  "+\t\t\treg = <0x778000 0x7000>;\n"
  "+\t\t};\n"
  "+\n"
- "+\t\tapcs_glb: mailbox@17911000 {\n"
+ "+\t\tapcs_glb: mailbox at 17911000 {\n"
  "+\t\t\tcompatible = \"qcom,msm8998-apcs-hmss-global\";\n"
  "+\t\t\treg = <0x17911000 0x1000>;\n"
  "+\n"
@@ -514,4 +503,4 @@
  "-- \n"
  2.18.0
 
-ba742963cd91f000d139fab272caf484a6ed8c1b8bdb0f6e0f4720d002cddb6d
+653d2681c3bf45da92ab831c4c20b89c24825e12d98222394226cbaa5e76d31f

diff --git a/a/content_digest b/N2/content_digest
index 49876f7..a0e1fcb 100644
--- a/a/content_digest
+++ b/N2/content_digest
@@ -1,6 +1,7 @@
  "From\0Craig Tatlor <ctatlor97@gmail.com>\0"
  "Subject\0[PATCH] arm64: dts: sdm630 SoC and Sony Pioneer (Xperia XA2) support\0"
  "Date\0Sat, 11 Aug 2018 17:25:47 +0100\0"
+ "To\0unlisted-recipients:; (no To-header on input)\0"
  "Cc\0ctatlor97@gmail.com"
   linux-arm-msm@vger.kernel.org
   Andy Gross <andy.gross@linaro.org>
@@ -514,4 +515,4 @@
  "-- \n"
  2.18.0
 
-ba742963cd91f000d139fab272caf484a6ed8c1b8bdb0f6e0f4720d002cddb6d
+870aa0f39baba7c24c22b1967556e37e23ddc2d057529420c82a682f265fd4a2

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