diff for duplicates of <20180812142317.19991-1-ctatlor97@gmail.com> diff --git a/a/1.txt b/N1/1.txt index 7ecc4b9..0404590 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -104,7 +104,7 @@ index 000000000000..512792c23369 +}; + +&soc { -+ serial@c170000 { ++ serial at c170000 { + status = "okay"; + pinctrl-names = "default"; + pinctrl-0 = <&blsp1_uart1_default>; @@ -145,7 +145,7 @@ index 000000000000..8a544979b7c0 + #address-cells = <2>; + #size-cells = <0>; + -+ CPU0: cpu@100 { ++ CPU0: cpu at 100 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x100>; @@ -164,7 +164,7 @@ index 000000000000..8a544979b7c0 + }; + }; + -+ CPU1: cpu@101 { ++ CPU1: cpu at 101 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x101>; @@ -179,7 +179,7 @@ index 000000000000..8a544979b7c0 + }; + }; + -+ CPU2: cpu@102 { ++ CPU2: cpu at 102 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x102>; @@ -194,7 +194,7 @@ index 000000000000..8a544979b7c0 + }; + }; + -+ CPU3: cpu@103 { ++ CPU3: cpu at 103 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x103>; @@ -209,7 +209,7 @@ index 000000000000..8a544979b7c0 + }; + }; + -+ CPU4: cpu@0 { ++ CPU4: cpu at 0 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x0>; @@ -228,7 +228,7 @@ index 000000000000..8a544979b7c0 + }; + }; + -+ CPU5: cpu@1 { ++ CPU5: cpu at 1 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x1>; @@ -243,7 +243,7 @@ index 000000000000..8a544979b7c0 + }; + }; + -+ CPU6: cpu@2 { ++ CPU6: cpu at 2 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x2>; @@ -258,7 +258,7 @@ index 000000000000..8a544979b7c0 + }; + }; + -+ CPU7: cpu@3 { ++ CPU7: cpu at 3 { + device_type = "cpu"; + compatible = "arm,armv8"; + reg = <0x0 0x3>; @@ -364,7 +364,7 @@ index 000000000000..8a544979b7c0 + ranges = <0 0 0 0xffffffff>; + compatible = "simple-bus"; + -+ intc: interrupt-controller@17a00000 { ++ intc: interrupt-controller at 17a00000 { + compatible = "arm,gic-v3"; + reg = <0x17a00000 0x10000>, + <0x17b00000 0x100000>; @@ -378,7 +378,7 @@ index 000000000000..8a544979b7c0 + interrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>; + }; + -+ gcc: clock-controller@100000 { ++ gcc: clock-controller at 100000 { + compatible = "qcom,gcc-sdm660"; + #clock-cells = <1>; + #reset-cells = <1>; @@ -386,7 +386,7 @@ index 000000000000..8a544979b7c0 + reg = <0x100000 0x94000>; + }; + -+ tlmm: pinctrl@3000000 { ++ tlmm: pinctrl at 3000000 { + compatible = "qcom,sdm660-pinctrl"; + reg = <0x3000000 0xc00000>; + interrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>; @@ -397,7 +397,7 @@ index 000000000000..8a544979b7c0 + #interrupt-cells = <2>; + }; + -+ blsp1_uart1: serial@c170000 { ++ blsp1_uart1: serial at c170000 { + compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm"; + reg = <0xc170000 0x1000>; + interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>; @@ -407,14 +407,14 @@ index 000000000000..8a544979b7c0 + status = "disabled"; + }; + -+ timer@17920000 { ++ timer at 17920000 { + #address-cells = <1>; + #size-cells = <1>; + ranges; + compatible = "arm,armv7-timer-mem"; + reg = <0x17920000 0x1000>; + -+ frame@17921000 { ++ frame at 17921000 { + frame-number = <0>; + interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>; @@ -422,42 +422,42 @@ index 000000000000..8a544979b7c0 + <0x17922000 0x1000>; + }; + -+ frame@17923000 { ++ frame at 17923000 { + frame-number = <1>; + interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x17923000 0x1000>; + status = "disabled"; + }; + -+ frame@17924000 { ++ frame at 17924000 { + frame-number = <2>; + interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x17924000 0x1000>; + status = "disabled"; + }; + -+ frame@17925000 { ++ frame at 17925000 { + frame-number = <3>; + interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x17925000 0x1000>; + status = "disabled"; + }; + -+ frame@17926000 { ++ frame at 17926000 { + frame-number = <4>; + interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x17926000 0x1000>; + status = "disabled"; + }; + -+ frame@17927000 { ++ frame at 17927000 { + frame-number = <5>; + interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x17927000 0x1000>; + status = "disabled"; + }; + -+ frame@17928000 { ++ frame at 17928000 { + frame-number = <6>; + interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>; + reg = <0x17928000 0x1000>; @@ -465,7 +465,7 @@ index 000000000000..8a544979b7c0 + }; + }; + -+ spmi_bus: qcom,spmi@800f000 { ++ spmi_bus: qcom,spmi at 800f000 { + compatible = "qcom,spmi-pmic-arb"; + reg = <0x800f000 0x1000>, + <0x8400000 0x1000000>, @@ -484,12 +484,12 @@ index 000000000000..8a544979b7c0 + cell-index = <0>; + }; + -+ rpm_msg_ram: memory@778000 { ++ rpm_msg_ram: memory at 778000 { + compatible = "qcom,rpm-msg-ram"; + reg = <0x778000 0x7000>; + }; + -+ apcs_glb: mailbox@17911000 { ++ apcs_glb: mailbox at 17911000 { + compatible = "qcom,msm8998-apcs-hmss-global"; + reg = <0x17911000 0x1000>; + diff --git a/a/content_digest b/N1/content_digest index 94bd6d0..bb51889 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,18 +1,7 @@ - "From\0Craig Tatlor <ctatlor97@gmail.com>\0" + "From\0ctatlor97@gmail.com (Craig Tatlor)\0" "Subject\0[PATCH V2] arm64: dts: sdm630 SoC and Sony Pioneer (Xperia XA2) support\0" "Date\0Sun, 12 Aug 2018 15:23:12 +0100\0" - "Cc\0ctatlor97@gmail.com" - linux-arm-msm@vger.kernel.org - Andy Gross <andy.gross@linaro.org> - David Brown <david.brown@linaro.org> - Rob Herring <robh+dt@kernel.org> - Mark Rutland <mark.rutland@arm.com> - Catalin Marinas <catalin.marinas@arm.com> - Will Deacon <will.deacon@arm.com> - linux-soc@vger.kernel.org - devicetree@vger.kernel.org - linux-arm-kernel@lists.infradead.org - " linux-kernel@vger.kernel.org\0" + "To\0linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Initial device tree support for Qualcomm SDM630 SoC and\n" @@ -121,7 +110,7 @@ "+};\n" "+\n" "+&soc {\n" - "+\tserial@c170000 {\n" + "+\tserial at c170000 {\n" "+\t\tstatus = \"okay\";\n" "+\t\tpinctrl-names = \"default\";\n" "+\t\tpinctrl-0 = <&blsp1_uart1_default>;\n" @@ -162,7 +151,7 @@ "+\t\t#address-cells = <2>;\n" "+\t\t#size-cells = <0>;\n" "+\n" - "+\t\tCPU0: cpu@100 {\n" + "+\t\tCPU0: cpu at 100 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,armv8\";\n" "+\t\t\treg = <0x0 0x100>;\n" @@ -181,7 +170,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tCPU1: cpu@101 {\n" + "+\t\tCPU1: cpu at 101 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,armv8\";\n" "+\t\t\treg = <0x0 0x101>;\n" @@ -196,7 +185,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tCPU2: cpu@102 {\n" + "+\t\tCPU2: cpu at 102 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,armv8\";\n" "+\t\t\treg = <0x0 0x102>;\n" @@ -211,7 +200,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tCPU3: cpu@103 {\n" + "+\t\tCPU3: cpu at 103 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,armv8\";\n" "+\t\t\treg = <0x0 0x103>;\n" @@ -226,7 +215,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tCPU4: cpu@0 {\n" + "+\t\tCPU4: cpu at 0 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,armv8\";\n" "+\t\t\treg = <0x0 0x0>;\n" @@ -245,7 +234,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tCPU5: cpu@1 {\n" + "+\t\tCPU5: cpu at 1 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,armv8\";\n" "+\t\t\treg = <0x0 0x1>;\n" @@ -260,7 +249,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tCPU6: cpu@2 {\n" + "+\t\tCPU6: cpu at 2 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,armv8\";\n" "+\t\t\treg = <0x0 0x2>;\n" @@ -275,7 +264,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tCPU7: cpu@3 {\n" + "+\t\tCPU7: cpu at 3 {\n" "+\t\t\tdevice_type = \"cpu\";\n" "+\t\t\tcompatible = \"arm,armv8\";\n" "+\t\t\treg = <0x0 0x3>;\n" @@ -381,7 +370,7 @@ "+\t\tranges = <0 0 0 0xffffffff>;\n" "+\t\tcompatible = \"simple-bus\";\n" "+\n" - "+\t\tintc: interrupt-controller@17a00000 {\n" + "+\t\tintc: interrupt-controller at 17a00000 {\n" "+\t\t\tcompatible = \"arm,gic-v3\";\n" "+\t\t\treg = <0x17a00000 0x10000>,\n" "+\t\t\t <0x17b00000 0x100000>;\n" @@ -395,7 +384,7 @@ "+\t\t\tinterrupts = <GIC_PPI 9 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t};\n" "+\n" - "+\t\tgcc: clock-controller@100000 {\n" + "+\t\tgcc: clock-controller at 100000 {\n" "+\t\t\tcompatible = \"qcom,gcc-sdm660\";\n" "+\t\t\t#clock-cells = <1>;\n" "+\t\t\t#reset-cells = <1>;\n" @@ -403,7 +392,7 @@ "+\t\t\treg = <0x100000 0x94000>;\n" "+\t\t};\n" "+\n" - "+\t\ttlmm: pinctrl@3000000 {\n" + "+\t\ttlmm: pinctrl at 3000000 {\n" "+\t\t\tcompatible = \"qcom,sdm660-pinctrl\";\n" "+\t\t\treg = <0x3000000 0xc00000>;\n" "+\t\t\tinterrupts = <GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -414,7 +403,7 @@ "+\t\t\t#interrupt-cells = <2>;\n" "+\t\t};\n" "+\n" - "+\t\tblsp1_uart1: serial@c170000 {\n" + "+\t\tblsp1_uart1: serial at c170000 {\n" "+\t\t\tcompatible = \"qcom,msm-uartdm-v1.4\", \"qcom,msm-uartdm\";\n" "+\t\t\treg = <0xc170000 0x1000>;\n" "+\t\t\tinterrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -424,14 +413,14 @@ "+\t\t\tstatus = \"disabled\";\n" "+\t\t};\n" "+\n" - "+\t\ttimer@17920000 {\n" + "+\t\ttimer at 17920000 {\n" "+\t\t\t#address-cells = <1>;\n" "+\t\t\t#size-cells = <1>;\n" "+\t\t\tranges;\n" "+\t\t\tcompatible = \"arm,armv7-timer-mem\";\n" "+\t\t\treg = <0x17920000 0x1000>;\n" "+\n" - "+\t\t\tframe@17921000 {\n" + "+\t\t\tframe at 17921000 {\n" "+\t\t\t\tframe-number = <0>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,\n" "+\t\t\t\t\t <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -439,42 +428,42 @@ "+\t\t\t\t <0x17922000 0x1000>;\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@17923000 {\n" + "+\t\t\tframe at 17923000 {\n" "+\t\t\t\tframe-number = <1>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0x17923000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@17924000 {\n" + "+\t\t\tframe at 17924000 {\n" "+\t\t\t\tframe-number = <2>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0x17924000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@17925000 {\n" + "+\t\t\tframe at 17925000 {\n" "+\t\t\t\tframe-number = <3>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0x17925000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@17926000 {\n" + "+\t\t\tframe at 17926000 {\n" "+\t\t\t\tframe-number = <4>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0x17926000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@17927000 {\n" + "+\t\t\tframe at 17927000 {\n" "+\t\t\t\tframe-number = <5>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0x17927000 0x1000>;\n" "+\t\t\t\tstatus = \"disabled\";\n" "+\t\t\t};\n" "+\n" - "+\t\t\tframe@17928000 {\n" + "+\t\t\tframe at 17928000 {\n" "+\t\t\t\tframe-number = <6>;\n" "+\t\t\t\tinterrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;\n" "+\t\t\t\treg = <0x17928000 0x1000>;\n" @@ -482,7 +471,7 @@ "+\t\t\t};\n" "+\t\t};\n" "+\n" - "+\t\tspmi_bus: qcom,spmi@800f000 {\n" + "+\t\tspmi_bus: qcom,spmi at 800f000 {\n" "+\t\t\tcompatible = \"qcom,spmi-pmic-arb\";\n" "+\t\t\treg =\t<0x800f000 0x1000>,\n" "+\t\t\t\t<0x8400000 0x1000000>,\n" @@ -501,12 +490,12 @@ "+\t\t\tcell-index = <0>;\n" "+\t\t};\n" "+\n" - "+\t\trpm_msg_ram: memory@778000 {\n" + "+\t\trpm_msg_ram: memory at 778000 {\n" "+\t\t\tcompatible = \"qcom,rpm-msg-ram\";\n" "+\t\t\treg = <0x778000 0x7000>;\n" "+\t\t};\n" "+\n" - "+\t\tapcs_glb: mailbox@17911000 {\n" + "+\t\tapcs_glb: mailbox at 17911000 {\n" "+\t\t\tcompatible = \"qcom,msm8998-apcs-hmss-global\";\n" "+\t\t\treg = <0x17911000 0x1000>;\n" "+\n" @@ -520,4 +509,4 @@ "-- \n" 2.18.0 -01dbe7eff591ac8bbbb140398d78d88b41daba315a71f5c2b3a36c03c1c48250 +b96f5f3e84723db9cce9bbdc6677bd830f1e1cf83c4ab478cf3c75e366482efa
diff --git a/a/content_digest b/N2/content_digest index 94bd6d0..d60257a 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,6 +1,7 @@ "From\0Craig Tatlor <ctatlor97@gmail.com>\0" "Subject\0[PATCH V2] arm64: dts: sdm630 SoC and Sony Pioneer (Xperia XA2) support\0" "Date\0Sun, 12 Aug 2018 15:23:12 +0100\0" + "To\0unlisted-recipients:; (no To-header on input)\0" "Cc\0ctatlor97@gmail.com" linux-arm-msm@vger.kernel.org Andy Gross <andy.gross@linaro.org> @@ -520,4 +521,4 @@ "-- \n" 2.18.0 -01dbe7eff591ac8bbbb140398d78d88b41daba315a71f5c2b3a36c03c1c48250 +676d5457aad95d96e5677f5638d5b0840813474023da47744858e792fa5cd2d1
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