From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [RFC,1/2] dt-bindings: dmaengine: xilinx_dma: Add binding for Xilinx MCDMA IP From: Rob Herring Message-Id: <20180814161326.GA17341@rob-hp-laptop> Date: Tue, 14 Aug 2018 10:13:26 -0600 To: Radhey Shyam Pandey Cc: vkoul@kernel.org, mark.rutland@arm.com, michal.simek@xilinx.com, dan.j.williams@intel.com, appanad@xilinx.com, lars@metafoo.de, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-ID: T24gVHVlLCBKdWwgMzEsIDIwMTggYXQgMTE6MTY6MTJQTSArMDUzMCwgUmFkaGV5IFNoeWFtIFBh bmRleSB3cm90ZToKPiBBZGQgZGV2aWNldHJlZSBiaW5kaW5nIGZvciBYaWxpbnggQVhJIE11bHRp Y2hhbm5lbCBEaXJlY3QgTWVtb3J5IEFjY2Vzcwo+IChBWEkgTUNETUEpIElQLiBUaGUgQVhJIE1D RE1BIHByb3ZpZGVzIGhpZ2gtYmFuZHdpZHRoIGRpcmVjdCBtZW1vcnkKPiBhY2Nlc3MgYmV0d2Vl biBtZW1vcnkgYW5kIEFYSTQtU3RyZWFtIHRhcmdldCBwZXJpcGhlcmFscy4gVGhlIEFYSSBNQ0RN QQo+IGNvcmUgcHJvdmlkZXMgc2NhdHRlci1nYXRoZXIgaW50ZXJmYWNlIHdpdGggbXVsdGlwbGUg Y2hhbm5lbCBzdXBwb3J0Lgo+IAo+IFNpZ25lZC1vZmYtYnk6IFJhZGhleSBTaHlhbSBQYW5kZXkg PHJhZGhleS5zaHlhbS5wYW5kZXlAeGlsaW54LmNvbT4KPiAtLS0KPiAgRG9jdW1lbnRhdGlvbi9k ZXZpY2V0cmVlL2JpbmRpbmdzL2RtYS94aWxpbngveGlsaW54X2RtYS50eHQgfCAxMCArKysrKysr Ky0tCj4gIDEgZmlsZSBjaGFuZ2VkLCA4IGluc2VydGlvbnMoKyksIDIgZGVsZXRpb25zKC0pCj4g Cj4gZGlmZiAtLWdpdCBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9kbWEveGls aW54L3hpbGlueF9kbWEudHh0IGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2Rt YS94aWxpbngveGlsaW54X2RtYS50eHQKPiBpbmRleCAxNzRhZjJjLi41N2JiMDJlIDEwMDY0NAo+ IC0tLSBhL0RvY3VtZW50YXRpb24vZGV2aWNldHJlZS9iaW5kaW5ncy9kbWEveGlsaW54L3hpbGlu eF9kbWEudHh0Cj4gKysrIGIvRG9jdW1lbnRhdGlvbi9kZXZpY2V0cmVlL2JpbmRpbmdzL2RtYS94 aWxpbngveGlsaW54X2RtYS50eHQKPiBAQCAtMTEsOSArMTEsMTMgQEAgaXMgdG8gcmVjZWl2ZSBm cm9tIHRoZSBkZXZpY2UuCj4gIFhpbGlueCBBWEkgQ0RNQSBlbmdpbmUsIGl0IGRvZXMgdHJhbnNm ZXJzIGJldHdlZW4gbWVtb3J5LW1hcHBlZCBzb3VyY2UKPiAgYWRkcmVzcyBhbmQgYSBtZW1vcnkt bWFwcGVkIGRlc3RpbmF0aW9uIGFkZHJlc3MuCj4gIAo+ICtYaWxpbnggQVhJIE1DRE1BIGVuZ2lu ZSwgaXQgZG9lcyB0cmFuc2ZlciBiZXR3ZWVuIG1lbW9yeSBhbmQgQVhJNCBzdHJlYW0KPiArdGFy Z2V0IGRldmljZXMuIEl0IGNhbiBiZSBjb25maWd1cmVkIHRvIGhhdmUgdXAgdG8gMTYgaW5kZXBl bmRlbnQgdHJhbnNtaXQKPiArYW5kIHJlY2VpdmUgY2hhbm5lbHMuCj4gKwo+ICBSZXF1aXJlZCBw cm9wZXJ0aWVzOgo+ICAtIGNvbXBhdGlibGU6IFNob3VsZCBiZSAieGxueCxheGktdmRtYS0xLjAw LmEiIG9yICJ4bG54LGF4aS1kbWEtMS4wMC5hIiBvcgo+IC0JICAgICAgInhsbngsYXhpLWNkbWEt MS4wMC5hIiIKPiArCSAgICAgICJ4bG54LGF4aS1jZG1hLTEuMDAuYSIgb3IgInhsbngsYXhpLW1j ZG1hLTEuMDAuYSIuCgpQbGVhc2UgcmVmb3JtYXQgdG8gMSBwZXIgbGluZS4KCj4gIC0gI2RtYS1j ZWxsczogU2hvdWxkIGJlIDwxPiwgc2VlICJkbWFzIiBwcm9wZXJ0eSBiZWxvdwo+ICAtIHJlZzog U2hvdWxkIGNvbnRhaW4gVkRNQSByZWdpc3RlcnMgbG9jYXRpb24gYW5kIGxlbmd0aC4KPiAgLSB4 bG54LGFkZHJ3aWR0aDogU2hvdWxkIGJlIHRoZSB2ZG1hIGFkZHJlc3Npbmcgc2l6ZSBpbiBiaXRz KGV4OiAzMiBiaXRzKS4KPiBAQCAtNTYsNiArNjAsOCBAQCBSZXF1aXJlZCBjaGlsZCBub2RlIHBy b3BlcnRpZXM6Cj4gIAlGb3IgQ0RNQTogSXQgc2hvdWxkIGJlICJ4bG54LGF4aS1jZG1hLWNoYW5u ZWwiLgo+ICAJRm9yIEFYSURNQTogSXQgc2hvdWxkIGJlIGVpdGhlciAieGxueCxheGktZG1hLW1t MnMtY2hhbm5lbCIgb3IKPiAgCSJ4bG54LGF4aS1kbWEtczJtbS1jaGFubmVsIi4KPiArCUZvciBN Q0RNQTogSXQgc2hvdWxkIGJlIGVpdGhlciAieGxueCxheGktbWNkbWEtbW0ycy1jaGFubmVsIiBv cgo+ICsJInhsbngsYXhpLW1jZG1hLXMybW0tY2hhbm5lbCIuCgpXaGF0J3Mgd3Jvbmcgd2l0aCBy ZXVzaW5nIHRoZSBleGlzdGluZyB4bG54LGF4aS1kbWEtKiBuYW1lcz8gCgo+ICAtIGludGVycnVw dHM6IFNob3VsZCBjb250YWluIHBlciBjaGFubmVsIFZETUEgaW50ZXJydXB0cy4KPiAgLSB4bG54 LGRhdGF3aWR0aDogU2hvdWxkIGNvbnRhaW4gdGhlIHN0cmVhbSBkYXRhIHdpZHRoLCB0YWtlIHZh bHVlcwo+ICAJezMyLDY0Li4uMTAyNH0uCj4gQEAgLTY4LDcgKzc0LDcgQEAgT3B0aW9uYWwgY2hp bGQgbm9kZSBwcm9wZXJ0aWVzIGZvciBWRE1BOgo+ICAJZW5hYmxlZC9kaXNhYmxlZCBpbiBoYXJk d2FyZS4KPiAgLSB4bG54LGVuYWJsZS12ZXJ0LWZsaXA6IFRlbGxzIHZlcnRpY2FsIGZsaXAgaXMK PiAgCWVuYWJsZWQvZGlzYWJsZWQgaW4gaGFyZHdhcmUoUzJNTSBwYXRoKS4KPiAtT3B0aW9uYWwg Y2hpbGQgbm9kZSBwcm9wZXJ0aWVzIGZvciBBWEkgRE1BOgo+ICtPcHRpb25hbCBjaGlsZCBub2Rl IHByb3BlcnRpZXMgZm9yIEFYSSBETUEgYW5kIE1DRE1BOgo+ICAtZG1hLWNoYW5uZWxzOiBOdW1i ZXIgb2YgZG1hIGNoYW5uZWxzIGluIGNoaWxkIG5vZGUuCj4gIAo+ICBFeGFtcGxlOgo+IC0tIAo+ IDIuNy40Cj4gCj4gLS0KPiBUbyB1bnN1YnNjcmliZSBmcm9tIHRoaXMgbGlzdDogc2VuZCB0aGUg bGluZSAidW5zdWJzY3JpYmUgZGV2aWNldHJlZSIgaW4KPiB0aGUgYm9keSBvZiBhIG1lc3NhZ2Ug dG8gbWFqb3Jkb21vQHZnZXIua2VybmVsLm9yZwo+IE1vcmUgbWFqb3Jkb21vIGluZm8gYXQgIGh0 dHA6Ly92Z2VyLmtlcm5lbC5vcmcvbWFqb3Jkb21vLWluZm8uaHRtbAo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: robh@kernel.org (Rob Herring) Date: Tue, 14 Aug 2018 10:13:26 -0600 Subject: [RFC PATCH 1/2] dt-bindings: dmaengine: xilinx_dma: Add binding for Xilinx MCDMA IP In-Reply-To: <1533059173-21405-2-git-send-email-radhey.shyam.pandey@xilinx.com> References: <1533059173-21405-1-git-send-email-radhey.shyam.pandey@xilinx.com> <1533059173-21405-2-git-send-email-radhey.shyam.pandey@xilinx.com> Message-ID: <20180814161326.GA17341@rob-hp-laptop> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Tue, Jul 31, 2018 at 11:16:12PM +0530, Radhey Shyam Pandey wrote: > Add devicetree binding for Xilinx AXI Multichannel Direct Memory Access > (AXI MCDMA) IP. The AXI MCDMA provides high-bandwidth direct memory > access between memory and AXI4-Stream target peripherals. The AXI MCDMA > core provides scatter-gather interface with multiple channel support. > > Signed-off-by: Radhey Shyam Pandey > --- > Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt > index 174af2c..57bb02e 100644 > --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt > +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt > @@ -11,9 +11,13 @@ is to receive from the device. > Xilinx AXI CDMA engine, it does transfers between memory-mapped source > address and a memory-mapped destination address. > > +Xilinx AXI MCDMA engine, it does transfer between memory and AXI4 stream > +target devices. It can be configured to have up to 16 independent transmit > +and receive channels. > + > Required properties: > - compatible: Should be "xlnx,axi-vdma-1.00.a" or "xlnx,axi-dma-1.00.a" or > - "xlnx,axi-cdma-1.00.a"" > + "xlnx,axi-cdma-1.00.a" or "xlnx,axi-mcdma-1.00.a". Please reformat to 1 per line. > - #dma-cells: Should be <1>, see "dmas" property below > - reg: Should contain VDMA registers location and length. > - xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits). > @@ -56,6 +60,8 @@ Required child node properties: > For CDMA: It should be "xlnx,axi-cdma-channel". > For AXIDMA: It should be either "xlnx,axi-dma-mm2s-channel" or > "xlnx,axi-dma-s2mm-channel". > + For MCDMA: It should be either "xlnx,axi-mcdma-mm2s-channel" or > + "xlnx,axi-mcdma-s2mm-channel". What's wrong with reusing the existing xlnx,axi-dma-* names? > - interrupts: Should contain per channel VDMA interrupts. > - xlnx,datawidth: Should contain the stream data width, take values > {32,64...1024}. > @@ -68,7 +74,7 @@ Optional child node properties for VDMA: > enabled/disabled in hardware. > - xlnx,enable-vert-flip: Tells vertical flip is > enabled/disabled in hardware(S2MM path). > -Optional child node properties for AXI DMA: > +Optional child node properties for AXI DMA and MCDMA: > -dma-channels: Number of dma channels in child node. > > Example: > -- > 2.7.4 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo at vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [RFC PATCH 1/2] dt-bindings: dmaengine: xilinx_dma: Add binding for Xilinx MCDMA IP Date: Tue, 14 Aug 2018 10:13:26 -0600 Message-ID: <20180814161326.GA17341@rob-hp-laptop> References: <1533059173-21405-1-git-send-email-radhey.shyam.pandey@xilinx.com> <1533059173-21405-2-git-send-email-radhey.shyam.pandey@xilinx.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: <1533059173-21405-2-git-send-email-radhey.shyam.pandey@xilinx.com> Sender: linux-kernel-owner@vger.kernel.org To: Radhey Shyam Pandey Cc: vkoul@kernel.org, mark.rutland@arm.com, michal.simek@xilinx.com, dan.j.williams@intel.com, appanad@xilinx.com, lars@metafoo.de, dmaengine@vger.kernel.org, devicetree@vger.kernel.org, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org List-Id: devicetree@vger.kernel.org On Tue, Jul 31, 2018 at 11:16:12PM +0530, Radhey Shyam Pandey wrote: > Add devicetree binding for Xilinx AXI Multichannel Direct Memory Access > (AXI MCDMA) IP. The AXI MCDMA provides high-bandwidth direct memory > access between memory and AXI4-Stream target peripherals. The AXI MCDMA > core provides scatter-gather interface with multiple channel support. > > Signed-off-by: Radhey Shyam Pandey > --- > Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt | 10 ++++++++-- > 1 file changed, 8 insertions(+), 2 deletions(-) > > diff --git a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt > index 174af2c..57bb02e 100644 > --- a/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt > +++ b/Documentation/devicetree/bindings/dma/xilinx/xilinx_dma.txt > @@ -11,9 +11,13 @@ is to receive from the device. > Xilinx AXI CDMA engine, it does transfers between memory-mapped source > address and a memory-mapped destination address. > > +Xilinx AXI MCDMA engine, it does transfer between memory and AXI4 stream > +target devices. It can be configured to have up to 16 independent transmit > +and receive channels. > + > Required properties: > - compatible: Should be "xlnx,axi-vdma-1.00.a" or "xlnx,axi-dma-1.00.a" or > - "xlnx,axi-cdma-1.00.a"" > + "xlnx,axi-cdma-1.00.a" or "xlnx,axi-mcdma-1.00.a". Please reformat to 1 per line. > - #dma-cells: Should be <1>, see "dmas" property below > - reg: Should contain VDMA registers location and length. > - xlnx,addrwidth: Should be the vdma addressing size in bits(ex: 32 bits). > @@ -56,6 +60,8 @@ Required child node properties: > For CDMA: It should be "xlnx,axi-cdma-channel". > For AXIDMA: It should be either "xlnx,axi-dma-mm2s-channel" or > "xlnx,axi-dma-s2mm-channel". > + For MCDMA: It should be either "xlnx,axi-mcdma-mm2s-channel" or > + "xlnx,axi-mcdma-s2mm-channel". What's wrong with reusing the existing xlnx,axi-dma-* names? > - interrupts: Should contain per channel VDMA interrupts. > - xlnx,datawidth: Should contain the stream data width, take values > {32,64...1024}. > @@ -68,7 +74,7 @@ Optional child node properties for VDMA: > enabled/disabled in hardware. > - xlnx,enable-vert-flip: Tells vertical flip is > enabled/disabled in hardware(S2MM path). > -Optional child node properties for AXI DMA: > +Optional child node properties for AXI DMA and MCDMA: > -dma-channels: Number of dma channels in child node. > > Example: > -- > 2.7.4 > > -- > To unsubscribe from this list: send the line "unsubscribe devicetree" in > the body of a message to majordomo@vger.kernel.org > More majordomo info at http://vger.kernel.org/majordomo-info.html