From: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
To: linux-kernel@vger.kernel.org
Cc: Greg Kroah-Hartman <gregkh@linuxfoundation.org>,
stable@vger.kernel.org, Jiri Kosina <jkosina@suse.cz>,
Thomas Gleixner <tglx@linutronix.de>,
Josh Poimboeuf <jpoimboe@redhat.com>
Subject: [PATCH 4.18 55/79] x86/bugs, kvm: Introduce boot-time control of L1TF mitigations
Date: Tue, 14 Aug 2018 19:17:14 +0200 [thread overview]
Message-ID: <20180814171339.942544429@linuxfoundation.org> (raw)
In-Reply-To: <20180814171336.799314117@linuxfoundation.org>
4.18-stable review patch. If anyone has any objections, please let me know.
------------------
From: Jiri Kosina <jkosina@suse.cz>
Introduce the 'l1tf=' kernel command line option to allow for boot-time
switching of mitigation that is used on processors affected by L1TF.
The possible values are:
full
Provides all available mitigations for the L1TF vulnerability. Disables
SMT and enables all mitigations in the hypervisors. SMT control via
/sys/devices/system/cpu/smt/control is still possible after boot.
Hypervisors will issue a warning when the first VM is started in
a potentially insecure configuration, i.e. SMT enabled or L1D flush
disabled.
full,force
Same as 'full', but disables SMT control. Implies the 'nosmt=force'
command line option. sysfs control of SMT and the hypervisor flush
control is disabled.
flush
Leaves SMT enabled and enables the conditional hypervisor mitigation.
Hypervisors will issue a warning when the first VM is started in a
potentially insecure configuration, i.e. SMT enabled or L1D flush
disabled.
flush,nosmt
Disables SMT and enables the conditional hypervisor mitigation. SMT
control via /sys/devices/system/cpu/smt/control is still possible
after boot. If SMT is reenabled or flushing disabled at runtime
hypervisors will issue a warning.
flush,nowarn
Same as 'flush', but hypervisors will not warn when
a VM is started in a potentially insecure configuration.
off
Disables hypervisor mitigations and doesn't emit any warnings.
Default is 'flush'.
Let KVM adhere to these semantics, which means:
- 'lt1f=full,force' : Performe L1D flushes. No runtime control
possible.
- 'l1tf=full'
- 'l1tf-flush'
- 'l1tf=flush,nosmt' : Perform L1D flushes and warn on VM start if
SMT has been runtime enabled or L1D flushing
has been run-time enabled
- 'l1tf=flush,nowarn' : Perform L1D flushes and no warnings are emitted.
- 'l1tf=off' : L1D flushes are not performed and no warnings
are emitted.
KVM can always override the L1D flushing behavior using its 'vmentry_l1d_flush'
module parameter except when lt1f=full,force is set.
This makes KVM's private 'nosmt' option redundant, and as it is a bit
non-systematic anyway (this is something to control globally, not on
hypervisor level), remove that option.
Add the missing Documentation entry for the l1tf vulnerability sysfs file
while at it.
Signed-off-by: Jiri Kosina <jkosina@suse.cz>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Jiri Kosina <jkosina@suse.cz>
Reviewed-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Reviewed-by: Josh Poimboeuf <jpoimboe@redhat.com>
Link: https://lkml.kernel.org/r/20180713142323.202758176@linutronix.de
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
---
Documentation/ABI/testing/sysfs-devices-system-cpu | 4 +
Documentation/admin-guide/kernel-parameters.txt | 68 +++++++++++++++++++--
arch/x86/include/asm/processor.h | 12 +++
arch/x86/kernel/cpu/bugs.c | 44 +++++++++++++
arch/x86/kvm/vmx.c | 56 +++++++++++++----
5 files changed, 165 insertions(+), 19 deletions(-)
--- a/Documentation/ABI/testing/sysfs-devices-system-cpu
+++ b/Documentation/ABI/testing/sysfs-devices-system-cpu
@@ -476,6 +476,7 @@ What: /sys/devices/system/cpu/vulnerabi
/sys/devices/system/cpu/vulnerabilities/spectre_v1
/sys/devices/system/cpu/vulnerabilities/spectre_v2
/sys/devices/system/cpu/vulnerabilities/spec_store_bypass
+ /sys/devices/system/cpu/vulnerabilities/l1tf
Date: January 2018
Contact: Linux kernel mailing list <linux-kernel@vger.kernel.org>
Description: Information about CPU vulnerabilities
@@ -488,6 +489,9 @@ Description: Information about CPU vulne
"Vulnerable" CPU is affected and no mitigation in effect
"Mitigation: $M" CPU is affected and mitigation $M is in effect
+ Details about the l1tf file can be found in
+ Documentation/admin-guide/l1tf.rst
+
What: /sys/devices/system/cpu/smt
/sys/devices/system/cpu/smt/active
/sys/devices/system/cpu/smt/control
--- a/Documentation/admin-guide/kernel-parameters.txt
+++ b/Documentation/admin-guide/kernel-parameters.txt
@@ -1946,12 +1946,6 @@
[KVM,ARM] Allow use of GICv4 for direct injection of
LPIs.
- kvm-intel.nosmt=[KVM,Intel] If the L1TF CPU bug is present (CVE-2018-3620)
- and the system has SMT (aka Hyper-Threading) enabled then
- don't allow guests to be created.
-
- Default is 0 (allow guests to be created).
-
kvm-intel.ept= [KVM,Intel] Disable extended page tables
(virtualized MMU) support on capable Intel chips.
Default is 1 (enabled)
@@ -1989,6 +1983,68 @@
feature (tagged TLBs) on capable Intel chips.
Default is 1 (enabled)
+ l1tf= [X86] Control mitigation of the L1TF vulnerability on
+ affected CPUs
+
+ The kernel PTE inversion protection is unconditionally
+ enabled and cannot be disabled.
+
+ full
+ Provides all available mitigations for the
+ L1TF vulnerability. Disables SMT and
+ enables all mitigations in the
+ hypervisors, i.e. unconditional L1D flush.
+
+ SMT control and L1D flush control via the
+ sysfs interface is still possible after
+ boot. Hypervisors will issue a warning
+ when the first VM is started in a
+ potentially insecure configuration,
+ i.e. SMT enabled or L1D flush disabled.
+
+ full,force
+ Same as 'full', but disables SMT and L1D
+ flush runtime control. Implies the
+ 'nosmt=force' command line option.
+ (i.e. sysfs control of SMT is disabled.)
+
+ flush
+ Leaves SMT enabled and enables the default
+ hypervisor mitigation, i.e. conditional
+ L1D flush.
+
+ SMT control and L1D flush control via the
+ sysfs interface is still possible after
+ boot. Hypervisors will issue a warning
+ when the first VM is started in a
+ potentially insecure configuration,
+ i.e. SMT enabled or L1D flush disabled.
+
+ flush,nosmt
+
+ Disables SMT and enables the default
+ hypervisor mitigation.
+
+ SMT control and L1D flush control via the
+ sysfs interface is still possible after
+ boot. Hypervisors will issue a warning
+ when the first VM is started in a
+ potentially insecure configuration,
+ i.e. SMT enabled or L1D flush disabled.
+
+ flush,nowarn
+ Same as 'flush', but hypervisors will not
+ warn when a VM is started in a potentially
+ insecure configuration.
+
+ off
+ Disables hypervisor mitigations and doesn't
+ emit any warnings.
+
+ Default is 'flush'.
+
+ For details see: Documentation/admin-guide/l1tf.rst
+
l2cr= [PPC]
l3cr= [PPC]
--- a/arch/x86/include/asm/processor.h
+++ b/arch/x86/include/asm/processor.h
@@ -982,4 +982,16 @@ bool xen_set_default_idle(void);
void stop_this_cpu(void *dummy);
void df_debug(struct pt_regs *regs, long error_code);
void microcode_check(void);
+
+enum l1tf_mitigations {
+ L1TF_MITIGATION_OFF,
+ L1TF_MITIGATION_FLUSH_NOWARN,
+ L1TF_MITIGATION_FLUSH,
+ L1TF_MITIGATION_FLUSH_NOSMT,
+ L1TF_MITIGATION_FULL,
+ L1TF_MITIGATION_FULL_FORCE
+};
+
+extern enum l1tf_mitigations l1tf_mitigation;
+
#endif /* _ASM_X86_PROCESSOR_H */
--- a/arch/x86/kernel/cpu/bugs.c
+++ b/arch/x86/kernel/cpu/bugs.c
@@ -644,7 +644,11 @@ void x86_spec_ctrl_setup_ap(void)
#undef pr_fmt
#define pr_fmt(fmt) "L1TF: " fmt
+/* Default mitigation for L1TF-affected CPUs */
+enum l1tf_mitigations l1tf_mitigation __ro_after_init = L1TF_MITIGATION_FLUSH;
#if IS_ENABLED(CONFIG_KVM_INTEL)
+EXPORT_SYMBOL_GPL(l1tf_mitigation);
+
enum vmx_l1d_flush_state l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_AUTO;
EXPORT_SYMBOL_GPL(l1tf_vmx_mitigation);
#endif
@@ -656,6 +660,20 @@ static void __init l1tf_select_mitigatio
if (!boot_cpu_has_bug(X86_BUG_L1TF))
return;
+ switch (l1tf_mitigation) {
+ case L1TF_MITIGATION_OFF:
+ case L1TF_MITIGATION_FLUSH_NOWARN:
+ case L1TF_MITIGATION_FLUSH:
+ break;
+ case L1TF_MITIGATION_FLUSH_NOSMT:
+ case L1TF_MITIGATION_FULL:
+ cpu_smt_disable(false);
+ break;
+ case L1TF_MITIGATION_FULL_FORCE:
+ cpu_smt_disable(true);
+ break;
+ }
+
#if CONFIG_PGTABLE_LEVELS == 2
pr_warn("Kernel not compiled for PAE. No mitigation for L1TF\n");
return;
@@ -674,6 +692,32 @@ static void __init l1tf_select_mitigatio
setup_force_cpu_cap(X86_FEATURE_L1TF_PTEINV);
}
+
+static int __init l1tf_cmdline(char *str)
+{
+ if (!boot_cpu_has_bug(X86_BUG_L1TF))
+ return 0;
+
+ if (!str)
+ return -EINVAL;
+
+ if (!strcmp(str, "off"))
+ l1tf_mitigation = L1TF_MITIGATION_OFF;
+ else if (!strcmp(str, "flush,nowarn"))
+ l1tf_mitigation = L1TF_MITIGATION_FLUSH_NOWARN;
+ else if (!strcmp(str, "flush"))
+ l1tf_mitigation = L1TF_MITIGATION_FLUSH;
+ else if (!strcmp(str, "flush,nosmt"))
+ l1tf_mitigation = L1TF_MITIGATION_FLUSH_NOSMT;
+ else if (!strcmp(str, "full"))
+ l1tf_mitigation = L1TF_MITIGATION_FULL;
+ else if (!strcmp(str, "full,force"))
+ l1tf_mitigation = L1TF_MITIGATION_FULL_FORCE;
+
+ return 0;
+}
+early_param("l1tf", l1tf_cmdline);
+
#undef pr_fmt
#ifdef CONFIG_SYSFS
--- a/arch/x86/kvm/vmx.c
+++ b/arch/x86/kvm/vmx.c
@@ -71,9 +71,6 @@ static const struct x86_cpu_id vmx_cpu_i
};
MODULE_DEVICE_TABLE(x86cpu, vmx_cpu_id);
-static bool __read_mostly nosmt;
-module_param(nosmt, bool, S_IRUGO);
-
static bool __read_mostly enable_vpid = 1;
module_param_named(vpid, enable_vpid, bool, 0444);
@@ -215,15 +212,31 @@ static int vmx_setup_l1d_flush(enum vmx_
{
struct page *page;
- /* If set to 'auto' select 'cond' */
- if (l1tf == VMENTER_L1D_FLUSH_AUTO)
- l1tf = VMENTER_L1D_FLUSH_COND;
-
if (!enable_ept) {
l1tf_vmx_mitigation = VMENTER_L1D_FLUSH_EPT_DISABLED;
return 0;
}
+ /* If set to auto use the default l1tf mitigation method */
+ if (l1tf == VMENTER_L1D_FLUSH_AUTO) {
+ switch (l1tf_mitigation) {
+ case L1TF_MITIGATION_OFF:
+ l1tf = VMENTER_L1D_FLUSH_NEVER;
+ break;
+ case L1TF_MITIGATION_FLUSH_NOWARN:
+ case L1TF_MITIGATION_FLUSH:
+ case L1TF_MITIGATION_FLUSH_NOSMT:
+ l1tf = VMENTER_L1D_FLUSH_COND;
+ break;
+ case L1TF_MITIGATION_FULL:
+ case L1TF_MITIGATION_FULL_FORCE:
+ l1tf = VMENTER_L1D_FLUSH_ALWAYS;
+ break;
+ }
+ } else if (l1tf_mitigation == L1TF_MITIGATION_FULL_FORCE) {
+ l1tf = VMENTER_L1D_FLUSH_ALWAYS;
+ }
+
if (l1tf != VMENTER_L1D_FLUSH_NEVER && !vmx_l1d_flush_pages &&
!boot_cpu_has(X86_FEATURE_FLUSH_L1D)) {
page = alloc_pages(GFP_KERNEL, L1D_CACHE_ORDER);
@@ -10604,19 +10617,36 @@ free_vcpu:
return ERR_PTR(err);
}
-#define L1TF_MSG "SMT enabled with L1TF CPU bug present. Refer to CVE-2018-3620 for details.\n"
+#define L1TF_MSG_SMT "L1TF CPU bug present and SMT on, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/l1tf.html for details.\n"
+#define L1TF_MSG_L1D "L1TF CPU bug present and virtualization mitigation disabled, data leak possible. See CVE-2018-3646 and https://www.kernel.org/doc/html/latest/admin-guide/l1tf.html for details.\n"
static int vmx_vm_init(struct kvm *kvm)
{
if (!ple_gap)
kvm->arch.pause_in_guest = true;
- if (boot_cpu_has(X86_BUG_L1TF) && cpu_smt_control == CPU_SMT_ENABLED) {
- if (nosmt) {
- pr_err(L1TF_MSG);
- return -EOPNOTSUPP;
+ if (boot_cpu_has(X86_BUG_L1TF) && enable_ept) {
+ switch (l1tf_mitigation) {
+ case L1TF_MITIGATION_OFF:
+ case L1TF_MITIGATION_FLUSH_NOWARN:
+ /* 'I explicitly don't care' is set */
+ break;
+ case L1TF_MITIGATION_FLUSH:
+ case L1TF_MITIGATION_FLUSH_NOSMT:
+ case L1TF_MITIGATION_FULL:
+ /*
+ * Warn upon starting the first VM in a potentially
+ * insecure environment.
+ */
+ if (cpu_smt_control == CPU_SMT_ENABLED)
+ pr_warn_once(L1TF_MSG_SMT);
+ if (l1tf_vmx_mitigation == VMENTER_L1D_FLUSH_NEVER)
+ pr_warn_once(L1TF_MSG_L1D);
+ break;
+ case L1TF_MITIGATION_FULL_FORCE:
+ /* Flush is enforced */
+ break;
}
- pr_warn(L1TF_MSG);
}
return 0;
}
next prev parent reply other threads:[~2018-08-14 17:26 UTC|newest]
Thread overview: 84+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-14 17:16 [PATCH 4.18 00/79] 4.18.1-stable review Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 01/79] x86/paravirt: Fix spectre-v2 mitigations for paravirt guests Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 02/79] x86/speculation: Protect against userspace-userspace spectreRSB Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 03/79] kprobes/x86: Fix %p uses in error messages Greg Kroah-Hartman
2018-08-14 17:16 ` Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 04/79] x86/irqflags: Provide a declaration for native_save_fl Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 05/79] x86/speculation/l1tf: Increase 32bit PAE __PHYSICAL_PAGE_SHIFT Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 06/79] x86/speculation/l1tf: Change order of offset/type in swap entry Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 07/79] x86/speculation/l1tf: Protect swap entries against L1TF Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 08/79] x86/speculation/l1tf: Protect PROT_NONE PTEs against speculation Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 09/79] x86/speculation/l1tf: Make sure the first page is always reserved Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 10/79] x86/speculation/l1tf: Add sysfs reporting for l1tf Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 11/79] x86/speculation/l1tf: Disallow non privileged high MMIO PROT_NONE mappings Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 12/79] x86/speculation/l1tf: Limit swap file size to MAX_PA/2 Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 13/79] x86/bugs: Move the l1tf function and define pr_fmt properly Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 14/79] sched/smt: Update sched_smt_present at runtime Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 15/79] x86/smp: Provide topology_is_primary_thread() Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 16/79] x86/topology: Provide topology_smt_supported() Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 17/79] cpu/hotplug: Make bringup/teardown of smp threads symmetric Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 18/79] cpu/hotplug: Split do_cpu_down() Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 19/79] cpu/hotplug: Provide knobs to control SMT Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 20/79] x86/cpu: Remove the pointless CPU printout Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 21/79] x86/cpu/AMD: Remove the pointless detect_ht() call Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 22/79] x86/cpu/common: Provide detect_ht_early() Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 23/79] x86/cpu/topology: Provide detect_extended_topology_early() Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 24/79] x86/cpu/intel: Evaluate smp_num_siblings early Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 25/79] x86/CPU/AMD: Do not check CPUID max ext level before parsing SMP info Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 26/79] x86/cpu/AMD: Evaluate smp_num_siblings early Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 28/79] x86/speculation/l1tf: Extend 64bit swap file size limit Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 29/79] x86/cpufeatures: Add detection of L1D cache flush support Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 30/79] x86/CPU/AMD: Move TOPOEXT reenablement before reading smp_num_siblings Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 31/79] x86/speculation/l1tf: Protect PAE swap entries against L1TF Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 32/79] x86/speculation/l1tf: Fix up pte->pfn conversion for PAE Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 33/79] Revert "x86/apic: Ignore secondary threads if nosmt=force" Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 34/79] cpu/hotplug: Boot HT siblings at least once Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 35/79] x86/KVM: Warn user if KVM is loaded SMT and L1TF CPU bug being present Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 36/79] x86/KVM/VMX: Add module argument for L1TF mitigation Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 37/79] x86/KVM/VMX: Add L1D flush algorithm Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 38/79] x86/KVM/VMX: Add L1D MSR based flush Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 39/79] x86/KVM/VMX: Add L1D flush logic Greg Kroah-Hartman
2018-08-14 17:16 ` [PATCH 4.18 40/79] x86/KVM/VMX: Split the VMX MSR LOAD structures to have an host/guest numbers Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 41/79] x86/KVM/VMX: Add find_msr() helper function Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 42/79] x86/KVM/VMX: Separate the VMX AUTOLOAD guest/host number accounting Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 43/79] x86/KVM/VMX: Extend add_atomic_switch_msr() to allow VMENTER only MSRs Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 44/79] x86/KVM/VMX: Use MSR save list for IA32_FLUSH_CMD if required Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 45/79] cpu/hotplug: Online siblings when SMT control is turned on Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 46/79] x86/litf: Introduce vmx status variable Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 47/79] x86/kvm: Drop L1TF MSR list approach Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 48/79] x86/l1tf: Handle EPT disabled state proper Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 49/79] x86/kvm: Move l1tf setup function Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 50/79] x86/kvm: Add static key for flush always Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 51/79] x86/kvm: Serialize L1D flush parameter setter Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 52/79] x86/kvm: Allow runtime control of L1D flush Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 53/79] cpu/hotplug: Expose SMT control init function Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 54/79] cpu/hotplug: Set CPU_SMT_NOT_SUPPORTED early Greg Kroah-Hartman
2018-08-14 17:17 ` Greg Kroah-Hartman [this message]
2018-08-14 17:17 ` [PATCH 4.18 56/79] Documentation: Add section about CPU vulnerabilities Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 57/79] x86/speculation/l1tf: Unbreak !__HAVE_ARCH_PFN_MODIFY_ALLOWED architectures Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 58/79] x86/KVM/VMX: Initialize the vmx_l1d_flush_pages content Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 59/79] Documentation/l1tf: Fix typos Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 60/79] cpu/hotplug: detect SMT disabled by BIOS Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 61/79] x86/KVM/VMX: Dont set l1tf_flush_l1d to true from vmx_l1d_flush() Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 62/79] x86/KVM/VMX: Replace vmx_l1d_flush_always with vmx_l1d_flush_cond Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 63/79] x86/KVM/VMX: Move the l1tf_flush_l1d test to vmx_l1d_flush() Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 64/79] x86/irq: Demote irq_cpustat_t::__softirq_pending to u16 Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 65/79] x86/KVM/VMX: Introduce per-host-cpu analogue of l1tf_flush_l1d Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 66/79] x86: Dont include linux/irq.h from asm/hardirq.h Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 67/79] x86/irq: Let interrupt handlers set kvm_cpu_l1tf_flush_l1d Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 68/79] x86/KVM/VMX: Dont set l1tf_flush_l1d from vmx_handle_external_intr() Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 69/79] Documentation/l1tf: Remove Yonah processors from not vulnerable list Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 70/79] x86/speculation: Simplify sysfs report of VMX L1TF vulnerability Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 71/79] x86/speculation: Use ARCH_CAPABILITIES to skip L1D flush on vmentry Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 72/79] KVM: VMX: Tell the nested hypervisor " Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 73/79] cpu/hotplug: Fix SMT supported evaluation Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 74/79] x86/speculation/l1tf: Invert all not present mappings Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 75/79] x86/speculation/l1tf: Make pmd/pud_mknotpresent() invert Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 76/79] x86/mm/pat: Make set_memory_np() L1TF safe Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 77/79] x86/mm/kmmio: Make the tracer robust against L1TF Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 78/79] tools headers: Synchronise x86 cpufeatures.h for L1TF additions Greg Kroah-Hartman
2018-08-14 17:17 ` [PATCH 4.18 79/79] x86/microcode: Allow late microcode loading with SMT disabled Greg Kroah-Hartman
2018-08-15 6:12 ` [PATCH 4.18 00/79] 4.18.1-stable review Greg Kroah-Hartman
2018-08-15 13:16 ` Guenter Roeck
2018-08-15 15:32 ` Greg Kroah-Hartman
2018-08-15 20:12 ` Dan Rue
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