diff for duplicates of <20180818155430.5586-8-digetx@gmail.com> diff --git a/a/1.txt b/N1/1.txt index 1f29eba..3dd5933 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -2,7 +2,7 @@ Device tree binding of Memory Controller has been changed: GART has been squashed into the MC, there are a new mandatory clock and #iommu-cells properties. -Signed-off-by: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> +Signed-off-by: Dmitry Osipenko <digetx@gmail.com> --- arch/arm/boot/dts/tegra20.dtsi | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/a/content_digest b/N1/content_digest index 8ecb500..2ba7abd 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,24 +1,23 @@ "ref\020180818155430.5586-1-digetx@gmail.com\0" - "ref\020180818155430.5586-1-digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org\0" - "From\0Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\0" + "From\0Dmitry Osipenko <digetx@gmail.com>\0" "Subject\0[PATCH v3 07/19] ARM: dts: tegra20: Update Memory Controller node to the new binding\0" "Date\0Sat, 18 Aug 2018 18:54:18 +0300\0" - "To\0Joerg Roedel <joro-zLv9SwRftAIdnm+yROfE0A@public.gmane.org>" - Robin Murphy <robin.murphy-5wv7dgnIgG8@public.gmane.org> - Thierry Reding <thierry.reding-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org> - Jonathan Hunter <jonathanh-DDmLM1+adcrQT0dZR+AlfA@public.gmane.org> - " Rob Herring <robh+dt-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org>\0" - "Cc\0linux-tegra-u79uwXL29TY76Z2rM5mHXA@public.gmane.org" - devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org - iommu-cunTk1MwBs9QetFLy7KEm3xJsTq8ys+cHZ5vskTnxNA@public.gmane.org - " linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org\0" + "To\0Joerg Roedel <joro@8bytes.org>" + Robin Murphy <robin.murphy@arm.com> + Thierry Reding <thierry.reding@gmail.com> + Jonathan Hunter <jonathanh@nvidia.com> + " Rob Herring <robh+dt@kernel.org>\0" + "Cc\0iommu@lists.linux-foundation.org" + devicetree@vger.kernel.org + linux-tegra@vger.kernel.org + " linux-kernel@vger.kernel.org\0" "\00:1\0" "b\0" "Device tree binding of Memory Controller has been changed: GART has been\n" "squashed into the MC, there are a new mandatory clock and #iommu-cells\n" "properties.\n" "\n" - "Signed-off-by: Dmitry Osipenko <digetx-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>\n" + "Signed-off-by: Dmitry Osipenko <digetx@gmail.com>\n" "---\n" " arch/arm/boot/dts/tegra20.dtsi | 13 +++++--------\n" " 1 file changed, 5 insertions(+), 8 deletions(-)\n" @@ -52,4 +51,4 @@ "-- \n" 2.18.0 -af8207b25f7dd84393adee4d83e5feb725754560821649b99387863971a32449 +bc97d454243f652e56c09dd471ac097777a14d9f8e05d86bd5dd706876ee3de8
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