From mboxrd@z Thu Jan 1 00:00:00 1970 From: boris.brezillon@bootlin.com (Boris Brezillon) Date: Fri, 24 Aug 2018 11:07:13 +0200 Subject: [PATCH 2/2] drm/atmel-hlcdc: allow selecting a higher pixel-clock that requested In-Reply-To: <20180824085501.9740-3-peda@axentia.se> References: <20180824085501.9740-1-peda@axentia.se> <20180824085501.9740-3-peda@axentia.se> Message-ID: <20180824110713.3c801034@bbrezillon> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Fri, 24 Aug 2018 10:55:01 +0200 Peter Rosin wrote: > But only if the highest pixel-clock frequency lower than requested > is significantly much less accurate that the lowest frequency higher > than requested. > > I pulled "10 times" as the discriminator out of the hat, and went with > that. Okay, let's go with that until we have a way to properly expose display tolerance. > > This is useful, if e.g. the target pixel-clock is 65MHz and the sys_clk > is 132MHz. In this case the highest possible pixel-clock lower than the > requested 65MHz is 52.8MHz, which is almost 20% off (and outside the > spec for the panel). The lowest possible pixel-clock higher than 65MHz > is 66MHz, which is a *much* better match, and only 1.5% off. > > Signed-off-by: Peter Rosin > --- > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c > index 71c9cd90d2ae..0c2717ed4ac6 100644 > --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c > +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c > @@ -116,6 +116,19 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) > div = DIV_ROUND_UP(prate, mode_rate); > if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) > div = ATMEL_HLCDC_CLKDIV_MASK; > + } else { > + int div_low = prate / mode_rate; > + > + if (div_low >= 2 && > + ((prate / div_low - mode_rate) < > + 10 * (mode_rate - prate / div))) > + /* > + * At least 10 times better when > + * using a higher frequency than > + * requested, instead of a lower. > + * So, go with that. > + */ > + div = div_low; > } > > cfg |= ATMEL_HLCDC_CLKDIV(div); From mboxrd@z Thu Jan 1 00:00:00 1970 From: Boris Brezillon Subject: Re: [PATCH 2/2] drm/atmel-hlcdc: allow selecting a higher pixel-clock that requested Date: Fri, 24 Aug 2018 11:07:13 +0200 Message-ID: <20180824110713.3c801034@bbrezillon> References: <20180824085501.9740-1-peda@axentia.se> <20180824085501.9740-3-peda@axentia.se> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mail.bootlin.com (mail.bootlin.com [62.4.15.54]) by gabe.freedesktop.org (Postfix) with ESMTP id 6477D6E653 for ; Fri, 24 Aug 2018 09:07:25 +0000 (UTC) In-Reply-To: <20180824085501.9740-3-peda@axentia.se> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: dri-devel-bounces@lists.freedesktop.org Sender: "dri-devel" To: Peter Rosin Cc: Alexandre Belloni , David Airlie , linux-kernel@vger.kernel.org, dri-devel@lists.freedesktop.org, Nicolas Ferre , linux-arm-kernel@lists.infradead.org List-Id: dri-devel@lists.freedesktop.org T24gRnJpLCAyNCBBdWcgMjAxOCAxMDo1NTowMSArMDIwMApQZXRlciBSb3NpbiA8cGVkYUBheGVu dGlhLnNlPiB3cm90ZToKCj4gQnV0IG9ubHkgaWYgdGhlIGhpZ2hlc3QgcGl4ZWwtY2xvY2sgZnJl cXVlbmN5IGxvd2VyIHRoYW4gcmVxdWVzdGVkCj4gaXMgc2lnbmlmaWNhbnRseSBtdWNoIGxlc3Mg YWNjdXJhdGUgdGhhdCB0aGUgbG93ZXN0IGZyZXF1ZW5jeSBoaWdoZXIKPiB0aGFuIHJlcXVlc3Rl ZC4KPiAKPiBJIHB1bGxlZCAiMTAgdGltZXMiIGFzIHRoZSBkaXNjcmltaW5hdG9yIG91dCBvZiB0 aGUgaGF0LCBhbmQgd2VudCB3aXRoCj4gdGhhdC4KCk9rYXksIGxldCdzIGdvIHdpdGggdGhhdCB1 bnRpbCB3ZSBoYXZlIGEgd2F5IHRvIHByb3Blcmx5IGV4cG9zZSBkaXNwbGF5CnRvbGVyYW5jZS4K Cj4gCj4gVGhpcyBpcyB1c2VmdWwsIGlmIGUuZy4gdGhlIHRhcmdldCBwaXhlbC1jbG9jayBpcyA2 NU1IeiBhbmQgdGhlIHN5c19jbGsKPiBpcyAxMzJNSHouIEluIHRoaXMgY2FzZSB0aGUgaGlnaGVz dCBwb3NzaWJsZSBwaXhlbC1jbG9jayBsb3dlciB0aGFuIHRoZQo+IHJlcXVlc3RlZCA2NU1IeiBp cyA1Mi44TUh6LCB3aGljaCBpcyBhbG1vc3QgMjAlIG9mZiAoYW5kIG91dHNpZGUgdGhlCj4gc3Bl YyBmb3IgdGhlIHBhbmVsKS4gVGhlIGxvd2VzdCBwb3NzaWJsZSBwaXhlbC1jbG9jayBoaWdoZXIg dGhhbiA2NU1Iego+IGlzIDY2TUh6LCB3aGljaCBpcyBhICptdWNoKiBiZXR0ZXIgbWF0Y2gsIGFu ZCBvbmx5IDEuNSUgb2ZmLgo+IAo+IFNpZ25lZC1vZmYtYnk6IFBldGVyIFJvc2luIDxwZWRhQGF4 ZW50aWEuc2U+Cj4gLS0tCj4gIGRyaXZlcnMvZ3B1L2RybS9hdG1lbC1obGNkYy9hdG1lbF9obGNk Y19jcnRjLmMgfCAxMyArKysrKysrKysrKysrCj4gIDEgZmlsZSBjaGFuZ2VkLCAxMyBpbnNlcnRp b25zKCspCj4gCj4gZGlmZiAtLWdpdCBhL2RyaXZlcnMvZ3B1L2RybS9hdG1lbC1obGNkYy9hdG1l bF9obGNkY19jcnRjLmMgYi9kcml2ZXJzL2dwdS9kcm0vYXRtZWwtaGxjZGMvYXRtZWxfaGxjZGNf Y3J0Yy5jCj4gaW5kZXggNzFjOWNkOTBkMmFlLi4wYzI3MTdlZDRhYzYgMTAwNjQ0Cj4gLS0tIGEv ZHJpdmVycy9ncHUvZHJtL2F0bWVsLWhsY2RjL2F0bWVsX2hsY2RjX2NydGMuYwo+ICsrKyBiL2Ry aXZlcnMvZ3B1L2RybS9hdG1lbC1obGNkYy9hdG1lbF9obGNkY19jcnRjLmMKPiBAQCAtMTE2LDYg KzExNiwxOSBAQCBzdGF0aWMgdm9pZCBhdG1lbF9obGNkY19jcnRjX21vZGVfc2V0X25vZmIoc3Ry dWN0IGRybV9jcnRjICpjKQo+ICAJCWRpdiA9IERJVl9ST1VORF9VUChwcmF0ZSwgbW9kZV9yYXRl KTsKPiAgCQlpZiAoQVRNRUxfSExDRENfQ0xLRElWKGRpdikgJiB+QVRNRUxfSExDRENfQ0xLRElW X01BU0spCj4gIAkJCWRpdiA9IEFUTUVMX0hMQ0RDX0NMS0RJVl9NQVNLOwo+ICsJfSBlbHNlIHsK PiArCQlpbnQgZGl2X2xvdyA9IHByYXRlIC8gbW9kZV9yYXRlOwo+ICsKPiArCQlpZiAoZGl2X2xv dyA+PSAyICYmCj4gKwkJICAgICgocHJhdGUgLyBkaXZfbG93IC0gbW9kZV9yYXRlKSA8Cj4gKwkJ ICAgICAxMCAqIChtb2RlX3JhdGUgLSBwcmF0ZSAvIGRpdikpKQo+ICsJCQkvKgo+ICsJCQkgKiBB dCBsZWFzdCAxMCB0aW1lcyBiZXR0ZXIgd2hlbgo+ICsJCQkgKiB1c2luZyBhIGhpZ2hlciBmcmVx dWVuY3kgdGhhbgo+ICsJCQkgKiByZXF1ZXN0ZWQsIGluc3RlYWQgb2YgYSBsb3dlci4KPiArCQkJ ICogU28sIGdvIHdpdGggdGhhdC4KPiArCQkJICovCj4gKwkJCWRpdiA9IGRpdl9sb3c7Cj4gIAl9 Cj4gIAo+ICAJY2ZnIHw9IEFUTUVMX0hMQ0RDX0NMS0RJVihkaXYpOwoKX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KZHJpLWRldmVsIG1haWxpbmcgbGlzdApk cmktZGV2ZWxAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Au b3JnL21haWxtYW4vbGlzdGluZm8vZHJpLWRldmVsCg== From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-1.0 required=3.0 tests=HEADER_FROM_DIFFERENT_DOMAINS, MAILING_LIST_MULTI,SPF_PASS autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 097F9C4321D for ; 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Fri, 24 Aug 2018 11:07:15 +0200 (CEST) Date: Fri, 24 Aug 2018 11:07:13 +0200 From: Boris Brezillon To: Peter Rosin Cc: linux-kernel@vger.kernel.org, David Airlie , Nicolas Ferre , Alexandre Belloni , dri-devel@lists.freedesktop.org, linux-arm-kernel@lists.infradead.org Subject: Re: [PATCH 2/2] drm/atmel-hlcdc: allow selecting a higher pixel-clock that requested Message-ID: <20180824110713.3c801034@bbrezillon> In-Reply-To: <20180824085501.9740-3-peda@axentia.se> References: <20180824085501.9740-1-peda@axentia.se> <20180824085501.9740-3-peda@axentia.se> X-Mailer: Claws Mail 3.15.0-dirty (GTK+ 2.24.31; x86_64-pc-linux-gnu) MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Fri, 24 Aug 2018 10:55:01 +0200 Peter Rosin wrote: > But only if the highest pixel-clock frequency lower than requested > is significantly much less accurate that the lowest frequency higher > than requested. > > I pulled "10 times" as the discriminator out of the hat, and went with > that. Okay, let's go with that until we have a way to properly expose display tolerance. > > This is useful, if e.g. the target pixel-clock is 65MHz and the sys_clk > is 132MHz. In this case the highest possible pixel-clock lower than the > requested 65MHz is 52.8MHz, which is almost 20% off (and outside the > spec for the panel). The lowest possible pixel-clock higher than 65MHz > is 66MHz, which is a *much* better match, and only 1.5% off. > > Signed-off-by: Peter Rosin > --- > drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c | 13 +++++++++++++ > 1 file changed, 13 insertions(+) > > diff --git a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c > index 71c9cd90d2ae..0c2717ed4ac6 100644 > --- a/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c > +++ b/drivers/gpu/drm/atmel-hlcdc/atmel_hlcdc_crtc.c > @@ -116,6 +116,19 @@ static void atmel_hlcdc_crtc_mode_set_nofb(struct drm_crtc *c) > div = DIV_ROUND_UP(prate, mode_rate); > if (ATMEL_HLCDC_CLKDIV(div) & ~ATMEL_HLCDC_CLKDIV_MASK) > div = ATMEL_HLCDC_CLKDIV_MASK; > + } else { > + int div_low = prate / mode_rate; > + > + if (div_low >= 2 && > + ((prate / div_low - mode_rate) < > + 10 * (mode_rate - prate / div))) > + /* > + * At least 10 times better when > + * using a higher frequency than > + * requested, instead of a lower. > + * So, go with that. > + */ > + div = div_low; > } > > cfg |= ATMEL_HLCDC_CLKDIV(div);