diff for duplicates of <20180827080757.GM3850@dragon> diff --git a/a/1.txt b/N1/1.txt index deb6141..66bb411 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -105,51 +105,51 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > +&i2c0 { > + status = "okay"; > + -> + pca9847 at 77 { +> + pca9847@77 { > + compatible = "nxp,pca9847"; > + reg = <0x77>; > + #address-cells = <1>; > + #size-cells = <0>; > + -> + i2c at 2 { +> + i2c@2 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x2>; > + -> + ina220 at 40 { +> + ina220@40 { > + compatible = "ti,ina220"; > + reg = <0x40>; > + shunt-resistor = <1000>; > + }; > + -> + ina220 at 41 { +> + ina220@41 { > + compatible = "ti,ina220"; > + reg = <0x41>; > + shunt-resistor = <1000>; > + }; > + }; > + -> + i2c at 3 { +> + i2c@3 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x3>; > + -> + eeprom at 56 { +> + eeprom@56 { > + compatible = "atmel,24c512"; > + reg = <0x56>; > + }; > + -> + eeprom at 57 { +> + eeprom@57 { > + compatible = "atmel,24c512"; > + reg = <0x57>; > + }; > + -> + sa56004 at 4c { +> + sa56004@4c { > + compatible = "nxp,sa56004"; > + reg = <0x4c>; > + }; > + -> + rtc at 51 { +> + rtc@51 { > + compatible = "nxp,pcf2129"; > + reg = <0x51>; > + }; @@ -191,35 +191,35 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + > +&i2c0 { > + status = "okay"; -> + pca9847 at 77 { +> + pca9847@77 { > + compatible = "nxp,pca9847"; > + reg = <0x77>; > + #address-cells = <1>; > + #size-cells = <0>; > + -> + i2c at 2 { +> + i2c@2 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x02>; > + -> + ina220 at 40 { +> + ina220@40 { > + compatible = "ti,ina220"; > + reg = <0x40>; > + shunt-resistor = <500>; > + }; > + }; > + -> + i2c at 3 { +> + i2c@3 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x3>; > + -> + sa56004 at 4c { +> + sa56004@4c { > + compatible = "nxp,sa56004"; > + reg = <0x4c>; > + }; > + -> + rtc at 51 { +> + rtc@51 { > + compatible = "nxp,pcf2129"; > + reg = <0x51>; > + }; @@ -265,7 +265,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu0: cpu at 0 { +> + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72"; > + reg = <0x0>; @@ -275,7 +275,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + #cooling-cells = <2>; > + }; > + -> + cpu1: cpu at 1 { +> + cpu1: cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72"; > + reg = <0x1>; @@ -306,7 +306,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + }; > + }; > + -> + memory at 80000000 { +> + memory@80000000 { > + device_type = "memory"; > + }; > + @@ -348,7 +348,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + gic: interrupt-controller at 6000000 { +> + gic: interrupt-controller@6000000 { > + compatible= "arm,gic-v3"; > + #address-cells = <2>; > + #size-cells = <2>; @@ -359,7 +359,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + interrupt-controller; > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) | > + IRQ_TYPE_LEVEL_LOW)>; -> + its:gic-its at 6020000 { +> + its:gic-its@6020000 { > + compatible = "arm,gic-v3-its"; > + msi-controller; > + reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */ @@ -372,7 +372,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + #size-cells = <2>; > + ranges; > + -> + smmu: iommu at 5000000 { +> + smmu: iommu@5000000 { > + compatible = "arm,mmu-500"; > + reg = <0 0x5000000 0 0x800000>; > + #global-interrupts = <8>; @@ -424,33 +424,33 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + <0 208 4>, <0 209 4>; > + }; > + -> + ddr: memory-controller at 1080000 { +> + ddr: memory-controller@1080000 { > + compatible = "fsl,qoriq-memory-controller"; > + reg = <0x0 0x1080000 0x0 0x1000>; > + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; > + big-endian; > + }; > + -> + scfg: scfg at 1fc0000 { +> + scfg: scfg@1fc0000 { > + compatible = "fsl,ls1028a-scfg", "syscon"; > + reg = <0x0 0x1fc0000 0x0 0x10000>; > + big-endian; > + }; > + -> + dcfg: dcfg at 1e00000 { +> + dcfg: dcfg@1e00000 { > + compatible = "fsl,ls1028a-dcfg", "syscon"; > + reg = <0x0 0x1e00000 0x0 0x10000>; > + big-endian; > + }; > + -> + clockgen: clocking at 1300000 { +> + clockgen: clocking@1300000 { > + compatible = "fsl,ls1028a-clockgen"; > + reg = <0x0 0x1300000 0x0 0xa0000>; > + #clock-cells = <2>; > + clocks = <&sysclk>; > + }; > + -> + i2c0: i2c at 2000000 { +> + i2c0: i2c@2000000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -461,7 +461,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + i2c1: i2c at 2010000 { +> + i2c1: i2c@2010000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -471,7 +471,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + i2c2: i2c at 2020000 { +> + i2c2: i2c@2020000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -481,7 +481,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + i2c3: i2c at 2030000 { +> + i2c3: i2c@2030000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -491,7 +491,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + i2c4: i2c at 2040000 { +> + i2c4: i2c@2040000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -501,7 +501,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + i2c5: i2c at 2050000 { +> + i2c5: i2c@2050000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -511,7 +511,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + i2c6: i2c at 2060000 { +> + i2c6: i2c@2060000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -521,7 +521,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + i2c7: i2c at 2070000 { +> + i2c7: i2c@2070000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -531,21 +531,21 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + duart0: serial at 21c0500 { +> + duart0: serial@21c0500 { > + compatible = "fsl,ns16550", "ns16550a"; > + reg = <0x00 0x21c0500 0x0 0x100>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clockgen 4 1>; > + }; > + -> + duart1: serial at 21c0600 { +> + duart1: serial@21c0600 { > + compatible = "fsl,ns16550", "ns16550a"; > + reg = <0x00 0x21c0600 0x0 0x100>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; > + clocks = <&clockgen 4 1>; > + }; > + -> + gpio1: gpio at 2300000 { +> + gpio1: gpio@2300000 { > + compatible = "fsl,qoriq-gpio"; > + reg = <0x0 0x2300000 0x0 0x10000>; > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; @@ -555,7 +555,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + #interrupt-cells = <2>; > + }; > + -> + gpio2: gpio at 2310000 { +> + gpio2: gpio@2310000 { > + compatible = "fsl,qoriq-gpio"; > + reg = <0x0 0x2310000 0x0 0x10000>; > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; @@ -565,7 +565,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + #interrupt-cells = <2>; > + }; > + -> + gpio3: gpio at 2320000 { +> + gpio3: gpio@2320000 { > + compatible = "fsl,qoriq-gpio"; > + reg = <0x0 0x2320000 0x0 0x10000>; > + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; @@ -575,7 +575,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + #interrupt-cells = <2>; > + }; > + -> + wdog0: watchdog at 23c0000 { +> + wdog0: watchdog@23c0000 { > + compatible= "arm,armv8-timer"; > + reg = <0x0 0x23c0000 0x0 0x10000>; > + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; @@ -584,7 +584,7 @@ On Fri, Aug 24, 2018 at 12:28:04PM +0530, Bhaskar Upadhaya wrote: > + status = "disabled"; > + }; > + -> + sata: sata at 3200000 { +> + sata: sata@3200000 { > + compatible = "fsl,ls1028a-ahci"; > + reg = <0x0 0x3200000 0x0 0x10000>, > + <0x0 0x20140520 0x0 0x4>; diff --git a/a/content_digest b/N1/content_digest index 163a42c..689eebd 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,8 +1,15 @@ "ref\01535093884-4945-1-git-send-email-Bhaskar.Upadhaya@nxp.com\0" - "From\0shawnguo@kernel.org (Shawn Guo)\0" - "Subject\0[PATCH] arm64: dts: Add support for NXP LS1028A SoC\0" + "From\0Shawn Guo <shawnguo@kernel.org>\0" + "Subject\0Re: [PATCH] arm64: dts: Add support for NXP LS1028A SoC\0" "Date\0Mon, 27 Aug 2018 16:07:59 +0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Bhaskar Upadhaya <Bhaskar.Upadhaya@nxp.com>" + " Li Yang <leoyang.li@nxp.com>\0" + "Cc\0devicetree@vger.kernel.org" + Sudhanshu Gupta <sudhanshu.gupta@nxp.com> + Rai Harninder <harninder.rai@nxp.com> + stuart.yoder@nxp.com + oss@buserror.net + " linux-arm-kernel@lists.infradead.org\0" "\00:1\0" "b\0" "Please resend with Li Yang <leoyang.li@nxp.com> on copy.\n" @@ -112,51 +119,51 @@ "> +&i2c0 {\n" "> +\tstatus = \"okay\";\n" "> +\n" - "> +\tpca9847 at 77 {\n" + "> +\tpca9847@77 {\n" "> +\t\tcompatible = \"nxp,pca9847\";\n" "> +\t\treg = <0x77>;\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\ti2c at 2 {\n" + "> +\t\ti2c@2 {\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\treg = <0x2>;\n" "> +\n" - "> +\t\t\tina220 at 40 {\n" + "> +\t\t\tina220@40 {\n" "> +\t\t\t\tcompatible = \"ti,ina220\";\n" "> +\t\t\t\treg = <0x40>;\n" "> +\t\t\t\tshunt-resistor = <1000>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tina220 at 41 {\n" + "> +\t\t\tina220@41 {\n" "> +\t\t\t\tcompatible = \"ti,ina220\";\n" "> +\t\t\t\treg = <0x41>;\n" "> +\t\t\t\tshunt-resistor = <1000>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c at 3 {\n" + "> +\t\ti2c@3 {\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\treg = <0x3>;\n" "> +\n" - "> +\t\t\teeprom at 56 {\n" + "> +\t\t\teeprom@56 {\n" "> +\t\t\t\tcompatible = \"atmel,24c512\";\n" "> +\t\t\t\treg = <0x56>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\teeprom at 57 {\n" + "> +\t\t\teeprom@57 {\n" "> +\t\t\t\tcompatible = \"atmel,24c512\";\n" "> +\t\t\t\treg = <0x57>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tsa56004 at 4c {\n" + "> +\t\t\tsa56004@4c {\n" "> +\t\t\t\tcompatible = \"nxp,sa56004\";\n" "> +\t\t\t\treg = <0x4c>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\trtc at 51 {\n" + "> +\t\t\trtc@51 {\n" "> +\t\t\t\tcompatible = \"nxp,pcf2129\";\n" "> +\t\t\t\treg = <0x51>;\n" "> +\t\t\t};\n" @@ -198,35 +205,35 @@ "> +\n" "> +&i2c0 {\n" "> +\tstatus = \"okay\";\n" - "> +\tpca9847 at 77 {\n" + "> +\tpca9847@77 {\n" "> +\t\tcompatible = \"nxp,pca9847\";\n" "> +\t\treg = <0x77>;\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\ti2c at 2 {\n" + "> +\t\ti2c@2 {\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\treg = <0x02>;\n" "> +\n" - "> +\t\t\tina220 at 40 {\n" + "> +\t\t\tina220@40 {\n" "> +\t\t\t\tcompatible = \"ti,ina220\";\n" "> +\t\t\t\treg = <0x40>;\n" "> +\t\t\t\tshunt-resistor = <500>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c at 3 {\n" + "> +\t\ti2c@3 {\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\treg = <0x3>;\n" "> +\n" - "> +\t\t\tsa56004 at 4c {\n" + "> +\t\t\tsa56004@4c {\n" "> +\t\t\t\tcompatible = \"nxp,sa56004\";\n" "> +\t\t\t\treg = <0x4c>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\trtc at 51 {\n" + "> +\t\t\trtc@51 {\n" "> +\t\t\t\tcompatible = \"nxp,pcf2129\";\n" "> +\t\t\t\treg = <0x51>;\n" "> +\t\t\t};\n" @@ -272,7 +279,7 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tcpu0: cpu at 0 {\n" + "> +\t\tcpu0: cpu@0 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a72\";\n" "> +\t\t\treg = <0x0>;\n" @@ -282,7 +289,7 @@ "> +\t\t\t#cooling-cells = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpu1: cpu at 1 {\n" + "> +\t\tcpu1: cpu@1 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a72\";\n" "> +\t\t\treg = <0x1>;\n" @@ -313,7 +320,7 @@ "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tmemory at 80000000 {\n" + "> +\tmemory@80000000 {\n" "> +\t\tdevice_type = \"memory\";\n" "> +\t};\n" "> +\n" @@ -355,7 +362,7 @@ "> +\t\tstatus = \"disabled\";\n" "> +\t};\n" "> +\n" - "> +\tgic: interrupt-controller at 6000000 {\n" + "> +\tgic: interrupt-controller@6000000 {\n" "> +\t\tcompatible= \"arm,gic-v3\";\n" "> +\t\t#address-cells = <2>;\n" "> +\t\t#size-cells = <2>;\n" @@ -366,7 +373,7 @@ "> +\t\tinterrupt-controller;\n" "> +\t\tinterrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |\n" "> +\t\t\t\t\t IRQ_TYPE_LEVEL_LOW)>;\n" - "> +\t\tits:gic-its at 6020000 {\n" + "> +\t\tits:gic-its@6020000 {\n" "> +\t\t\tcompatible = \"arm,gic-v3-its\";\n" "> +\t\t\tmsi-controller;\n" "> +\t\t\treg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */\n" @@ -379,7 +386,7 @@ "> +\t\t#size-cells = <2>;\n" "> +\t\tranges;\n" "> +\n" - "> +\t\tsmmu: iommu at 5000000 {\n" + "> +\t\tsmmu: iommu@5000000 {\n" "> +\t\t\tcompatible = \"arm,mmu-500\";\n" "> +\t\t\treg = <0 0x5000000 0 0x800000>;\n" "> +\t\t\t#global-interrupts = <8>;\n" @@ -431,33 +438,33 @@ "> +\t\t\t\t <0 208 4>, <0 209 4>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tddr: memory-controller at 1080000 {\n" + "> +\t\tddr: memory-controller@1080000 {\n" "> +\t\t\tcompatible = \"fsl,qoriq-memory-controller\";\n" "> +\t\t\treg = <0x0 0x1080000 0x0 0x1000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\t\t\tbig-endian;\n" "> +\t\t};\n" "> +\n" - "> +\t\tscfg: scfg at 1fc0000 {\n" + "> +\t\tscfg: scfg@1fc0000 {\n" "> +\t\t\tcompatible = \"fsl,ls1028a-scfg\", \"syscon\";\n" "> +\t\t\treg = <0x0 0x1fc0000 0x0 0x10000>;\n" "> +\t\t\tbig-endian;\n" "> +\t\t};\n" "> +\n" - "> +\t\tdcfg: dcfg at 1e00000 {\n" + "> +\t\tdcfg: dcfg@1e00000 {\n" "> +\t\t\tcompatible = \"fsl,ls1028a-dcfg\", \"syscon\";\n" "> +\t\t\treg = <0x0 0x1e00000 0x0 0x10000>;\n" "> +\t\t\tbig-endian;\n" "> +\t\t};\n" "> +\n" - "> +\t\tclockgen: clocking at 1300000 {\n" + "> +\t\tclockgen: clocking@1300000 {\n" "> +\t\t\tcompatible = \"fsl,ls1028a-clockgen\";\n" "> +\t\t\treg = <0x0 0x1300000 0x0 0xa0000>;\n" "> +\t\t\t#clock-cells = <2>;\n" "> +\t\t\tclocks = <&sysclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c0: i2c at 2000000 {\n" + "> +\t\ti2c0: i2c@2000000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -468,7 +475,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c1: i2c at 2010000 {\n" + "> +\t\ti2c1: i2c@2010000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -478,7 +485,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c2: i2c at 2020000 {\n" + "> +\t\ti2c2: i2c@2020000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -488,7 +495,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c3: i2c at 2030000 {\n" + "> +\t\ti2c3: i2c@2030000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -498,7 +505,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c4: i2c at 2040000 {\n" + "> +\t\ti2c4: i2c@2040000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -508,7 +515,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c5: i2c at 2050000 {\n" + "> +\t\ti2c5: i2c@2050000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -518,7 +525,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c6: i2c at 2060000 {\n" + "> +\t\ti2c6: i2c@2060000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -528,7 +535,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c7: i2c at 2070000 {\n" + "> +\t\ti2c7: i2c@2070000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -538,21 +545,21 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tduart0: serial at 21c0500 {\n" + "> +\t\tduart0: serial@21c0500 {\n" "> +\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n" "> +\t\t\treg = <0x00 0x21c0500 0x0 0x100>;\n" "> +\t\t\tinterrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\t\t\tclocks = <&clockgen 4 1>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tduart1: serial at 21c0600 {\n" + "> +\t\tduart1: serial@21c0600 {\n" "> +\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n" "> +\t\t\treg = <0x00 0x21c0600 0x0 0x100>;\n" "> +\t\t\tinterrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\t\t\tclocks = <&clockgen 4 1>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tgpio1: gpio at 2300000 {\n" + "> +\t\tgpio1: gpio@2300000 {\n" "> +\t\t\tcompatible = \"fsl,qoriq-gpio\";\n" "> +\t\t\treg = <0x0 0x2300000 0x0 0x10000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -562,7 +569,7 @@ "> +\t\t\t#interrupt-cells = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tgpio2: gpio at 2310000 {\n" + "> +\t\tgpio2: gpio@2310000 {\n" "> +\t\t\tcompatible = \"fsl,qoriq-gpio\";\n" "> +\t\t\treg = <0x0 0x2310000 0x0 0x10000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -572,7 +579,7 @@ "> +\t\t\t#interrupt-cells = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tgpio3: gpio at 2320000 {\n" + "> +\t\tgpio3: gpio@2320000 {\n" "> +\t\t\tcompatible = \"fsl,qoriq-gpio\";\n" "> +\t\t\treg = <0x0 0x2320000 0x0 0x10000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -582,7 +589,7 @@ "> +\t\t\t#interrupt-cells = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\twdog0: watchdog at 23c0000 {\n" + "> +\t\twdog0: watchdog@23c0000 {\n" "> +\t\t\tcompatible= \"arm,armv8-timer\";\n" "> +\t\t\treg = <0x0 0x23c0000 0x0 0x10000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -591,7 +598,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsata: sata at 3200000 {\n" + "> +\t\tsata: sata@3200000 {\n" "> +\t\t\tcompatible = \"fsl,ls1028a-ahci\";\n" "> +\t\t\treg = <0x0 0x3200000 0x0 0x10000>,\n" "> +\t\t\t\t<0x0 0x20140520 0x0 0x4>;\n" @@ -608,4 +615,4 @@ "> 1.9.1\n" > -75ab17ac2793df94e1fcf8a84d5b3102b7eb06f8382f3bca1d9ef649258ab616 +9fa16a031a11aa6894e8331f6a915d75e47904dbeb0fd07b9482ae6c1f7920ed
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