From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Return-Path: Date: Tue, 4 Sep 2018 12:36:31 +0300 From: Mika Westerberg To: Daniel Drake Cc: Bjorn Helgaas , Bjorn Helgaas , linux-pci@vger.kernel.org, Linux Upstreaming Team , nouveau@lists.freedesktop.org, Linux PM , Peter Wu , kherbst@redhat.com, Andy Shevchenko , "Rafael J. Wysocki" , Keith Busch , Jon Derrick Subject: Re: [PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues Message-ID: <20180904093631.GN2283@lahna.fi.intel.com> References: <20180831073057.14626-1-drake@endlessm.com> <20180831191225.GA43106@bhelgaas-glaptop.roam.corp.google.com> <20180903121209.GC2283@lahna.fi.intel.com> <20180904064307.GM2283@lahna.fi.intel.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: List-ID: On Tue, Sep 04, 2018 at 03:07:52PM +0800, Daniel Drake wrote: > On Tue, Sep 4, 2018 at 2:43 PM, Mika Westerberg > wrote: > > Yes, can you check if the failing device BAR is included in any of the > > above entries? If not then it is probably not related. > > mtrr again for reference: > reg00: base=0x0c0000000 ( 3072MB), size= 1024MB, count=1: uncachable > reg01: base=0x0a0000000 ( 2560MB), size= 512MB, count=1: uncachable > reg02: base=0x090000000 ( 2304MB), size= 256MB, count=1: uncachable > reg03: base=0x08c000000 ( 2240MB), size= 64MB, count=1: uncachable > reg04: base=0x08b800000 ( 2232MB), size= 8MB, count=1: uncachable > > > The PCI bridge is: > 00:1c.0 PCI bridge: Intel Corporation Sunrise Point-LP PCI Express > Root Port (rev f1) (prog-if 00 [Normal decode]) > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- > ParErr- Stepping- SERR- FastB2B- DisINTx+ > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- > SERR- Latency: 0, Cache Line Size: 64 bytes > Interrupt: pin A routed to IRQ 122 > Bus: primary=00, secondary=01, subordinate=01, sec-latency=0 > I/O behind bridge: 0000e000-0000efff > Memory behind bridge: ee000000-ef0fffff > Prefetchable memory behind bridge: 00000000d0000000-00000000e1ffffff > > The memory behind bridge at ee000000 is included in the mtrr region > reg00 which is 0xc0000000 to 0xffffffff. > Same for the prefetchable memory behind bridge. Yeah and it is uncachable so it should be fine. > The nvidia GPU which becomes unresponsive is: > > 01:00.0 3D controller: NVIDIA Corporation GM108M [GeForce 940MX] (rev a2) > Subsystem: ASUSTeK Computer Inc. GM108M [GeForce 940MX] > Control: I/O+ Mem+ BusMaster+ SpecCycle- MemWINV- VGASnoop- > ParErr- Stepping- SERR- FastB2B- DisINTx+ > Status: Cap+ 66MHz- UDF- FastB2B- ParErr- DEVSEL=fast >TAbort- > SERR- Latency: 0, Cache Line Size: 64 bytes > Interrupt: pin A routed to IRQ 133 > Region 0: Memory at ee000000 (32-bit, non-prefetchable) [size=16M] > Region 1: Memory at d0000000 (64-bit, prefetchable) [size=256M] > Region 3: Memory at e0000000 (64-bit, prefetchable) [size=32M] > Region 5: I/O ports at e000 [size=128] > Expansion ROM at ef000000 [disabled] [size=512K] > > Region 0, 1, 3 and the expansion ROM are all included in the mtrr region reg00. > > > The magic register that we write to workaround the issue is in PCI > bridge config space - not in a BAR. OK, I just wanted to rule out MTRR misconfiguration but I guess it is not the case here. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Mika Westerberg Subject: Re: [PATCH] PCI: add prefetch quirk to work around Asus/Nvidia suspend issues Date: Tue, 4 Sep 2018 12:36:31 +0300 Message-ID: <20180904093631.GN2283@lahna.fi.intel.com> References: <20180831073057.14626-1-drake@endlessm.com> <20180831191225.GA43106@bhelgaas-glaptop.roam.corp.google.com> <20180903121209.GC2283@lahna.fi.intel.com> <20180904064307.GM2283@lahna.fi.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: nouveau-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Nouveau" To: Daniel Drake Cc: Linux PM , linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, "Rafael J. Wysocki" , Keith Busch , Bjorn Helgaas , nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Bjorn Helgaas , Andy Shevchenko , Linux Upstreaming Team , Jon Derrick List-Id: linux-pm@vger.kernel.org T24gVHVlLCBTZXAgMDQsIDIwMTggYXQgMDM6MDc6NTJQTSArMDgwMCwgRGFuaWVsIERyYWtlIHdy b3RlOgo+IE9uIFR1ZSwgU2VwIDQsIDIwMTggYXQgMjo0MyBQTSwgTWlrYSBXZXN0ZXJiZXJnCj4g PG1pa2Eud2VzdGVyYmVyZ0BsaW51eC5pbnRlbC5jb20+IHdyb3RlOgo+ID4gWWVzLCBjYW4geW91 IGNoZWNrIGlmIHRoZSBmYWlsaW5nIGRldmljZSBCQVIgaXMgaW5jbHVkZWQgaW4gYW55IG9mIHRo ZQo+ID4gYWJvdmUgZW50cmllcz8gSWYgbm90IHRoZW4gaXQgaXMgcHJvYmFibHkgbm90IHJlbGF0 ZWQuCj4gCj4gbXRyciBhZ2FpbiBmb3IgcmVmZXJlbmNlOgo+IHJlZzAwOiBiYXNlPTB4MGMwMDAw MDAwICggMzA3Mk1CKSwgc2l6ZT0gMTAyNE1CLCBjb3VudD0xOiB1bmNhY2hhYmxlCj4gcmVnMDE6 IGJhc2U9MHgwYTAwMDAwMDAgKCAyNTYwTUIpLCBzaXplPSAgNTEyTUIsIGNvdW50PTE6IHVuY2Fj aGFibGUKPiByZWcwMjogYmFzZT0weDA5MDAwMDAwMCAoIDIzMDRNQiksIHNpemU9ICAyNTZNQiwg Y291bnQ9MTogdW5jYWNoYWJsZQo+IHJlZzAzOiBiYXNlPTB4MDhjMDAwMDAwICggMjI0ME1CKSwg c2l6ZT0gICA2NE1CLCBjb3VudD0xOiB1bmNhY2hhYmxlCj4gcmVnMDQ6IGJhc2U9MHgwOGI4MDAw MDAgKCAyMjMyTUIpLCBzaXplPSAgICA4TUIsIGNvdW50PTE6IHVuY2FjaGFibGUKPiAKPiAKPiBU aGUgUENJIGJyaWRnZSBpczoKPiAwMDoxYy4wIFBDSSBicmlkZ2U6IEludGVsIENvcnBvcmF0aW9u IFN1bnJpc2UgUG9pbnQtTFAgUENJIEV4cHJlc3MKPiBSb290IFBvcnQgKHJldiBmMSkgKHByb2ct aWYgMDAgW05vcm1hbCBkZWNvZGVdKQo+ICAgICBDb250cm9sOiBJL08rIE1lbSsgQnVzTWFzdGVy KyBTcGVjQ3ljbGUtIE1lbVdJTlYtIFZHQVNub29wLQo+IFBhckVyci0gU3RlcHBpbmctIFNFUlIt IEZhc3RCMkItIERpc0lOVHgrCj4gICAgIFN0YXR1czogQ2FwKyA2Nk1Iei0gVURGLSBGYXN0QjJC LSBQYXJFcnItIERFVlNFTD1mYXN0ID5UQWJvcnQtCj4gPFRBYm9ydC0gPE1BYm9ydC0gPlNFUlIt IDxQRVJSLSBJTlR4LQo+ICAgICBMYXRlbmN5OiAwLCBDYWNoZSBMaW5lIFNpemU6IDY0IGJ5dGVz Cj4gICAgIEludGVycnVwdDogcGluIEEgcm91dGVkIHRvIElSUSAxMjIKPiAgICAgQnVzOiBwcmlt YXJ5PTAwLCBzZWNvbmRhcnk9MDEsIHN1Ym9yZGluYXRlPTAxLCBzZWMtbGF0ZW5jeT0wCj4gICAg IEkvTyBiZWhpbmQgYnJpZGdlOiAwMDAwZTAwMC0wMDAwZWZmZgo+ICAgICBNZW1vcnkgYmVoaW5k IGJyaWRnZTogZWUwMDAwMDAtZWYwZmZmZmYKPiAgICAgUHJlZmV0Y2hhYmxlIG1lbW9yeSBiZWhp bmQgYnJpZGdlOiAwMDAwMDAwMGQwMDAwMDAwLTAwMDAwMDAwZTFmZmZmZmYKPiAKPiBUaGUgbWVt b3J5IGJlaGluZCBicmlkZ2UgYXQgZWUwMDAwMDAgaXMgaW5jbHVkZWQgaW4gdGhlIG10cnIgcmVn aW9uCj4gcmVnMDAgd2hpY2ggaXMgMHhjMDAwMDAwMCB0byAweGZmZmZmZmZmLgo+IFNhbWUgZm9y IHRoZSBwcmVmZXRjaGFibGUgbWVtb3J5IGJlaGluZCBicmlkZ2UuCgpZZWFoIGFuZCBpdCBpcyB1 bmNhY2hhYmxlIHNvIGl0IHNob3VsZCBiZSBmaW5lLgoKPiBUaGUgbnZpZGlhIEdQVSB3aGljaCBi ZWNvbWVzIHVucmVzcG9uc2l2ZSBpczoKPiAKPiAwMTowMC4wIDNEIGNvbnRyb2xsZXI6IE5WSURJ QSBDb3Jwb3JhdGlvbiBHTTEwOE0gW0dlRm9yY2UgOTQwTVhdIChyZXYgYTIpCj4gICAgIFN1YnN5 c3RlbTogQVNVU1RlSyBDb21wdXRlciBJbmMuIEdNMTA4TSBbR2VGb3JjZSA5NDBNWF0KPiAgICAg Q29udHJvbDogSS9PKyBNZW0rIEJ1c01hc3RlcisgU3BlY0N5Y2xlLSBNZW1XSU5WLSBWR0FTbm9v cC0KPiBQYXJFcnItIFN0ZXBwaW5nLSBTRVJSLSBGYXN0QjJCLSBEaXNJTlR4Kwo+ICAgICBTdGF0 dXM6IENhcCsgNjZNSHotIFVERi0gRmFzdEIyQi0gUGFyRXJyLSBERVZTRUw9ZmFzdCA+VEFib3J0 LQo+IDxUQWJvcnQtIDxNQWJvcnQtID5TRVJSLSA8UEVSUi0gSU5UeC0KPiAgICAgTGF0ZW5jeTog MCwgQ2FjaGUgTGluZSBTaXplOiA2NCBieXRlcwo+ICAgICBJbnRlcnJ1cHQ6IHBpbiBBIHJvdXRl ZCB0byBJUlEgMTMzCj4gICAgIFJlZ2lvbiAwOiBNZW1vcnkgYXQgZWUwMDAwMDAgKDMyLWJpdCwg bm9uLXByZWZldGNoYWJsZSkgW3NpemU9MTZNXQo+ICAgICBSZWdpb24gMTogTWVtb3J5IGF0IGQw MDAwMDAwICg2NC1iaXQsIHByZWZldGNoYWJsZSkgW3NpemU9MjU2TV0KPiAgICAgUmVnaW9uIDM6 IE1lbW9yeSBhdCBlMDAwMDAwMCAoNjQtYml0LCBwcmVmZXRjaGFibGUpIFtzaXplPTMyTV0KPiAg ICAgUmVnaW9uIDU6IEkvTyBwb3J0cyBhdCBlMDAwIFtzaXplPTEyOF0KPiAgICAgRXhwYW5zaW9u IFJPTSBhdCBlZjAwMDAwMCBbZGlzYWJsZWRdIFtzaXplPTUxMktdCj4gCj4gUmVnaW9uIDAsIDEs IDMgYW5kIHRoZSBleHBhbnNpb24gUk9NIGFyZSBhbGwgaW5jbHVkZWQgaW4gdGhlIG10cnIgcmVn aW9uIHJlZzAwLgo+IAo+IAo+IFRoZSBtYWdpYyByZWdpc3RlciB0aGF0IHdlIHdyaXRlIHRvIHdv cmthcm91bmQgdGhlIGlzc3VlIGlzIGluIFBDSQo+IGJyaWRnZSBjb25maWcgc3BhY2UgLSBub3Qg aW4gYSBCQVIuCgpPSywgSSBqdXN0IHdhbnRlZCB0byBydWxlIG91dCBNVFJSIG1pc2NvbmZpZ3Vy YXRpb24gYnV0IEkgZ3Vlc3MgaXQgaXMKbm90IHRoZSBjYXNlIGhlcmUuCl9fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCk5vdXZlYXUgbWFpbGluZyBsaXN0Ck5v dXZlYXVAbGlzdHMuZnJlZWRlc2t0b3Aub3JnCmh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3Jn L21haWxtYW4vbGlzdGluZm8vbm91dmVhdQo=