From mboxrd@z Thu Jan 1 00:00:00 1970 Received: from mga12.intel.com ([192.55.52.136]:9551 "EHLO mga12.intel.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726087AbeIDOXw (ORCPT ); Tue, 4 Sep 2018 10:23:52 -0400 Date: Tue, 4 Sep 2018 12:59:23 +0300 From: Jarkko Sakkinen To: Andy Shevchenko CC: "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Platform Driver , Dave Hansen , , , , , , Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , , Linux Kernel Mailing List Subject: Re: [PATCH v13 07/13] x86/sgx: Add data structures for tracking the EPC pages Message-ID: <20180904095923.GC5423@linux.intel.com> References: <20180827185507.17087-1-jarkko.sakkinen@linux.intel.com> <20180827185507.17087-8-jarkko.sakkinen@linux.intel.com> Content-Type: text/plain; charset="us-ascii" In-Reply-To: Sender: List-ID: Return-Path: linux-sgx-owner@vger.kernel.org MIME-Version: 1.0 On Mon, Sep 03, 2018 at 05:41:53PM +0300, Andy Shevchenko wrote: > On Mon, Aug 27, 2018 at 9:58 PM Jarkko Sakkinen > wrote: > > > > Add data structures to track Enclave Page Cache (EPC) pages. EPC is > > divided into multiple banks (1-N) of which addresses and sizes can be > > enumerated with CPUID by the OS. > > > > On NUMA systems a node can have at most bank. A bank can be at most part of > > two nodes. SGX supports both nodes with a single memory controller and also > > sub-cluster nodes with severals memory controllers on a single die. > > > -#include > > -#include > > #include > > #include > > #include > > +#include > > #include > > #include > > +#include > > #include > > +#include > > +#include > > Squash issues? Yes :-/ > > + va = ioremap_cache(addr, size); > > + if (!va) > > + return -ENOMEM; > > I'm not sure this is a right API. Do we operate with memory? Does it > have I/O side effects? > If no, memremap() would be better to use. Had this idea a long time ago but had forgotten it. EPC is from caching perspective like regular memory. > -- > With Best Regards, > Andy Shevchenko > /Jarkko From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jarkko Sakkinen Subject: Re: [PATCH v13 07/13] x86/sgx: Add data structures for tracking the EPC pages Date: Tue, 4 Sep 2018 12:59:23 +0300 Message-ID: <20180904095923.GC5423@linux.intel.com> References: <20180827185507.17087-1-jarkko.sakkinen@linux.intel.com> <20180827185507.17087-8-jarkko.sakkinen@linux.intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset=us-ascii Return-path: Content-Disposition: inline In-Reply-To: Sender: linux-kernel-owner@vger.kernel.org To: Andy Shevchenko Cc: "maintainer:X86 ARCHITECTURE (32-BIT AND 64-BIT)" , Platform Driver , Dave Hansen , sean.j.christopherson@intel.com, nhorman@redhat.com, npmccallum@redhat.com, linux-sgx@vger.kernel.org, serge.ayoun@intel.com, Thomas Gleixner , Ingo Molnar , "H. Peter Anvin" , suresh.b.siddha@intel.com, Linux Kernel Mailing List List-Id: platform-driver-x86.vger.kernel.org On Mon, Sep 03, 2018 at 05:41:53PM +0300, Andy Shevchenko wrote: > On Mon, Aug 27, 2018 at 9:58 PM Jarkko Sakkinen > wrote: > > > > Add data structures to track Enclave Page Cache (EPC) pages. EPC is > > divided into multiple banks (1-N) of which addresses and sizes can be > > enumerated with CPUID by the OS. > > > > On NUMA systems a node can have at most bank. A bank can be at most part of > > two nodes. SGX supports both nodes with a single memory controller and also > > sub-cluster nodes with severals memory controllers on a single die. > > > -#include > > -#include > > #include > > #include > > #include > > +#include > > #include > > #include > > +#include > > #include > > +#include > > +#include > > Squash issues? Yes :-/ > > + va = ioremap_cache(addr, size); > > + if (!va) > > + return -ENOMEM; > > I'm not sure this is a right API. Do we operate with memory? Does it > have I/O side effects? > If no, memremap() would be better to use. Had this idea a long time ago but had forgotten it. EPC is from caching perspective like regular memory. > -- > With Best Regards, > Andy Shevchenko > /Jarkko