From: Rodrigo Vivi <rodrigo.vivi@intel.com>
To: intel-gfx@lists.freedesktop.org
Subject: Re: ✗ Fi.CI.CHECKPATCH: warning for Decode memdev info and bandwidth and implemnt latency WA (rev4)
Date: Wed, 5 Sep 2018 19:08:44 -0700 [thread overview]
Message-ID: <20180906020844.GK2686@intel.com> (raw)
In-Reply-To: <20180831112201.24162.71305@emeril.freedesktop.org>
On Fri, Aug 31, 2018 at 11:22:01AM -0000, Patchwork wrote:
> == Series Details ==
>
> Series: Decode memdev info and bandwidth and implemnt latency WA (rev4)
> URL : https://patchwork.freedesktop.org/series/46481/
> State : warning
>
> == Summary ==
>
> $ dim checkpatch origin/drm-tip
> 441057f30f45 drm/i915/bxt: Decode memory bandwidth and parameters
> -:162: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
I'm still asking myself how to proceed with this one here.
We clearly have many more cases of bool structure members on i915.
> #162: FILE: drivers/gpu/drm/i915/i915_drv.h:1948:
> + bool valid;
>
> total: 0 errors, 0 warnings, 1 checks, 182 lines checked
> bc3e164750dd drm/i915/skl+: Decode memory bandwidth and parameters
> 08094101d869 drm/i915: Implement 16GB dimm wa for latency level-0
> -:116: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
> #116: FILE: drivers/gpu/drm/i915/i915_drv.h:1949:
> + bool valid_dimm;
>
> -:117: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
> #117: FILE: drivers/gpu/drm/i915/i915_drv.h:1950:
> + bool is_16gb_dimm;
>
> -:125: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
> #125: FILE: drivers/gpu/drm/i915/i915_drv.h:2179:
> + bool is_16gb_dimm;
>
> total: 0 errors, 0 warnings, 3 checks, 107 lines checked
> 9968070f860e drm/i915/skl+: don't trust IPC value set by BIOS
> 268a50bd35d9 drm/i915/kbl+: Enable IPC only for symmetric memory configurations
> -:82: CHECK:BOOL_MEMBER: Avoid using bool structure members because of possible alignment issues - see: https://lkml.org/lkml/2017/11/21/384
> #82: FILE: drivers/gpu/drm/i915/i915_drv.h:1958:
> + bool symmetric_memory;
>
> total: 0 errors, 0 warnings, 1 checks, 67 lines checked
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx@lists.freedesktop.org
> https://lists.freedesktop.org/mailman/listinfo/intel-gfx
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next prev parent reply other threads:[~2018-09-06 2:08 UTC|newest]
Thread overview: 20+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-08-24 9:32 [PATCH 0/5] Decode memdev info and bandwidth and implemnt latency WA Mahesh Kumar
2018-08-24 9:32 ` [PATCH V3 1/5] drm/i915/bxt: Decode memory bandwidth and parameters Mahesh Kumar
2018-08-24 9:32 ` [PATCH V3 2/5] drm/i915/skl+: " Mahesh Kumar
2018-08-24 9:32 ` [PATCH V3 3/5] drm/i915: Implement 16GB dimm wa for latency level-0 Mahesh Kumar
2018-08-31 10:24 ` Maarten Lankhorst
2018-08-31 11:09 ` [PATCH V4 " Mahesh Kumar
2018-08-24 9:32 ` [PATCH V1 4/5] drm/i915/skl+: don't trust IPC value set by BIOS Mahesh Kumar
2018-08-24 9:32 ` [PATCH V2 5/5] drm/i915/kbl+: Enable IPC only for symmetric memory configurations Mahesh Kumar
2018-08-31 10:25 ` Maarten Lankhorst
2018-09-13 21:33 ` Rodrigo Vivi
2018-08-24 10:49 ` ✗ Fi.CI.SPARSE: warning for Decode memdev info and bandwidth and implemnt latency WA (rev3) Patchwork
2018-08-24 11:06 ` ✓ Fi.CI.BAT: success " Patchwork
2018-08-24 11:27 ` Patchwork
2018-08-24 11:56 ` ✗ Fi.CI.IGT: failure " Patchwork
2018-08-24 12:40 ` ✓ Fi.CI.IGT: success " Patchwork
2018-08-31 11:22 ` ✗ Fi.CI.CHECKPATCH: warning for Decode memdev info and bandwidth and implemnt latency WA (rev4) Patchwork
2018-09-06 2:08 ` Rodrigo Vivi [this message]
2018-08-31 11:24 ` ✗ Fi.CI.SPARSE: " Patchwork
2018-08-31 11:44 ` ✓ Fi.CI.BAT: success " Patchwork
2018-08-31 15:01 ` ✓ Fi.CI.IGT: " Patchwork
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