From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: Received: from lekensteyn.nl ([178.21.112.251]:57727 "EHLO lekensteyn.nl" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1727862AbeIGTql (ORCPT ); Fri, 7 Sep 2018 15:46:41 -0400 Date: Fri, 7 Sep 2018 17:05:15 +0200 From: Peter Wu To: Daniel Drake Cc: bhelgaas@google.com, linux-pci@vger.kernel.org, linux@endlessm.com, nouveau@lists.freedesktop.org, linux-pm@vger.kernel.org, kherbst@redhat.com, andriy.shevchenko@linux.intel.com, rafael.j.wysocki@intel.com, keith.busch@intel.com, mika.westerberg@linux.intel.com, jonathan.derrick@intel.com, kugel@rockbox.org, davem@davemloft.net, hkallweit1@gmail.com, netdev@vger.kernel.org, nic_swsd@realtek.com Subject: Re: [PATCH] PCI: Reprogram bridge prefetch registers on resume Message-ID: <20180907150515.GA28739@al> References: <20180907053614.6540-1-drake@endlessm.com> MIME-Version: 1.0 Content-Type: text/plain; charset=us-ascii In-Reply-To: <20180907053614.6540-1-drake@endlessm.com> Sender: linux-pci-owner@vger.kernel.org List-ID: On Fri, Sep 07, 2018 at 01:36:14PM +0800, Daniel Drake wrote: <..> > Thomas Martitz reports that this workaround also solves an issue where > the AMD Radeon Polaris 10 GPU on the HP Zbook 14u G5 is unresponsive > after S3 suspend/resume. Where was this claimed? It is not stated in the linked bug: (https://bugs.freedesktop.org/show_bug.cgi?id=105760 > On resume, reprogram the PCI bridge prefetch registers, including the > magic register mentioned above. > > This matches Win10 behaviour, which also rewrites these registers > during S3 resume (checked with qemu tracing). Windows 10 unconditionally rewrites these registers (BAR, I/O Base + Limit, Memory Base + Limit, etc. from top to bottom), see annotations: https://www.spinics.net/lists/linux-pci/msg75856.html Linux has a generic "restore" operation that works backwards from the end of the PCI config space to the beginning, see pci_restore_config_space. Do you have a dmesg where you see the "restoring config space at offset" messages? Would it be reasonable to unconditionally write these registers in pci_restore_config_dword, like Windows does? Kind regards, Peter From mboxrd@z Thu Jan 1 00:00:00 1970 From: Peter Wu Subject: Re: [PATCH] PCI: Reprogram bridge prefetch registers on resume Date: Fri, 7 Sep 2018 17:05:15 +0200 Message-ID: <20180907150515.GA28739@al> References: <20180907053614.6540-1-drake@endlessm.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20180907053614.6540-1-drake-6IF/jdPJHihWk0Htik3J/w@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: nouveau-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Nouveau" To: Daniel Drake Cc: mika.westerberg-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-pci-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, rafael.j.wysocki-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, nic_swsd-Rasf1IRRPZFBDgjK7y7TUQ@public.gmane.org, keith.busch-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, netdev-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, nouveau-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, bhelgaas-hpIqsD4AKlfQT0dZR+AlfA@public.gmane.org, andriy.shevchenko-VuQAYsv1563Yd54FQh9/CA@public.gmane.org, linux-6IF/jdPJHihWk0Htik3J/w@public.gmane.org, davem-fT/PcQaiUtIeIZ0/mPfg9Q@public.gmane.org, jonathan.derrick-ral2JQCrhuEAvxtiuMwx3w@public.gmane.org, hkallweit1-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org List-Id: linux-pm@vger.kernel.org T24gRnJpLCBTZXAgMDcsIDIwMTggYXQgMDE6MzY6MTRQTSArMDgwMCwgRGFuaWVsIERyYWtlIHdy b3RlOgo8Li4+Cj4gVGhvbWFzIE1hcnRpdHogcmVwb3J0cyB0aGF0IHRoaXMgd29ya2Fyb3VuZCBh bHNvIHNvbHZlcyBhbiBpc3N1ZSB3aGVyZQo+IHRoZSBBTUQgUmFkZW9uIFBvbGFyaXMgMTAgR1BV IG9uIHRoZSBIUCBaYm9vayAxNHUgRzUgaXMgdW5yZXNwb25zaXZlCj4gYWZ0ZXIgUzMgc3VzcGVu ZC9yZXN1bWUuCgpXaGVyZSB3YXMgdGhpcyBjbGFpbWVkPyBJdCBpcyBub3Qgc3RhdGVkIGluIHRo ZSBsaW5rZWQgYnVnOgooaHR0cHM6Ly9idWdzLmZyZWVkZXNrdG9wLm9yZy9zaG93X2J1Zy5jZ2k/ aWQ9MTA1NzYwCgo+IE9uIHJlc3VtZSwgcmVwcm9ncmFtIHRoZSBQQ0kgYnJpZGdlIHByZWZldGNo IHJlZ2lzdGVycywgaW5jbHVkaW5nIHRoZQo+IG1hZ2ljIHJlZ2lzdGVyIG1lbnRpb25lZCBhYm92 ZS4KPiAKPiBUaGlzIG1hdGNoZXMgV2luMTAgYmVoYXZpb3VyLCB3aGljaCBhbHNvIHJld3JpdGVz IHRoZXNlIHJlZ2lzdGVycwo+IGR1cmluZyBTMyByZXN1bWUgKGNoZWNrZWQgd2l0aCBxZW11IHRy YWNpbmcpLgoKV2luZG93cyAxMCB1bmNvbmRpdGlvbmFsbHkgcmV3cml0ZXMgdGhlc2UgcmVnaXN0 ZXJzIChCQVIsIEkvTyBCYXNlICsKTGltaXQsIE1lbW9yeSBCYXNlICsgTGltaXQsIGV0Yy4gZnJv bSB0b3AgdG8gYm90dG9tKSwgc2VlIGFubm90YXRpb25zOgpodHRwczovL3d3dy5zcGluaWNzLm5l dC9saXN0cy9saW51eC1wY2kvbXNnNzU4NTYuaHRtbAoKTGludXggaGFzIGEgZ2VuZXJpYyAicmVz dG9yZSIgb3BlcmF0aW9uIHRoYXQgd29ya3MgYmFja3dhcmRzIGZyb20gdGhlCmVuZCBvZiB0aGUg UENJIGNvbmZpZyBzcGFjZSB0byB0aGUgYmVnaW5uaW5nLCBzZWUKcGNpX3Jlc3RvcmVfY29uZmln X3NwYWNlLiBEbyB5b3UgaGF2ZSBhIGRtZXNnIHdoZXJlIHlvdSBzZWUgdGhlCiJyZXN0b3Jpbmcg Y29uZmlnIHNwYWNlIGF0IG9mZnNldCIgbWVzc2FnZXM/CgpXb3VsZCBpdCBiZSByZWFzb25hYmxl IHRvIHVuY29uZGl0aW9uYWxseSB3cml0ZSB0aGVzZSByZWdpc3RlcnMgaW4KcGNpX3Jlc3RvcmVf Y29uZmlnX2R3b3JkLCBsaWtlIFdpbmRvd3MgZG9lcz8KCktpbmQgcmVnYXJkcywKUGV0ZXIKX19f X19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX18KTm91dmVhdSBtYWls aW5nIGxpc3QKTm91dmVhdUBsaXN0cy5mcmVlZGVza3RvcC5vcmcKaHR0cHM6Ly9saXN0cy5mcmVl ZGVza3RvcC5vcmcvbWFpbG1hbi9saXN0aW5mby9ub3V2ZWF1Cg==