diff for duplicates of <20180913181245.25484-20-robh@kernel.org> diff --git a/a/1.txt b/N1/1.txt index 7b85161..1e0a5cc 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -19,16 +19,16 @@ index 860c8fb10795..4bde7b6f2b11 100644 clock-names = "apb_pclk"; status="disabled"; }; -- spi0: ssp at fe800000 { -+ spi0: spi at fe800000 { +- spi0: ssp@fe800000 { ++ spi0: spi@fe800000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x0 0xfe800000 0x1000>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_bus>; clock-names = "apb_pclk"; }; -- spi1: ssp at fe900000 { -+ spi1: spi at fe900000 { +- spi1: ssp@fe900000 { ++ spi1: spi@fe900000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x0 0xfe900000 0x1000>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; @@ -40,16 +40,16 @@ index 1887af654a7d..16ced1ff1ad3 100644 clock-names = "apb_pclk"; status="disabled"; }; -- spi0: ssp at fe800000 { -+ spi0: spi at fe800000 { +- spi0: ssp@fe800000 { ++ spi0: spi@fe800000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x0 0xfe800000 0x1000>; interrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>; clocks = <&clk_bus>; clock-names = "apb_pclk"; }; -- spi1: ssp at fe900000 { -+ spi1: spi at fe900000 { +- spi1: ssp@fe900000 { ++ spi1: spi@fe900000 { compatible = "arm,pl022", "arm,primecell"; reg = <0x0 0xfe900000 0x1000>; interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>; diff --git a/a/content_digest b/N1/content_digest index 6437a12..7fd4dcf 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,7 +1,9 @@ - "From\0robh@kernel.org (Rob Herring)\0" + "From\0Rob Herring <robh@kernel.org>\0" "Subject\0[PATCH] arm64: dts: lg: Fix SPI controller node names\0" "Date\0Thu, 13 Sep 2018 13:12:44 -0500\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0devicetree@vger.kernel.org" + " linux-arm-kernel@lists.infradead.org\0" + "Cc\0Chanho Min <chanho.min@lge.com>\0" "\00:1\0" "b\0" "SPI controller nodes should be named 'spi' rather than 'ssp'. Fixing the\n" @@ -25,16 +27,16 @@ " \t\t\tclock-names = \"apb_pclk\";\n" " \t\t\tstatus=\"disabled\";\n" " \t\t};\n" - "-\t\tspi0: ssp at fe800000 {\n" - "+\t\tspi0: spi at fe800000 {\n" + "-\t\tspi0: ssp@fe800000 {\n" + "+\t\tspi0: spi@fe800000 {\n" " \t\t\tcompatible = \"arm,pl022\", \"arm,primecell\";\n" " \t\t\treg = <0x0 0xfe800000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;\n" " \t\t\tclocks = <&clk_bus>;\n" " \t\t\tclock-names = \"apb_pclk\";\n" " \t\t};\n" - "-\t\tspi1: ssp at fe900000 {\n" - "+\t\tspi1: spi at fe900000 {\n" + "-\t\tspi1: ssp@fe900000 {\n" + "+\t\tspi1: spi@fe900000 {\n" " \t\t\tcompatible = \"arm,pl022\", \"arm,primecell\";\n" " \t\t\treg = <0x0 0xfe900000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -46,20 +48,20 @@ " \t\t\tclock-names = \"apb_pclk\";\n" " \t\t\tstatus=\"disabled\";\n" " \t\t};\n" - "-\t\tspi0: ssp at fe800000 {\n" - "+\t\tspi0: spi at fe800000 {\n" + "-\t\tspi0: ssp@fe800000 {\n" + "+\t\tspi0: spi@fe800000 {\n" " \t\t\tcompatible = \"arm,pl022\", \"arm,primecell\";\n" " \t\t\treg = <0x0 0xfe800000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH>;\n" " \t\t\tclocks = <&clk_bus>;\n" " \t\t\tclock-names = \"apb_pclk\";\n" " \t\t};\n" - "-\t\tspi1: ssp at fe900000 {\n" - "+\t\tspi1: spi at fe900000 {\n" + "-\t\tspi1: ssp@fe900000 {\n" + "+\t\tspi1: spi@fe900000 {\n" " \t\t\tcompatible = \"arm,pl022\", \"arm,primecell\";\n" " \t\t\treg = <0x0 0xfe900000 0x1000>;\n" " \t\t\tinterrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;\n" "-- \n" 2.17.1 -04bcd1b0bb7dda2bf1ffc3513e35c4f5c7b40f53e40dd7911a6af53bc0f3ccba +78c6a136288abca51cc6180f533312074ae0c66232c948a729d431526b2d546d
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