From: Nicholas Piggin <npiggin@gmail.com>
To: linuxppc-dev@lists.ozlabs.org
Cc: Nicholas Piggin <npiggin@gmail.com>,
"Aneesh Kumar K . V" <aneesh.kumar@linux.ibm.com>
Subject: [PATCH 02/12] powerpc/64s/hash: avoid the POWER5 < DD2.1 slb invalidate workaround on POWER8/9
Date: Sat, 15 Sep 2018 01:30:46 +1000 [thread overview]
Message-ID: <20180914153056.3644-3-npiggin@gmail.com> (raw)
In-Reply-To: <20180914153056.3644-1-npiggin@gmail.com>
I only have POWER8/9 to test, so just remove it for those.
Signed-off-by: Nicholas Piggin <npiggin@gmail.com>
---
arch/powerpc/kernel/entry_64.S | 2 ++
arch/powerpc/mm/slb.c | 8 +++++---
2 files changed, 7 insertions(+), 3 deletions(-)
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 2206912ea4f0..77a888bfcb53 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -672,7 +672,9 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
isync
slbie r6
+BEGIN_FTR_SECTION
slbie r6 /* Workaround POWER5 < DD2.1 issue */
+END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_207S)
slbmte r7,r0
isync
2:
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index 2f162c6e52d4..1c7128c63a4b 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -256,9 +256,11 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
__slb_flush_and_rebolt();
}
- /* Workaround POWER5 < DD2.1 issue */
- if (offset == 1 || offset > SLB_CACHE_ENTRIES)
- asm volatile("slbie %0" : : "r" (slbie_data));
+ if (!cpu_has_feature(CPU_FTR_ARCH_207S)) {
+ /* Workaround POWER5 < DD2.1 issue */
+ if (offset == 1 || offset > SLB_CACHE_ENTRIES)
+ asm volatile("slbie %0" : : "r" (slbie_data));
+ }
get_paca()->slb_cache_ptr = 0;
copy_mm_to_paca(mm);
--
2.18.0
next prev parent reply other threads:[~2018-09-14 15:31 UTC|newest]
Thread overview: 21+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-14 15:30 [PATCH 00/12] SLB miss conversion to C, and SLB optimisations Nicholas Piggin
2018-09-14 15:30 ` [PATCH 01/12] powerpc/64s/hash: Fix stab_rr off by one initialization Nicholas Piggin
2018-09-17 6:51 ` Joel Stanley
2018-09-17 7:35 ` Nicholas Piggin
2018-09-20 4:21 ` [01/12] " Michael Ellerman
2018-09-14 15:30 ` Nicholas Piggin [this message]
2018-09-14 15:30 ` [PATCH 03/12] powerpc/64s/hash: move POWER5 < DD2.1 slbie workaround where it is needed Nicholas Piggin
2018-09-16 22:06 ` kbuild test robot
2018-09-17 6:00 ` Aneesh Kumar K.V
2018-09-17 8:39 ` Nicholas Piggin
2018-09-14 15:30 ` [PATCH 04/12] powerpc/64s/hash: remove the vmalloc segment from the bolted SLB Nicholas Piggin
2018-09-14 15:30 ` [PATCH 05/12] powerpc/64s/hash: Use POWER6 SLBIA IH=1 variant in switch_slb Nicholas Piggin
2018-09-17 6:08 ` Aneesh Kumar K.V
2018-09-17 8:42 ` Nicholas Piggin
2018-09-14 15:30 ` [PATCH 06/12] powerpc/64s/hash: Use POWER9 SLBIA IH=3 " Nicholas Piggin
2018-09-14 15:30 ` [PATCH 07/12] powerpc/64s/hash: convert SLB miss handlers to C Nicholas Piggin
2018-09-14 15:30 ` [PATCH 08/12] powerpc/64s/hash: remove user SLB data from the paca Nicholas Piggin
2018-09-14 15:30 ` [PATCH 09/12] powerpc/64s/hash: SLB allocation status bitmaps Nicholas Piggin
2018-09-14 15:30 ` [PATCH 10/12] powerpc/64s: xmon do not dump hash fields when using radix mode Nicholas Piggin
2018-09-14 15:30 ` [PATCH 11/12] powerpc/64s/hash: provide arch_setup_exec hooks for hash slice setup Nicholas Piggin
2018-09-14 15:30 ` [PATCH 12/12] powerpc/64s/hash: Add a SLB preload cache Nicholas Piggin
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