From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [v7,4/7] edac: synopsys: Add macro defines for ZynqMP DDRC From: Borislav Petkov Message-Id: <20180924092226.GA20187@zn.tnic> Date: Mon, 24 Sep 2018 11:22:26 +0200 To: Manish Narani Cc: robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org, michal.simek@xilinx.com, leoyang.li@nxp.com, sudeep.holla@arm.com, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-ID: T24gTW9uLCBTZXAgMTcsIDIwMTggYXQgMDc6NTU6MDJQTSArMDUzMCwgTWFuaXNoIE5hcmFuaSB3 cm90ZToKPiBBZGQgbWFjcm8gZGVmaW5lcyBmb3IgWnlucU1QIEREUiBjb250cm9sbGVyLiBUaGVz ZSBtYWNyb3Mgd2lsbCBiZSB1c2VkCj4gZm9yIFp5cW5NUCBFQ0Mgb3BlcmF0aW9ucy4KPiAKPiBT aWduZWQtb2ZmLWJ5OiBNYW5pc2ggTmFyYW5pIDxtYW5pc2gubmFyYW5pQHhpbGlueC5jb20+Cj4g LS0tCj4gIGRyaXZlcnMvZWRhYy9zeW5vcHN5c19lZGFjLmMgfCAxNjggKysrKysrKysrKysrKysr KysrKysrKysrKysrKysrKysrKysrKysrKysrKwo+ICAxIGZpbGUgY2hhbmdlZCwgMTY4IGluc2Vy dGlvbnMoKykKPiAKPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9lZGFjL3N5bm9wc3lzX2VkYWMuYyBi L2RyaXZlcnMvZWRhYy9zeW5vcHN5c19lZGFjLmMKPiBpbmRleCBlYjQ1OGU1Li42YmY3OTU5IDEw MDY0NAo+IC0tLSBhL2RyaXZlcnMvZWRhYy9zeW5vcHN5c19lZGFjLmMKPiArKysgYi9kcml2ZXJz L2VkYWMvc3lub3BzeXNfZWRhYy5jCj4gQEAgLTk3LDYgKzk3LDE3NCBAQAo+ICAjZGVmaW5lIFND UlVCX01PREVfTUFTSwkJMHg3Cj4gICNkZWZpbmUgU0NSVUJfTU9ERV9TRUNERUQJMHg0Cj4gIAo+ ICsvKiBERFIgRUNDIFF1aXJrcyAqLwo+ICsjZGVmaW5lIEREUl9FQ0NfSU5UUl9TVVBQT1JUCQlC SVQoMCkKPiArI2RlZmluZSBERFJfRUNDX0RBVEFfUE9JU09OX1NVUFBPUlQJQklUKDEpCgpBbGwg dGhvc2UgbmV3IGFkZGl0aW9ucyBhcmUgb25lIGNvbHVtbiBmdXJ0aGVyIHRvIHRoZSBsZWZ0IHRo YW4gdGhlIG9sZApvbmVzLiBXaHk/CgpJcyB0aGVyZSBzb21lIHNpZ25pZmljYW5jZSBoZXJlIG9y IGNhbiB0aGV5IGFsbCBiZSB2ZXJ0aWNhbGx5IGFsaWduZWQ/Cg== From mboxrd@z Thu Jan 1 00:00:00 1970 From: bp@alien8.de (Borislav Petkov) Date: Mon, 24 Sep 2018 11:22:26 +0200 Subject: [PATCH v7 4/7] edac: synopsys: Add macro defines for ZynqMP DDRC In-Reply-To: <1537194305-9243-5-git-send-email-manish.narani@xilinx.com> References: <1537194305-9243-1-git-send-email-manish.narani@xilinx.com> <1537194305-9243-5-git-send-email-manish.narani@xilinx.com> Message-ID: <20180924092226.GA20187@zn.tnic> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Sep 17, 2018 at 07:55:02PM +0530, Manish Narani wrote: > Add macro defines for ZynqMP DDR controller. These macros will be used > for ZyqnMP ECC operations. > > Signed-off-by: Manish Narani > --- > drivers/edac/synopsys_edac.c | 168 +++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 168 insertions(+) > > diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c > index eb458e5..6bf7959 100644 > --- a/drivers/edac/synopsys_edac.c > +++ b/drivers/edac/synopsys_edac.c > @@ -97,6 +97,174 @@ > #define SCRUB_MODE_MASK 0x7 > #define SCRUB_MODE_SECDED 0x4 > > +/* DDR ECC Quirks */ > +#define DDR_ECC_INTR_SUPPORT BIT(0) > +#define DDR_ECC_DATA_POISON_SUPPORT BIT(1) All those new additions are one column further to the left than the old ones. Why? Is there some significance here or can they all be vertically aligned? -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply. From mboxrd@z Thu Jan 1 00:00:00 1970 From: Borislav Petkov Subject: Re: [PATCH v7 4/7] edac: synopsys: Add macro defines for ZynqMP DDRC Date: Mon, 24 Sep 2018 11:22:26 +0200 Message-ID: <20180924092226.GA20187@zn.tnic> References: <1537194305-9243-1-git-send-email-manish.narani@xilinx.com> <1537194305-9243-5-git-send-email-manish.narani@xilinx.com> Mime-Version: 1.0 Content-Type: text/plain; charset=utf-8 Return-path: Content-Disposition: inline In-Reply-To: <1537194305-9243-5-git-send-email-manish.narani@xilinx.com> Sender: linux-kernel-owner@vger.kernel.org To: Manish Narani Cc: robh+dt@kernel.org, mark.rutland@arm.com, mchehab@kernel.org, michal.simek@xilinx.com, leoyang.li@nxp.com, sudeep.holla@arm.com, amit.kucheria@linaro.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-edac@vger.kernel.org, linux-arm-kernel@lists.infradead.org List-Id: devicetree@vger.kernel.org On Mon, Sep 17, 2018 at 07:55:02PM +0530, Manish Narani wrote: > Add macro defines for ZynqMP DDR controller. These macros will be used > for ZyqnMP ECC operations. > > Signed-off-by: Manish Narani > --- > drivers/edac/synopsys_edac.c | 168 +++++++++++++++++++++++++++++++++++++++++++ > 1 file changed, 168 insertions(+) > > diff --git a/drivers/edac/synopsys_edac.c b/drivers/edac/synopsys_edac.c > index eb458e5..6bf7959 100644 > --- a/drivers/edac/synopsys_edac.c > +++ b/drivers/edac/synopsys_edac.c > @@ -97,6 +97,174 @@ > #define SCRUB_MODE_MASK 0x7 > #define SCRUB_MODE_SECDED 0x4 > > +/* DDR ECC Quirks */ > +#define DDR_ECC_INTR_SUPPORT BIT(0) > +#define DDR_ECC_DATA_POISON_SUPPORT BIT(1) All those new additions are one column further to the left than the old ones. Why? Is there some significance here or can they all be vertically aligned? -- Regards/Gruss, Boris. Good mailing practices for 400: avoid top-posting and trim the reply.