From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [2/5] x86/mce: Add macors for corrected error count bit field From: "Luck, Tony" Message-Id: <20180924201613.14070-3-tony.luck@intel.com> Date: Mon, 24 Sep 2018 13:16:10 -0700 To: Borislav Petkov Cc: Qiuxu Zhuo , Tony Luck , Aristeu Rozanski , Mauro Carvalho Chehab , linux-edac@vger.kernel.org List-ID: RnJvbTogUWl1eHUgWmh1byA8cWl1eHUuemh1b0BpbnRlbC5jb20+CgpUaGUgYml0IGZpZWxkIDUy OjM4IG9mIE1DaV9TVEFUVVMgaXMgZm9yIGNvcnJlY3RlZCBlcnJvciBjb3VudC4KQWRkIHsqX1NI SUZUfCpfTUFTS3wqX0NFQyhjKX0gbWFjcm9zIGZvciB0aGUgYml0IGZpZWxkLgoKU2lnbmVkLW9m Zi1ieTogUWl1eHUgWmh1byA8cWl1eHUuemh1b0BpbnRlbC5jb20+ClNpZ25lZC1vZmYtYnk6IFRv bnkgTHVjayA8dG9ueS5sdWNrQGludGVsLmNvbT4KLS0tCiBhcmNoL3g4Ni9pbmNsdWRlL2FzbS9t Y2UuaCB8IDIxICsrKysrKysrKysrKy0tLS0tLS0tLQogMSBmaWxlIGNoYW5nZWQsIDEyIGluc2Vy dGlvbnMoKyksIDkgZGVsZXRpb25zKC0pCgpkaWZmIC0tZ2l0IGEvYXJjaC94ODYvaW5jbHVkZS9h c20vbWNlLmggYi9hcmNoL3g4Ni9pbmNsdWRlL2FzbS9tY2UuaAppbmRleCBkNTNlNWRkNzQ3MWEu LmE4MWEyMmUzNTkyYyAxMDA2NDQKLS0tIGEvYXJjaC94ODYvaW5jbHVkZS9hc20vbWNlLmgKKysr IGIvYXJjaC94ODYvaW5jbHVkZS9hc20vbWNlLmgKQEAgLTMwLDE1ICszMCwxOCBAQAogI2RlZmlu ZSBNQ0dfRVhUX0NUTF9MTUNFX0VOIEJJVF9VTEwoMCkgLyogRW5hYmxlIExNQ0UgKi8KIAogLyog TUNpX1NUQVRVUyByZWdpc3RlciBkZWZpbmVzICovCi0jZGVmaW5lIE1DSV9TVEFUVVNfVkFMICAg QklUX1VMTCg2MykgIC8qIHZhbGlkIGVycm9yICovCi0jZGVmaW5lIE1DSV9TVEFUVVNfT1ZFUiAg QklUX1VMTCg2MikgIC8qIHByZXZpb3VzIGVycm9ycyBsb3N0ICovCi0jZGVmaW5lIE1DSV9TVEFU VVNfVUMgICAgQklUX1VMTCg2MSkgIC8qIHVuY29ycmVjdGVkIGVycm9yICovCi0jZGVmaW5lIE1D SV9TVEFUVVNfRU4gICAgQklUX1VMTCg2MCkgIC8qIGVycm9yIGVuYWJsZWQgKi8KLSNkZWZpbmUg TUNJX1NUQVRVU19NSVNDViBCSVRfVUxMKDU5KSAgLyogbWlzYyBlcnJvciByZWcuIHZhbGlkICov Ci0jZGVmaW5lIE1DSV9TVEFUVVNfQUREUlYgQklUX1VMTCg1OCkgIC8qIGFkZHIgcmVnLiB2YWxp ZCAqLwotI2RlZmluZSBNQ0lfU1RBVFVTX1BDQyAgIEJJVF9VTEwoNTcpICAvKiBwcm9jZXNzb3Ig Y29udGV4dCBjb3JydXB0ICovCi0jZGVmaW5lIE1DSV9TVEFUVVNfUwkgQklUX1VMTCg1NikgIC8q IFNpZ25hbGVkIG1hY2hpbmUgY2hlY2sgKi8KLSNkZWZpbmUgTUNJX1NUQVRVU19BUgkgQklUX1VM TCg1NSkgIC8qIEFjdGlvbiByZXF1aXJlZCAqLworI2RlZmluZSBNQ0lfU1RBVFVTX1ZBTAkJQklU X1VMTCg2MykgIC8qIHZhbGlkIGVycm9yICovCisjZGVmaW5lIE1DSV9TVEFUVVNfT1ZFUgkJQklU X1VMTCg2MikgIC8qIHByZXZpb3VzIGVycm9ycyBsb3N0ICovCisjZGVmaW5lIE1DSV9TVEFUVVNf VUMJCUJJVF9VTEwoNjEpICAvKiB1bmNvcnJlY3RlZCBlcnJvciAqLworI2RlZmluZSBNQ0lfU1RB VFVTX0VOCQlCSVRfVUxMKDYwKSAgLyogZXJyb3IgZW5hYmxlZCAqLworI2RlZmluZSBNQ0lfU1RB VFVTX01JU0NWCUJJVF9VTEwoNTkpICAvKiBtaXNjIGVycm9yIHJlZy4gdmFsaWQgKi8KKyNkZWZp bmUgTUNJX1NUQVRVU19BRERSVglCSVRfVUxMKDU4KSAgLyogYWRkciByZWcuIHZhbGlkICovCisj ZGVmaW5lIE1DSV9TVEFUVVNfUENDCQlCSVRfVUxMKDU3KSAgLyogcHJvY2Vzc29yIGNvbnRleHQg Y29ycnVwdCAqLworI2RlZmluZSBNQ0lfU1RBVFVTX1MJCUJJVF9VTEwoNTYpICAvKiBTaWduYWxl ZCBtYWNoaW5lIGNoZWNrICovCisjZGVmaW5lIE1DSV9TVEFUVVNfQVIJCUJJVF9VTEwoNTUpICAv KiBBY3Rpb24gcmVxdWlyZWQgKi8KKyNkZWZpbmUgTUNJX1NUQVRVU19DRUNfU0hJRlQJMzggICAg ICAgICAgIC8qIENvcnJlY3RlZCBFcnJvciBDb3VudCAqLworI2RlZmluZSBNQ0lfU1RBVFVTX0NF Q19NQVNLCTB4MWZmZmMwMDAwMDAwMDBVTEwKKyNkZWZpbmUgTUNJX1NUQVRVU19DRUMoYykJKCgo YykgJiBNQ0lfU1RBVFVTX0NFQ19NQVNLKSA+PiBNQ0lfU1RBVFVTX0NFQ19TSElGVCkKIAogLyog QU1ELXNwZWNpZmljIGJpdHMgKi8KICNkZWZpbmUgTUNJX1NUQVRVU19UQ0MJCUJJVF9VTEwoNTUp ICAvKiBUYXNrIGNvbnRleHQgY29ycnVwdCAqLwo=