From mboxrd@z Thu Jan 1 00:00:00 1970 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: base64 Subject: [2/5] x86/mce: Add macors for corrected error count bit field From: Borislav Petkov Message-Id: <20180924202434.GF20187@zn.tnic> Date: Mon, 24 Sep 2018 22:24:34 +0200 To: Tony Luck Cc: Qiuxu Zhuo , Aristeu Rozanski , Mauro Carvalho Chehab , linux-edac@vger.kernel.org List-ID: T24gTW9uLCBTZXAgMjQsIDIwMTggYXQgMDE6MTY6MTBQTSAtMDcwMCwgVG9ueSBMdWNrIHdyb3Rl Ogo+IEZyb206IFFpdXh1IFpodW8gPHFpdXh1LnpodW9AaW50ZWwuY29tPgo+IAo+IFRoZSBiaXQg ZmllbGQgNTI6Mzggb2YgTUNpX1NUQVRVUyBpcyBmb3IgY29ycmVjdGVkIGVycm9yIGNvdW50Lgo+ IEFkZCB7Kl9TSElGVHwqX01BU0t8Kl9DRUMoYyl9IG1hY3JvcyBmb3IgdGhlIGJpdCBmaWVsZC4K PiAKPiBTaWduZWQtb2ZmLWJ5OiBRaXV4dSBaaHVvIDxxaXV4dS56aHVvQGludGVsLmNvbT4KPiBT aWduZWQtb2ZmLWJ5OiBUb255IEx1Y2sgPHRvbnkubHVja0BpbnRlbC5jb20+Cj4gLS0tCj4gIGFy Y2gveDg2L2luY2x1ZGUvYXNtL21jZS5oIHwgMjEgKysrKysrKysrKysrLS0tLS0tLS0tCj4gIDEg ZmlsZSBjaGFuZ2VkLCAxMiBpbnNlcnRpb25zKCspLCA5IGRlbGV0aW9ucygtKQo+IAo+IGRpZmYg LS1naXQgYS9hcmNoL3g4Ni9pbmNsdWRlL2FzbS9tY2UuaCBiL2FyY2gveDg2L2luY2x1ZGUvYXNt L21jZS5oCj4gaW5kZXggZDUzZTVkZDc0NzFhLi5hODFhMjJlMzU5MmMgMTAwNjQ0Cj4gLS0tIGEv YXJjaC94ODYvaW5jbHVkZS9hc20vbWNlLmgKPiArKysgYi9hcmNoL3g4Ni9pbmNsdWRlL2FzbS9t Y2UuaAo+IEBAIC0zMCwxNSArMzAsMTggQEAKPiAgI2RlZmluZSBNQ0dfRVhUX0NUTF9MTUNFX0VO IEJJVF9VTEwoMCkgLyogRW5hYmxlIExNQ0UgKi8KPiAgCj4gIC8qIE1DaV9TVEFUVVMgcmVnaXN0 ZXIgZGVmaW5lcyAqLwo+IC0jZGVmaW5lIE1DSV9TVEFUVVNfVkFMICAgQklUX1VMTCg2MykgIC8q IHZhbGlkIGVycm9yICovCj4gLSNkZWZpbmUgTUNJX1NUQVRVU19PVkVSICBCSVRfVUxMKDYyKSAg LyogcHJldmlvdXMgZXJyb3JzIGxvc3QgKi8KPiAtI2RlZmluZSBNQ0lfU1RBVFVTX1VDICAgIEJJ VF9VTEwoNjEpICAvKiB1bmNvcnJlY3RlZCBlcnJvciAqLwo+IC0jZGVmaW5lIE1DSV9TVEFUVVNf RU4gICAgQklUX1VMTCg2MCkgIC8qIGVycm9yIGVuYWJsZWQgKi8KPiAtI2RlZmluZSBNQ0lfU1RB VFVTX01JU0NWIEJJVF9VTEwoNTkpICAvKiBtaXNjIGVycm9yIHJlZy4gdmFsaWQgKi8KPiAtI2Rl ZmluZSBNQ0lfU1RBVFVTX0FERFJWIEJJVF9VTEwoNTgpICAvKiBhZGRyIHJlZy4gdmFsaWQgKi8K PiAtI2RlZmluZSBNQ0lfU1RBVFVTX1BDQyAgIEJJVF9VTEwoNTcpICAvKiBwcm9jZXNzb3IgY29u dGV4dCBjb3JydXB0ICovCj4gLSNkZWZpbmUgTUNJX1NUQVRVU19TCSBCSVRfVUxMKDU2KSAgLyog U2lnbmFsZWQgbWFjaGluZSBjaGVjayAqLwo+IC0jZGVmaW5lIE1DSV9TVEFUVVNfQVIJIEJJVF9V TEwoNTUpICAvKiBBY3Rpb24gcmVxdWlyZWQgKi8KPiArI2RlZmluZSBNQ0lfU1RBVFVTX1ZBTAkJ QklUX1VMTCg2MykgIC8qIHZhbGlkIGVycm9yICovCj4gKyNkZWZpbmUgTUNJX1NUQVRVU19PVkVS CQlCSVRfVUxMKDYyKSAgLyogcHJldmlvdXMgZXJyb3JzIGxvc3QgKi8KPiArI2RlZmluZSBNQ0lf U1RBVFVTX1VDCQlCSVRfVUxMKDYxKSAgLyogdW5jb3JyZWN0ZWQgZXJyb3IgKi8KPiArI2RlZmlu ZSBNQ0lfU1RBVFVTX0VOCQlCSVRfVUxMKDYwKSAgLyogZXJyb3IgZW5hYmxlZCAqLwo+ICsjZGVm aW5lIE1DSV9TVEFUVVNfTUlTQ1YJQklUX1VMTCg1OSkgIC8qIG1pc2MgZXJyb3IgcmVnLiB2YWxp ZCAqLwo+ICsjZGVmaW5lIE1DSV9TVEFUVVNfQUREUlYJQklUX1VMTCg1OCkgIC8qIGFkZHIgcmVn LiB2YWxpZCAqLwo+ICsjZGVmaW5lIE1DSV9TVEFUVVNfUENDCQlCSVRfVUxMKDU3KSAgLyogcHJv Y2Vzc29yIGNvbnRleHQgY29ycnVwdCAqLwo+ICsjZGVmaW5lIE1DSV9TVEFUVVNfUwkJQklUX1VM TCg1NikgIC8qIFNpZ25hbGVkIG1hY2hpbmUgY2hlY2sgKi8KPiArI2RlZmluZSBNQ0lfU1RBVFVT X0FSCQlCSVRfVUxMKDU1KSAgLyogQWN0aW9uIHJlcXVpcmVkICovCj4gKyNkZWZpbmUgTUNJX1NU QVRVU19DRUNfU0hJRlQJMzggICAgICAgICAgIC8qIENvcnJlY3RlZCBFcnJvciBDb3VudCAqLwo+ ICsjZGVmaW5lIE1DSV9TVEFUVVNfQ0VDX01BU0sJMHgxZmZmYzAwMDAwMDAwMFVMTAo+ICsjZGVm aW5lIE1DSV9TVEFUVVNfQ0VDKGMpCSgoKGMpICYgTUNJX1NUQVRVU19DRUNfTUFTSykgPj4gTUNJ X1NUQVRVU19DRUNfU0hJRlQpCgpUaGlzIGlzIHRoZSB3cm9uZyBzZXBhcmF0aW9uIG9mIGNoYW5n ZXM6IHRoZSAqZmlyc3QqIHBhdGNoIHNob3VsZApjb250YWluIHRoZSBzd2l0Y2ggdG8gdXNlIEJJ VF9VTEwoKSBhbmQgdGhlIHZlcnRpY2FsIHJlYWxpZ25tZW50Cm9mIGFsbCBiaXRzLCBpLmUuLCBj bGVhbnVwLCBhbmQgdGhlIHNlY29uZCBzaG91bGQgb25seSBhZGQgdGhlIG5ldwpmdW5jdGlvbmFs aXR5LCBpLmUuLCBtYWNyb3MgaW4gdGhpcyBjYXNlLgo=