From: "Ville Syrjälä" <ville.syrjala@linux.intel.com>
To: Paulo Zanoni <paulo.r.zanoni@intel.com>
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: [PATCH 1/3] drm/i915: DRM_FORMAT_C8 is not possible with Yf tiling
Date: Tue, 25 Sep 2018 15:02:09 +0300 [thread overview]
Message-ID: <20180925120209.GB9144@intel.com> (raw)
In-Reply-To: <20180925001913.29460-1-paulo.r.zanoni@intel.com>
On Mon, Sep 24, 2018 at 05:19:11PM -0700, Paulo Zanoni wrote:
> Function intel_framebuffer_init() checks for the possibilities during
> framebuffer creation (addfb ioctl time). It is missing the fact that
> the indexed format is not supported with Yf tiling.
>
> It is worth noticing that skl_plane_format_mod_supported() correctly
> handles for the C8/Yf combination, but this function runs during
> modeset time, so we only reject the combination later.
>
> Ville recently proposed a new IGT test that only uses addfb to assert
> supported formats, so that IGT was failing. Add the check so we get
> green squares right from the start after Ville merges his test.
I have two of three (possibly) nicer ways to solve this:
https://patchwork.freedesktop.org/series/39700/
https://patchwork.freedesktop.org/series/39383/
https://patchwork.freedesktop.org/series/39813/
Would be nice if someone could figure out a solution (one of those or
perhaps some other solution I didn't think of) that enough people are
willing to accept.
>
> Also drive-by fix the missing /* fall through */ in the chunk we
> modified by just turning it into a "break;" since IMHO breaks are
> easier to read than fall-throughs.
>
> BSpec: 18565
> Testcase: igt/kms_addfb_basic/expected-formats (not merged yet)
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
> ---
> drivers/gpu/drm/i915/intel_display.c | 8 +++++++-
> 1 file changed, 7 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index eb25037d7b38..fdff1779f778 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -14473,13 +14473,19 @@ static int intel_framebuffer_init(struct intel_framebuffer *intel_fb,
> goto err;
> }
> /* fall through */
> - case I915_FORMAT_MOD_Y_TILED:
> case I915_FORMAT_MOD_Yf_TILED:
> + if (mode_cmd->pixel_format == DRM_FORMAT_C8) {
> + DRM_DEBUG_KMS("Indexed format does not support Yf tiling\n");
> + goto err;
> + }
> + /* fall through */
> + case I915_FORMAT_MOD_Y_TILED:
> if (INTEL_GEN(dev_priv) < 9) {
> DRM_DEBUG_KMS("Unsupported tiling 0x%llx!\n",
> mode_cmd->modifier[0]);
> goto err;
> }
> + break;
> case DRM_FORMAT_MOD_LINEAR:
> case I915_FORMAT_MOD_X_TILED:
> break;
> --
> 2.14.4
--
Ville Syrjälä
Intel
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next prev parent reply other threads:[~2018-09-25 12:02 UTC|newest]
Thread overview: 12+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-25 0:19 [PATCH 1/3] drm/i915: DRM_FORMAT_C8 is not possible with Yf tiling Paulo Zanoni
2018-09-25 0:19 ` [PATCH 2/3] drm/i915: make the primary plane func structs const Paulo Zanoni
2018-09-25 12:05 ` Ville Syrjälä
2018-09-25 22:05 ` Paulo Zanoni
2018-09-25 0:19 ` [PATCH 3/3] drm/i915: remove a copy of skl_plane_format_mod_supported() Paulo Zanoni
2018-09-25 6:52 ` dhinakaran.pandiyan
2018-09-25 0:57 ` ✓ Fi.CI.BAT: success for series starting with [1/3] drm/i915: DRM_FORMAT_C8 is not possible with Yf tiling Patchwork
2018-09-25 2:10 ` ✓ Fi.CI.IGT: " Patchwork
2018-09-25 12:02 ` Ville Syrjälä [this message]
2018-09-25 22:02 ` [PATCH 1/3] " Paulo Zanoni
2018-09-27 14:16 ` Ville Syrjälä
2018-09-27 19:45 ` Paulo Zanoni
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