From: Greg KH <greg@kroah.com>
To: Thomas Petazzoni <thomas.petazzoni@bootlin.com>
Cc: stable@vger.kernel.org, Zachary Zhang <zhangzg@marvell.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@arm.com>
Subject: Re: [PATCH stable v4.14] PCI: aardvark: Size bridges before resources allocation
Date: Wed, 26 Sep 2018 15:16:21 +0200 [thread overview]
Message-ID: <20180926131621.GF7947@kroah.com> (raw)
In-Reply-To: <20180924151430.3073-1-thomas.petazzoni@bootlin.com>
On Mon, Sep 24, 2018 at 05:14:30PM +0200, Thomas Petazzoni wrote:
> From: Zachary Zhang <zhangzg@marvell.com>
>
> commit 91a2968e245d6ba616db37001fa1a043078b1a65 usptream.
>
> The PCIE I/O and MEM resource allocation mechanism is that root bus
> goes through the following steps:
>
Now applied, thanks.
greg k-h
prev parent reply other threads:[~2018-09-26 19:29 UTC|newest]
Thread overview: 2+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-09-24 15:14 [PATCH stable v4.14] PCI: aardvark: Size bridges before resources allocation Thomas Petazzoni
2018-09-26 13:16 ` Greg KH [this message]
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