From: Mauro Rossi <issor.oruam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
To: amd-gfx-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org
Cc: harry.wentland-5C7GfCeVMHo@public.gmane.org
Subject: [PATCH 03/10] drm/amd/display: dc/core: add DCE6 support
Date: Mon, 8 Oct 2018 04:23:37 +0200 [thread overview]
Message-ID: <20181008022344.10247-4-issor.oruam@gmail.com> (raw)
In-Reply-To: <20181008022344.10247-1-issor.oruam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
DCE6 targets are added as branching of existing DCE8 implementation.
---
.../gpu/drm/amd/display/dc/core/dc_resource.c | 29 +++++++++++++++++++
1 file changed, 29 insertions(+)
diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
index ea6beccfd89d..16568e79d4b5 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_resource.c
@@ -37,6 +37,9 @@
#include "virtual/virtual_stream_encoder.h"
#include "dpcd_defs.h"
+#if defined(CONFIG_DRM_AMD_DC_SI)
+#include "dce60/dce60_resource.h"
+#endif
#include "dce80/dce80_resource.h"
#include "dce100/dce100_resource.h"
#include "dce110/dce110_resource.h"
@@ -53,6 +56,18 @@ enum dce_version resource_parse_asic_id(struct hw_asic_id asic_id)
enum dce_version dc_version = DCE_VERSION_UNKNOWN;
switch (asic_id.chip_family) {
+#if defined(CONFIG_DRM_AMD_DC_SI)
+ case FAMILY_SI:
+ if (ASIC_REV_IS_TAHITI_P(asic_id.hw_internal_rev) ||
+ ASIC_REV_IS_PITCAIRN_PM(asic_id.hw_internal_rev) ||
+ ASIC_REV_IS_CAPEVERDE_M(asic_id.hw_internal_rev))
+ dc_version = DCE_VERSION_6_0;
+ else if (ASIC_REV_IS_OLAND_M(asic_id.hw_internal_rev))
+ dc_version = DCE_VERSION_6_4;
+ else
+ dc_version = DCE_VERSION_6_1;
+ break;
+#endif
case FAMILY_CI:
dc_version = DCE_VERSION_8_0;
break;
@@ -106,6 +121,20 @@ struct resource_pool *dc_create_resource_pool(
struct resource_pool *res_pool = NULL;
switch (dc_version) {
+#if defined(CONFIG_DRM_AMD_DC_SI)
+ case DCE_VERSION_6_0:
+ res_pool = dce60_create_resource_pool(
+ num_virtual_links, dc);
+ break;
+ case DCE_VERSION_6_1:
+ res_pool = dce61_create_resource_pool(
+ num_virtual_links, dc);
+ break;
+ case DCE_VERSION_6_4:
+ res_pool = dce64_create_resource_pool(
+ num_virtual_links, dc);
+ break;
+#endif
case DCE_VERSION_8_0:
res_pool = dce80_create_resource_pool(
num_virtual_links, dc);
--
2.17.1
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next prev parent reply other threads:[~2018-10-08 2:23 UTC|newest]
Thread overview: 30+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-08 2:23 [RFC] drm/amd/display: add SI support to AMD DC Mauro Rossi
[not found] ` <20181008022344.10247-1-issor.oruam-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-08 2:23 ` [PATCH 01/10] drm/amd/display: add asics info for SI parts Mauro Rossi
2018-10-08 2:23 ` [PATCH 02/10] drm/amd/display: dc/dce: add DCE6 support Mauro Rossi
2018-10-08 2:23 ` Mauro Rossi [this message]
2018-10-08 2:23 ` [PATCH 04/10] drm/amd/display: dc/bios: add support for DCE6 Mauro Rossi
2018-10-08 2:23 ` [PATCH 05/10] drm/amd/display: dc/gpio: " Mauro Rossi
2018-10-08 2:23 ` [PATCH 06/10] drm/amd/display: dc/i2caux: " Mauro Rossi
2018-10-08 2:23 ` [PATCH 07/10] drm/amd/display: dc/irq: " Mauro Rossi
2018-10-08 2:23 ` [PATCH 08/10] drm/amd/display: amdgpu_dm: add SI support Mauro Rossi
2018-10-08 2:23 ` [PATCH 09/10] drm/amdgpu: enable DC support for SI parts Mauro Rossi
2018-10-08 2:23 ` [PATCH 10/10] drm/amd/display: enable SI support in the Kconfig Mauro Rossi
2018-10-08 11:00 ` [RFC] drm/amd/display: add SI support to AMD DC Mike Lothian
[not found] ` <CAHbf0-HK4W4xE-hOJPiwr8zhzuuG2GobCTyHHik3mwe1-9_BmQ-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-08 11:22 ` Mauro Rossi
[not found] ` <CAEQFVGbWWy7jmcaserbMwANNHei90WX+1AvOfDAY8J=BcsyCrg-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-08 11:29 ` Christian König
[not found] ` <7a8b5d6d-82c2-2b98-b2b2-098baf095aef-Re5JQEeQqe8AvxtiuMwx3w@public.gmane.org>
2018-10-08 12:16 ` Mike Lothian
[not found] ` <CAHbf0-FB2GV18igVo-8MHcVGL89KZoXn+O2B4asoe5R4RbgCVw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-08 15:47 ` Deucher, Alexander
2018-10-08 12:04 ` sylvain.bertrand-Re5JQEeQqe8AvxtiuMwx3w
2018-10-08 12:32 ` sylvain.bertrand-Re5JQEeQqe8AvxtiuMwx3w
2018-10-08 17:02 ` Mauro Rossi
[not found] ` <CAEQFVGahx4U+52uKu20_q0iCPrdzeW8G+viS7p2LJtgF61bf6Q-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-08 20:17 ` sylvain.bertrand-Re5JQEeQqe8AvxtiuMwx3w
2018-10-08 21:22 ` sylvain.bertrand-Re5JQEeQqe8AvxtiuMwx3w
2018-10-14 21:47 ` Mauro Rossi
[not found] ` <CAEQFVGaErupy3y+sKA+uqQPn7x0oL1T9BKWj6y8EC12Ap2-YDw-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-15 1:25 ` sylvain.bertrand-Re5JQEeQqe8AvxtiuMwx3w
2018-10-15 5:28 ` Mauro Rossi
[not found] ` <CAEQFVGbB_ezGSGwPu2Ka-4rY9RjB_rJvPL8ZCEG-_rfXxOEN-A-JsoAwUIsXosN+BqQ9rBEUg@public.gmane.org>
2018-10-15 12:45 ` sylvain.bertrand-Re5JQEeQqe8AvxtiuMwx3w
2018-10-15 17:53 ` Deucher, Alexander
2018-10-15 21:06 ` Harry Wentland
[not found] ` <bef5787e-cc8d-df35-dc55-353ed4443a8c-5C7GfCeVMHo@public.gmane.org>
2018-10-15 21:19 ` Harry Wentland
[not found] ` <70b01042-3210-dcce-2b9a-a16754db9f10-5C7GfCeVMHo@public.gmane.org>
2018-10-16 12:20 ` Mauro Rossi
2018-10-16 14:48 ` Mauro Rossi
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