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diff for duplicates of <20181010170842.GD16512@arm.com>

diff --git a/a/1.txt b/N1/1.txt
index b741085..7be16ac 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -14,7 +14,7 @@ On Fri, Oct 05, 2018 at 04:17:30PM +0100, Marc Zyngier wrote:
 > > >>> On 04/10/18 23:11, Matthias Brugger wrote:
 > > >>>> Friendly reminder, if anyone has any comment on the patch :)
 > > >>>>
-> > >>>> On 9/12/18 11:52 AM, matthias.bgg at kernel.org wrote:
+> > >>>> On 9/12/18 11:52 AM, matthias.bgg@kernel.org wrote:
 > > >>>>> From: Matthias Brugger <mbrugger@suse.com>
 > > >>>>>
 > > >>>>> Some hardware does not implement two-level page tables so that
@@ -27,11 +27,11 @@ On Fri, Oct 05, 2018 at 04:17:30PM +0100, Marc Zyngier wrote:
 > > >>>>>
 > > >>>>> Signed-off-by: Matthias Brugger <mbrugger@suse.com>
 > > >>>>> ---
-> > >>>>> ?? arch/arm64/Kconfig?????????????? | 12 ++++++++
-> > >>>>> ?? arch/arm64/include/asm/cpucaps.h |? 3 +-
-> > >>>>> ?? arch/arm64/kernel/cpu_errata.c?? | 33 +++++++++++++++++++++
-> > >>>>> ?? drivers/irqchip/irq-gic-v3-its.c | 50 ++++++++++++++++++++------------
-> > >>>>> ?? 4 files changed, 79 insertions(+), 19 deletions(-)
+> > >>>>>    arch/arm64/Kconfig               | 12 ++++++++
+> > >>>>>    arch/arm64/include/asm/cpucaps.h |  3 +-
+> > >>>>>    arch/arm64/kernel/cpu_errata.c   | 33 +++++++++++++++++++++
+> > >>>>>    drivers/irqchip/irq-gic-v3-its.c | 50 ++++++++++++++++++++------------
+> > >>>>>    4 files changed, 79 insertions(+), 19 deletions(-)
 > > >>>
 > > >>> My only comment would be to state how much I dislike both the HW and the
 > > >>> patch... ;-) The idea that we have some erratum that depends on the page size
@@ -46,11 +46,11 @@ On Fri, Oct 05, 2018 at 04:17:30PM +0100, Marc Zyngier wrote:
 > > >>>>> --- a/arch/arm64/Kconfig
 > > >>>>> +++ b/arch/arm64/Kconfig
 > > >>>>> @@ -597,6 +597,18 @@ config QCOM_FALKOR_ERRATUM_E1041
-> > >>>>> ?? ??????? If unsure, say Y.
-> > >>>>> ?? +config CAVIUM_ALLOC_ITS_TABLE_EARLY
-> > >>>>> +??? bool "Cavium Thunderx: Allocate the its table early"
-> > >>>>> +??? default y
-> > >>>>> +??? depends on ARM64_4K_PAGES && FORCE_MAX_ZONEORDER < 13
+> > >>>>>            If unsure, say Y.
+> > >>>>>    +config CAVIUM_ALLOC_ITS_TABLE_EARLY
+> > >>>>> +    bool "Cavium Thunderx: Allocate the its table early"
+> > >>>>> +    default y
+> > >>>>> +    depends on ARM64_4K_PAGES && FORCE_MAX_ZONEORDER < 13
 > > >>>
 > > >>> Here's a though: Why don't we ensure that FORCE_MAX_ZONEORDER is such as we
 > > >>> could always allocate the same amount of memory, no matter what the page size
diff --git a/a/content_digest b/N1/content_digest
index ff47963..282caad 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -5,10 +5,23 @@
  "ref\01d227152-2770-3e93-f78c-71e7a3b4fe76@arm.com\0"
  "ref\093532c6a-0a84-4063-3f9f-171490985cbb@gmail.com\0"
  "ref\086y3bctoc5.wl-marc.zyngier@arm.com\0"
- "From\0will.deacon@arm.com (Will Deacon)\0"
- "Subject\0[PATCH] irqchip/gic-v3-its: Add early memory allocation errata\0"
+ "From\0Will Deacon <will.deacon@arm.com>\0"
+ "Subject\0Re: [PATCH] irqchip/gic-v3-its: Add early memory allocation errata\0"
  "Date\0Wed, 10 Oct 2018 18:08:43 +0100\0"
- "To\0linux-arm-kernel@lists.infradead.org\0"
+ "To\0Marc Zyngier <marc.zyngier@arm.com>\0"
+ "Cc\0Matthias Brugger <matthias.bgg@gmail.com>"
+  Matthias Brugger <mbrugger@suse.com>
+  matthias.bgg@kernel.org
+  catalin.marinas@arm.com
+  tglx@linutronix.de
+  jason@lakedaemon.net
+  robert.richter@cavium.com
+  suzuki.poulose@arm.com
+  shankerd@codeaurora.org
+  xiexiuqi@huawei.com
+  Dave.Martin@arm.com
+  linux-arm-kernel@lists.infradead.org
+ " linux-kernel@vger.kernel.org\0"
  "\00:1\0"
  "b\0"
  "On Fri, Oct 05, 2018 at 04:17:30PM +0100, Marc Zyngier wrote:\n"
@@ -27,7 +40,7 @@
  "> > >>> On 04/10/18 23:11, Matthias Brugger wrote:\n"
  "> > >>>> Friendly reminder, if anyone has any comment on the patch :)\n"
  "> > >>>>\n"
- "> > >>>> On 9/12/18 11:52 AM, matthias.bgg at kernel.org wrote:\n"
+ "> > >>>> On 9/12/18 11:52 AM, matthias.bgg@kernel.org wrote:\n"
  "> > >>>>> From: Matthias Brugger <mbrugger@suse.com>\n"
  "> > >>>>>\n"
  "> > >>>>> Some hardware does not implement two-level page tables so that\n"
@@ -40,11 +53,11 @@
  "> > >>>>>\n"
  "> > >>>>> Signed-off-by: Matthias Brugger <mbrugger@suse.com>\n"
  "> > >>>>> ---\n"
- "> > >>>>> ?? arch/arm64/Kconfig?????????????? | 12 ++++++++\n"
- "> > >>>>> ?? arch/arm64/include/asm/cpucaps.h |? 3 +-\n"
- "> > >>>>> ?? arch/arm64/kernel/cpu_errata.c?? | 33 +++++++++++++++++++++\n"
- "> > >>>>> ?? drivers/irqchip/irq-gic-v3-its.c | 50 ++++++++++++++++++++------------\n"
- "> > >>>>> ?? 4 files changed, 79 insertions(+), 19 deletions(-)\n"
+ "> > >>>>> \302\240\302\240 arch/arm64/Kconfig\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240\302\240 | 12 ++++++++\n"
+ "> > >>>>> \302\240\302\240 arch/arm64/include/asm/cpucaps.h |\302\240 3 +-\n"
+ "> > >>>>> \302\240\302\240 arch/arm64/kernel/cpu_errata.c\302\240\302\240 | 33 +++++++++++++++++++++\n"
+ "> > >>>>> \302\240\302\240 drivers/irqchip/irq-gic-v3-its.c | 50 ++++++++++++++++++++------------\n"
+ "> > >>>>> \302\240\302\240 4 files changed, 79 insertions(+), 19 deletions(-)\n"
  "> > >>>\n"
  "> > >>> My only comment would be to state how much I dislike both the HW and the\n"
  "> > >>> patch... ;-) The idea that we have some erratum that depends on the page size\n"
@@ -59,11 +72,11 @@
  "> > >>>>> --- a/arch/arm64/Kconfig\n"
  "> > >>>>> +++ b/arch/arm64/Kconfig\n"
  "> > >>>>> @@ -597,6 +597,18 @@ config QCOM_FALKOR_ERRATUM_E1041\n"
- "> > >>>>> ?? ??????? If unsure, say Y.\n"
- "> > >>>>> ?? +config CAVIUM_ALLOC_ITS_TABLE_EARLY\n"
- "> > >>>>> +??? bool \"Cavium Thunderx: Allocate the its table early\"\n"
- "> > >>>>> +??? default y\n"
- "> > >>>>> +??? depends on ARM64_4K_PAGES && FORCE_MAX_ZONEORDER < 13\n"
+ "> > >>>>> \302\240\302\240 \302\240\302\240\302\240\302\240\302\240\302\240\302\240 If unsure, say Y.\n"
+ "> > >>>>> \302\240\302\240 +config CAVIUM_ALLOC_ITS_TABLE_EARLY\n"
+ "> > >>>>> +\302\240\302\240\302\240 bool \"Cavium Thunderx: Allocate the its table early\"\n"
+ "> > >>>>> +\302\240\302\240\302\240 default y\n"
+ "> > >>>>> +\302\240\302\240\302\240 depends on ARM64_4K_PAGES && FORCE_MAX_ZONEORDER < 13\n"
  "> > >>>\n"
  "> > >>> Here's a though: Why don't we ensure that FORCE_MAX_ZONEORDER is such as we\n"
  "> > >>> could always allocate the same amount of memory, no matter what the page size\n"
@@ -112,4 +125,4 @@
  "\n"
  Will
 
-2df5246dbf48218dd5f611b6435b7808e110899d540e8ec0d72b1e8b613efc20
+2d359ec560e711b6b083b596daecc05b7add27c9f40a6efc3116904d122ec9b9

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