From mboxrd@z Thu Jan 1 00:00:00 1970 From: Rob Herring Subject: Re: [PATCH 6/9] PM / OPP: dt-bindings: Add opp-interconnect-bw Date: Mon, 15 Oct 2018 09:34:20 -0500 Message-ID: <20181015143420.GA16932@bogus> References: <20180827151112.25211-1-jcrouse@codeaurora.org> <20180827151112.25211-7-jcrouse@codeaurora.org> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20180827151112.25211-7-jcrouse-sgV2jX0FEOL9JmXXK+q4OQ@public.gmane.org> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: freedreno-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Freedreno" To: Jordan Crouse Cc: nm-l0cyMroinI0@public.gmane.org, devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, linux-pm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, sboyd-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, bjorn.andersson-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, vireshk-DgEjT+Ai2ygdnm+yROfE0A@public.gmane.org, freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, georgi.djakov-QSEj5FYQhm4dnm+yROfE0A@public.gmane.org, linux-arm-kernel-IAPFreCvJWM7uuMidbF8XUB+6BGkLq7r@public.gmane.org List-Id: linux-arm-msm@vger.kernel.org T24gTW9uLCBBdWcgMjcsIDIwMTggYXQgMDk6MTE6MDlBTSAtMDYwMCwgSm9yZGFuIENyb3VzZSB3 cm90ZToKPiBBZGQgdGhlICJvcHAtaW50ZXJjb25uZWN0LWJ3IiBwcm9wZXJ0eSB0byBzcGVjaWZ5 IHRoZQo+IGF2ZXJhZ2UgYW5kIHBlYWsgYmFuZHdpZHRoIGZvciBhbiBpbnRlcmNvbm5lY3QgcGF0 aCBmb3IKPiBhIHNwZWNpZmljIG9wZXJhdGluZyBwb3dlciBwb2ludC4gQSBzZXBhcmF0ZSBiYW5k d2lkdGgKPiBwYWlyIGNhbiBiZSBzcGVjaWZpZWQgZm9yIGVhY2ggb2YgdGhlIGludGVyY29ubmVj dHMKPiBkZWZpbmVkIGZvciB0aGUgZGV2aWNlIGJ5IGFwcGVuZGluZyB0aGUgaW50ZXJjb25uZWN0 Cj4gbmFtZSB0byB0aGUgcHJvcGVydHkuCj4gCj4gU2lnbmVkLW9mZi1ieTogSm9yZGFuIENyb3Vz ZSA8amNyb3VzZUBjb2RlYXVyb3JhLm9yZz4KPiAtLS0KPiAgRG9jdW1lbnRhdGlvbi9kZXZpY2V0 cmVlL2JpbmRpbmdzL29wcC9vcHAudHh0IHwgMzYgKysrKysrKysrKysrKysrKysrKwo+ICAxIGZp bGUgY2hhbmdlZCwgMzYgaW5zZXJ0aW9ucygrKQo+IAo+IGRpZmYgLS1naXQgYS9Eb2N1bWVudGF0 aW9uL2RldmljZXRyZWUvYmluZGluZ3Mvb3BwL29wcC50eHQgYi9Eb2N1bWVudGF0aW9uL2Rldmlj ZXRyZWUvYmluZGluZ3Mvb3BwL29wcC50eHQKPiBpbmRleCBjMzk2YzRjMGFmOTIuLmQ3MTRjMDg0 ZjM2ZCAxMDA2NDQKPiAtLS0gYS9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3Mvb3Bw L29wcC50eHQKPiArKysgYi9Eb2N1bWVudGF0aW9uL2RldmljZXRyZWUvYmluZGluZ3Mvb3BwL29w cC50eHQKPiBAQCAtMTcwLDYgKzE3MCwxMSBAQCBPcHRpb25hbCBwcm9wZXJ0aWVzOgo+ICAgIGZ1 bmN0aW9uaW5nIG9mIHRoZSBjdXJyZW50IGRldmljZSBhdCB0aGUgY3VycmVudCBPUFAgKHdoZXJl IHRoaXMgcHJvcGVydHkgaXMKPiAgICBwcmVzZW50KS4KPiAgCj4gKy0gb3BwLWludGVyY29ubmVj dC1idy08bmFtZT46IFRoaXMgaXMgYW4gYXJyYXkgb2YgcGFpcnMgc3BlY2lmeWluZyB0aGUgYXZl cmFnZQo+ICsgIGFuZCBwZWFrIGJhbmR3aWR0aCBpbiBieXRlcyBwZXIgc2Vjb25kIGZvciB0aGUg aW50ZXJjb25uZWN0IHBhdGgga25vd24gYnkKPiArICAnbmFtZScuICBUaGlzIHNob3VsZCBtYXRj aCB0aGUgbmFtZShzKSBzcGVjaWZpZWQgYnkgaW50ZXJjb25uZWN0LW5hbWVzIGluIHRoZQo+ICsg IGRldmljZSBkZWZpbml0aW9uLgo+ICsKCkkgZG9uJ3QgdGhpbmsgdGhpcyBpcyBnb29kIGRlc2ln biB3aXRoIHRoZSBuYW1lIGRlZmluZWQgaW4gb25lIG5vZGUgYW5kIAp0aGVuIHVzZWQgaW4gdGhl IE9QUCB0YWJsZS4gRmlyc3QsICcqLW5hbWVzJyBpcyB0eXBpY2FsbHkgdGhlIGEgbmFtZSAKbG9j YWwgdG8gdGhhdCBub2RlL2RldmljZS4gSWYgeW91IGhhZCAyIGluc3RhbmNlcyBvZiBhIGRldmlj ZSB3aXRoIGEgCnNoYXJlZCBPUFAgdGFibGUgZm9yIHRoZSAyIGluc3RhbmNlcywgdGhlbiB5b3Ug YXJlIGdvaW5nIHRvIGhhdmUgdG8gCm1ha2UgdGhlIG5hbWVzIHVuaXF1ZS4gU2Vjb25kLCBob3cg ZXhhY3RseSB3b3VsZCBoYXZpbmcgbXVsdGlwbGUgYi93IAplbnRyaWVzIHdvcms/IEEgZ2l2ZW4g T1BQIGZyZXF1ZW5jeSBzdXBwb3J0cyB0aGUgc3VtIG9mIHRoZSBiL3cgZW50cmllcz8gCldoYXQg aWYgc29tZSBkZXZpY2VzIGZvciBiL3cgZW50cmllcyBhcmVuJ3QgY3VycmVudGx5IGFjdGl2ZT8K ClRoaXMgYWxzbyBzZWVtcyBsaWtlIGEgbWl4dHVyZSBvZiB1c2luZyBPUFAgdGFibGUgZm9yIHNl dHRpbmcgR1BVJ3MgCmJhbmR3aWR0aC9mcmVxIGFuZCB0aGVuIHRoZSBpbnRlcmNvbm5lY3QgYmlu ZGluZyB0byBzZXQgdGhlIAppbnRlcmNvbm5lY3QncyBiYW5kd2lkdGguIFBlcmhhcHMgd2UgbmVl ZCBhIG1vcmUgdW5pZmllZCBhcHByb2FjaC4gTm90IApzdXJlIHdoYXQgdGhhdCB3b3VsZCBsb29r IGxpa2UgdGhvdWdoLgoKUm9iCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fCkZyZWVkcmVubyBtYWlsaW5nIGxpc3QKRnJlZWRyZW5vQGxpc3RzLmZyZWVkZXNr dG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2Zy ZWVkcmVubwo= From mboxrd@z Thu Jan 1 00:00:00 1970 From: robh@kernel.org (Rob Herring) Date: Mon, 15 Oct 2018 09:34:20 -0500 Subject: [PATCH 6/9] PM / OPP: dt-bindings: Add opp-interconnect-bw In-Reply-To: <20180827151112.25211-7-jcrouse@codeaurora.org> References: <20180827151112.25211-1-jcrouse@codeaurora.org> <20180827151112.25211-7-jcrouse@codeaurora.org> Message-ID: <20181015143420.GA16932@bogus> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Mon, Aug 27, 2018 at 09:11:09AM -0600, Jordan Crouse wrote: > Add the "opp-interconnect-bw" property to specify the > average and peak bandwidth for an interconnect path for > a specific operating power point. A separate bandwidth > pair can be specified for each of the interconnects > defined for the device by appending the interconnect > name to the property. > > Signed-off-by: Jordan Crouse > --- > Documentation/devicetree/bindings/opp/opp.txt | 36 +++++++++++++++++++ > 1 file changed, 36 insertions(+) > > diff --git a/Documentation/devicetree/bindings/opp/opp.txt b/Documentation/devicetree/bindings/opp/opp.txt > index c396c4c0af92..d714c084f36d 100644 > --- a/Documentation/devicetree/bindings/opp/opp.txt > +++ b/Documentation/devicetree/bindings/opp/opp.txt > @@ -170,6 +170,11 @@ Optional properties: > functioning of the current device at the current OPP (where this property is > present). > > +- opp-interconnect-bw-: This is an array of pairs specifying the average > + and peak bandwidth in bytes per second for the interconnect path known by > + 'name'. This should match the name(s) specified by interconnect-names in the > + device definition. > + I don't think this is good design with the name defined in one node and then used in the OPP table. First, '*-names' is typically the a name local to that node/device. If you had 2 instances of a device with a shared OPP table for the 2 instances, then you are going to have to make the names unique. Second, how exactly would having multiple b/w entries work? A given OPP frequency supports the sum of the b/w entries? What if some devices for b/w entries aren't currently active? This also seems like a mixture of using OPP table for setting GPU's bandwidth/freq and then the interconnect binding to set the interconnect's bandwidth. Perhaps we need a more unified approach. Not sure what that would look like though. Rob