From mboxrd@z Thu Jan  1 00:00:00 1970
From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= <ville.syrjala@linux.intel.com>
Subject: Re: [PATCH v5 24/28] drm/i915/dp: Configure Display stream splitter
 registers during DSC enable
Date: Thu, 18 Oct 2018 20:02:14 +0300
Message-ID: <20181018170214.GQ9144@intel.com>
References: <20181005232306.31133-1-manasi.d.navare@intel.com>
 <20181005232306.31133-25-manasi.d.navare@intel.com>
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To: Manasi Navare <manasi.d.navare@intel.com>
Cc: intel-gfx@lists.freedesktop.org, Anusha Srivatsa <anusha.srivatsa@intel.com>, dri-devel@lists.freedesktop.org
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