From mboxrd@z Thu Jan 1 00:00:00 1970 From: jakub.kicinski@netronome.com (Jakub Kicinski) Date: Wed, 24 Oct 2018 15:46:13 -0700 Subject: [PATCH v3 2/7] include: add setbits_leXX/clrbits_leXX/clrsetbits_leXX in linux/setbits.h In-Reply-To: <1540366553-18541-3-git-send-email-clabbe@baylibre.com> References: <1540366553-18541-1-git-send-email-clabbe@baylibre.com> <1540366553-18541-3-git-send-email-clabbe@baylibre.com> Message-ID: <20181024154613.3ecc96dc@cakuba.netronome.com> To: linus-amlogic@lists.infradead.org List-Id: linus-amlogic.lists.infradead.org On Wed, 24 Oct 2018 07:35:48 +0000, Corentin Labbe wrote: > This patch adds setbits_le32/clrbits_le32/clrsetbits_le32 and > setbits_le64/clrbits_le64/clrsetbits_le64 in linux/setbits.h header. > > Signed-off-by: Corentin Labbe Did you have a look at all the functions defined in bitfield.h? (including the magic macro-generated ones?) Perhaps those could be used here? I also share the concerns about the non-atomic RMW. Obviously correct beats short IMHO. > diff --git a/include/linux/setbits.h b/include/linux/setbits.h > new file mode 100644 > index 000000000000..c82faf8d7fe4 > --- /dev/null > +++ b/include/linux/setbits.h > @@ -0,0 +1,84 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef __LINUX_SETBITS_H > +#define __LINUX_SETBITS_H > + > +#include > + > +#define __setbits(rfn, wfn, addr, set) wfn((rfn(addr) | (set)), addr) > +#define __clrbits(rfn, wfn, addr, mask) wfn((rfn(addr) & ~(mask)), addr) > +#define __clrsetbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) & ~(mask)) | (set)), addr) > +#define __setclrbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) | (set)) & ~(mask)), addr) > + > +#ifndef setbits_le32 > +#define setbits_le32(addr, set) __setbits(readl, writel, addr, set) > +#endif > +#ifndef setbits_le32_relaxed > +#define setbits_le32_relaxed(addr, set) __setbits(readl_relaxed, writel_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le32 > +#define clrbits_le32(addr, mask) __clrbits(readl, writel, addr, mask) > +#endif > +#ifndef clrbits_le32_relaxed > +#define clrbits_le32_relaxed(addr, mask) __clrbits(readl_relaxed, writel_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le32 > +#define clrsetbits_le32(addr, mask, set) __clrsetbits(readl, writel, addr, mask, set) > +#endif > +#ifndef clrsetbits_le32_relaxed > +#define clrsetbits_le32_relaxed(addr, mask, set) __clrsetbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le32 > +#define setclrbits_le32(addr, mask, set) __setclrbits(readl, writel, addr, mask, set) > +#endif > +#ifndef setclrbits_le32_relaxed > +#define setclrbits_le32_relaxed(addr, mask, set) __setclrbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +/* We cannot use CONFIG_64BIT as some x86 drivers use non-atomicwriteq() */ > +#if defined(writeq) && defined(readq) > +#ifndef setbits_le64 > +#define setbits_le64(addr, set) __setbits(readq, writeq, addr, set) > +#endif > +#ifndef setbits_le64_relaxed > +#define setbits_le64_relaxed(addr, set) __setbits(readq_relaxed, writeq_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le64 > +#define clrbits_le64(addr, mask) __clrbits(readq, writeq, addr, mask) > +#endif > +#ifndef clrbits_le64_relaxed > +#define clrbits_le64_relaxed(addr, mask) __clrbits(readq_relaxed, writeq_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le64 > +#define clrsetbits_le64(addr, mask, set) __clrsetbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef clrsetbits_le64_relaxed > +#define clrsetbits_le64_relaxed(addr, mask, set) __clrsetbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le64 > +#define setclrbits_le64(addr, mask, set) __setclrbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef setclrbits_le64_relaxed > +#define setclrbits_le64_relaxed(addr, mask, set) __setclrbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#endif /* writeq/readq */ > + > +#endif /* __LINUX_SETBITS_H */ From mboxrd@z Thu Jan 1 00:00:00 1970 From: Jakub Kicinski Subject: Re: [PATCH v3 2/7] include: add setbits_leXX/clrbits_leXX/clrsetbits_leXX in linux/setbits.h Date: Wed, 24 Oct 2018 15:46:13 -0700 Message-ID: <20181024154613.3ecc96dc@cakuba.netronome.com> References: <1540366553-18541-1-git-send-email-clabbe@baylibre.com> <1540366553-18541-3-git-send-email-clabbe@baylibre.com> Mime-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Return-path: In-Reply-To: <1540366553-18541-3-git-send-email-clabbe@baylibre.com> Sender: linux-kernel-owner@vger.kernel.org To: Corentin Labbe Cc: Gilles.Muller@lip6.fr, Julia.Lawall@lip6.fr, agust@denx.de, airlied@linux.ie, alexandre.torgue@st.com, alistair@popple.id.au, benh@kernel.crashing.org, carlo@caione.org, davem@davemloft.net, galak@kernel.crashing.org, joabreu@synopsys.com, khilman@baylibre.com, matthias.bgg@gmail.com, maxime.ripard@bootlin.com, michal.lkml@markovi.net, mpe@ellerman.id.au, mporter@kernel.crashing.org, narmstrong@baylibre.com, nicolas.palix@imag.fr, oss@buserror.net, paulus@samba.org, peppe.cavallaro@st.com, tj@kernel.org, vitb@kernel.crashing.org, wens@csie.org, cocci@systeme.lip6.fr, dri-devel@lists.freedesktop.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linuxppc-dev@lists. List-Id: linux-ide@vger.kernel.org On Wed, 24 Oct 2018 07:35:48 +0000, Corentin Labbe wrote: > This patch adds setbits_le32/clrbits_le32/clrsetbits_le32 and > setbits_le64/clrbits_le64/clrsetbits_le64 in linux/setbits.h header. > > Signed-off-by: Corentin Labbe Did you have a look at all the functions defined in bitfield.h? (including the magic macro-generated ones?) Perhaps those could be used here? I also share the concerns about the non-atomic RMW. Obviously correct beats short IMHO. > diff --git a/include/linux/setbits.h b/include/linux/setbits.h > new file mode 100644 > index 000000000000..c82faf8d7fe4 > --- /dev/null > +++ b/include/linux/setbits.h > @@ -0,0 +1,84 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef __LINUX_SETBITS_H > +#define __LINUX_SETBITS_H > + > +#include > + > +#define __setbits(rfn, wfn, addr, set) wfn((rfn(addr) | (set)), addr) > +#define __clrbits(rfn, wfn, addr, mask) wfn((rfn(addr) & ~(mask)), addr) > +#define __clrsetbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) & ~(mask)) | (set)), addr) > +#define __setclrbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) | (set)) & ~(mask)), addr) > + > +#ifndef setbits_le32 > +#define setbits_le32(addr, set) __setbits(readl, writel, addr, set) > +#endif > +#ifndef setbits_le32_relaxed > +#define setbits_le32_relaxed(addr, set) __setbits(readl_relaxed, writel_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le32 > +#define clrbits_le32(addr, mask) __clrbits(readl, writel, addr, mask) > +#endif > +#ifndef clrbits_le32_relaxed > +#define clrbits_le32_relaxed(addr, mask) __clrbits(readl_relaxed, writel_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le32 > +#define clrsetbits_le32(addr, mask, set) __clrsetbits(readl, writel, addr, mask, set) > +#endif > +#ifndef clrsetbits_le32_relaxed > +#define clrsetbits_le32_relaxed(addr, mask, set) __clrsetbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le32 > +#define setclrbits_le32(addr, mask, set) __setclrbits(readl, writel, addr, mask, set) > +#endif > +#ifndef setclrbits_le32_relaxed > +#define setclrbits_le32_relaxed(addr, mask, set) __setclrbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +/* We cannot use CONFIG_64BIT as some x86 drivers use non-atomicwriteq() */ > +#if defined(writeq) && defined(readq) > +#ifndef setbits_le64 > +#define setbits_le64(addr, set) __setbits(readq, writeq, addr, set) > +#endif > +#ifndef setbits_le64_relaxed > +#define setbits_le64_relaxed(addr, set) __setbits(readq_relaxed, writeq_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le64 > +#define clrbits_le64(addr, mask) __clrbits(readq, writeq, addr, mask) > +#endif > +#ifndef clrbits_le64_relaxed > +#define clrbits_le64_relaxed(addr, mask) __clrbits(readq_relaxed, writeq_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le64 > +#define clrsetbits_le64(addr, mask, set) __clrsetbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef clrsetbits_le64_relaxed > +#define clrsetbits_le64_relaxed(addr, mask, set) __clrsetbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le64 > +#define setclrbits_le64(addr, mask, set) __setclrbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef setclrbits_le64_relaxed > +#define setclrbits_le64_relaxed(addr, mask, set) __setclrbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#endif /* writeq/readq */ > + > +#endif /* __LINUX_SETBITS_H */ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.5 required=3.0 tests=DKIM_INVALID,DKIM_SIGNED, HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI,SIGNED_OFF_BY, SPF_PASS,URIBL_BLOCKED autolearn=unavailable autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 2F5B6ECDE44 for ; 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MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit X-BeenThere: linuxppc-dev@lists.ozlabs.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: Linux on PowerPC Developers Mail List List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: Gilles.Muller@lip6.fr, maxime.ripard@bootlin.com, dri-devel@lists.freedesktop.org, linux-ide@vger.kernel.org, linux-sunxi@googlegroups.com, paulus@samba.org, linux-amlogic@lists.infradead.org, cocci@systeme.lip6.fr, narmstrong@baylibre.com, airlied@linux.ie, wens@csie.org, joabreu@synopsys.com, agust@denx.de, alexandre.torgue@st.com, alistair@popple.id.au, nicolas.palix@imag.fr, oss@buserror.net, Julia.Lawall@lip6.fr, linux-mediatek@lists.infradead.org, matthias.bgg@gmail.com, peppe.cavallaro@st.com, linux-arm-kernel@lists.infradead.org, michal.lkml@markovi.net, netdev@vger.kernel.org, linux-kernel@vger.kernel.org, khilman@baylibre.com, carlo@caione.org, tj@kernel.org, linuxppc-dev@lists.ozlabs.org, davem@davemloft.net Errors-To: linuxppc-dev-bounces+linuxppc-dev=archiver.kernel.org@lists.ozlabs.org Sender: "Linuxppc-dev" On Wed, 24 Oct 2018 07:35:48 +0000, Corentin Labbe wrote: > This patch adds setbits_le32/clrbits_le32/clrsetbits_le32 and > setbits_le64/clrbits_le64/clrsetbits_le64 in linux/setbits.h header. > > Signed-off-by: Corentin Labbe Did you have a look at all the functions defined in bitfield.h? (including the magic macro-generated ones?) Perhaps those could be used here? I also share the concerns about the non-atomic RMW. Obviously correct beats short IMHO. > diff --git a/include/linux/setbits.h b/include/linux/setbits.h > new file mode 100644 > index 000000000000..c82faf8d7fe4 > --- /dev/null > +++ b/include/linux/setbits.h > @@ -0,0 +1,84 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef __LINUX_SETBITS_H > +#define __LINUX_SETBITS_H > + > +#include > + > +#define __setbits(rfn, wfn, addr, set) wfn((rfn(addr) | (set)), addr) > +#define __clrbits(rfn, wfn, addr, mask) wfn((rfn(addr) & ~(mask)), addr) > +#define __clrsetbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) & ~(mask)) | (set)), addr) > +#define __setclrbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) | (set)) & ~(mask)), addr) > + > +#ifndef setbits_le32 > +#define setbits_le32(addr, set) __setbits(readl, writel, addr, set) > +#endif > +#ifndef setbits_le32_relaxed > +#define setbits_le32_relaxed(addr, set) __setbits(readl_relaxed, writel_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le32 > +#define clrbits_le32(addr, mask) __clrbits(readl, writel, addr, mask) > +#endif > +#ifndef clrbits_le32_relaxed > +#define clrbits_le32_relaxed(addr, mask) __clrbits(readl_relaxed, writel_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le32 > +#define clrsetbits_le32(addr, mask, set) __clrsetbits(readl, writel, addr, mask, set) > +#endif > +#ifndef clrsetbits_le32_relaxed > +#define clrsetbits_le32_relaxed(addr, mask, set) __clrsetbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le32 > +#define setclrbits_le32(addr, mask, set) __setclrbits(readl, writel, addr, mask, set) > +#endif > +#ifndef setclrbits_le32_relaxed > +#define setclrbits_le32_relaxed(addr, mask, set) __setclrbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +/* We cannot use CONFIG_64BIT as some x86 drivers use non-atomicwriteq() */ > +#if defined(writeq) && defined(readq) > +#ifndef setbits_le64 > +#define setbits_le64(addr, set) __setbits(readq, writeq, addr, set) > +#endif > +#ifndef setbits_le64_relaxed > +#define setbits_le64_relaxed(addr, set) __setbits(readq_relaxed, writeq_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le64 > +#define clrbits_le64(addr, mask) __clrbits(readq, writeq, addr, mask) > +#endif > +#ifndef clrbits_le64_relaxed > +#define clrbits_le64_relaxed(addr, mask) __clrbits(readq_relaxed, writeq_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le64 > +#define clrsetbits_le64(addr, mask, set) __clrsetbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef clrsetbits_le64_relaxed > +#define clrsetbits_le64_relaxed(addr, mask, set) __clrsetbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le64 > +#define setclrbits_le64(addr, mask, set) __setclrbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef setclrbits_le64_relaxed > +#define setclrbits_le64_relaxed(addr, mask, set) __setclrbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#endif /* writeq/readq */ > + > +#endif /* __LINUX_SETBITS_H */ From mboxrd@z Thu Jan 1 00:00:00 1970 From: jakub.kicinski@netronome.com (Jakub Kicinski) Date: Wed, 24 Oct 2018 15:46:13 -0700 Subject: [PATCH v3 2/7] include: add setbits_leXX/clrbits_leXX/clrsetbits_leXX in linux/setbits.h In-Reply-To: <1540366553-18541-3-git-send-email-clabbe@baylibre.com> References: <1540366553-18541-1-git-send-email-clabbe@baylibre.com> <1540366553-18541-3-git-send-email-clabbe@baylibre.com> Message-ID: <20181024154613.3ecc96dc@cakuba.netronome.com> To: linux-arm-kernel@lists.infradead.org List-Id: linux-arm-kernel.lists.infradead.org On Wed, 24 Oct 2018 07:35:48 +0000, Corentin Labbe wrote: > This patch adds setbits_le32/clrbits_le32/clrsetbits_le32 and > setbits_le64/clrbits_le64/clrsetbits_le64 in linux/setbits.h header. > > Signed-off-by: Corentin Labbe Did you have a look at all the functions defined in bitfield.h? (including the magic macro-generated ones?) Perhaps those could be used here? I also share the concerns about the non-atomic RMW. Obviously correct beats short IMHO. > diff --git a/include/linux/setbits.h b/include/linux/setbits.h > new file mode 100644 > index 000000000000..c82faf8d7fe4 > --- /dev/null > +++ b/include/linux/setbits.h > @@ -0,0 +1,84 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef __LINUX_SETBITS_H > +#define __LINUX_SETBITS_H > + > +#include > + > +#define __setbits(rfn, wfn, addr, set) wfn((rfn(addr) | (set)), addr) > +#define __clrbits(rfn, wfn, addr, mask) wfn((rfn(addr) & ~(mask)), addr) > +#define __clrsetbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) & ~(mask)) | (set)), addr) > +#define __setclrbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) | (set)) & ~(mask)), addr) > + > +#ifndef setbits_le32 > +#define setbits_le32(addr, set) __setbits(readl, writel, addr, set) > +#endif > +#ifndef setbits_le32_relaxed > +#define setbits_le32_relaxed(addr, set) __setbits(readl_relaxed, writel_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le32 > +#define clrbits_le32(addr, mask) __clrbits(readl, writel, addr, mask) > +#endif > +#ifndef clrbits_le32_relaxed > +#define clrbits_le32_relaxed(addr, mask) __clrbits(readl_relaxed, writel_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le32 > +#define clrsetbits_le32(addr, mask, set) __clrsetbits(readl, writel, addr, mask, set) > +#endif > +#ifndef clrsetbits_le32_relaxed > +#define clrsetbits_le32_relaxed(addr, mask, set) __clrsetbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le32 > +#define setclrbits_le32(addr, mask, set) __setclrbits(readl, writel, addr, mask, set) > +#endif > +#ifndef setclrbits_le32_relaxed > +#define setclrbits_le32_relaxed(addr, mask, set) __setclrbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +/* We cannot use CONFIG_64BIT as some x86 drivers use non-atomicwriteq() */ > +#if defined(writeq) && defined(readq) > +#ifndef setbits_le64 > +#define setbits_le64(addr, set) __setbits(readq, writeq, addr, set) > +#endif > +#ifndef setbits_le64_relaxed > +#define setbits_le64_relaxed(addr, set) __setbits(readq_relaxed, writeq_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le64 > +#define clrbits_le64(addr, mask) __clrbits(readq, writeq, addr, mask) > +#endif > +#ifndef clrbits_le64_relaxed > +#define clrbits_le64_relaxed(addr, mask) __clrbits(readq_relaxed, writeq_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le64 > +#define clrsetbits_le64(addr, mask, set) __clrsetbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef clrsetbits_le64_relaxed > +#define clrsetbits_le64_relaxed(addr, mask, set) __clrsetbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le64 > +#define setclrbits_le64(addr, mask, set) __setclrbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef setclrbits_le64_relaxed > +#define setclrbits_le64_relaxed(addr, mask, set) __setclrbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#endif /* writeq/readq */ > + > +#endif /* __LINUX_SETBITS_H */ From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-6.8 required=3.0 tests=DKIMWL_WL_MED,DKIM_SIGNED, DKIM_VALID,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH,MAILING_LIST_MULTI, SIGNED_OFF_BY,SPF_PASS,URIBL_BLOCKED autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id 79551ECDE44 for ; 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Wed, 24 Oct 2018 15:46:20 -0700 (PDT) Received: from cakuba.netronome.com ([66.60.152.14]) by smtp.gmail.com with ESMTPSA id i11-v6sm5688061qtc.96.2018.10.24.15.46.17 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 24 Oct 2018 15:46:20 -0700 (PDT) Date: Wed, 24 Oct 2018 15:46:13 -0700 From: Jakub Kicinski To: Corentin Labbe Cc: Gilles.Muller@lip6.fr, Julia.Lawall@lip6.fr, agust@denx.de, airlied@linux.ie, alexandre.torgue@st.com, alistair@popple.id.au, benh@kernel.crashing.org, carlo@caione.org, davem@davemloft.net, galak@kernel.crashing.org, joabreu@synopsys.com, khilman@baylibre.com, matthias.bgg@gmail.com, maxime.ripard@bootlin.com, michal.lkml@markovi.net, mpe@ellerman.id.au, mporter@kernel.crashing.org, narmstrong@baylibre.com, nicolas.palix@imag.fr, oss@buserror.net, paulus@samba.org, peppe.cavallaro@st.com, tj@kernel.org, vitb@kernel.crashing.org, wens@csie.org, cocci@systeme.lip6.fr, dri-devel@lists.freedesktop.org, linux-amlogic@lists.infradead.org, linux-arm-kernel@lists.infradead.org, linux-ide@vger.kernel.org, linux-kernel@vger.kernel.org, linux-mediatek@lists.infradead.org, linuxppc-dev@lists.ozlabs.org, netdev@vger.kernel.org, linux-sunxi@googlegroups.com Subject: Re: [PATCH v3 2/7] include: add setbits_leXX/clrbits_leXX/clrsetbits_leXX in linux/setbits.h Message-ID: <20181024154613.3ecc96dc@cakuba.netronome.com> In-Reply-To: <1540366553-18541-3-git-send-email-clabbe@baylibre.com> References: <1540366553-18541-1-git-send-email-clabbe@baylibre.com> <1540366553-18541-3-git-send-email-clabbe@baylibre.com> Organization: Netronome Systems, Ltd. MIME-Version: 1.0 Content-Type: text/plain; charset=US-ASCII Content-Transfer-Encoding: 7bit Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Wed, 24 Oct 2018 07:35:48 +0000, Corentin Labbe wrote: > This patch adds setbits_le32/clrbits_le32/clrsetbits_le32 and > setbits_le64/clrbits_le64/clrsetbits_le64 in linux/setbits.h header. > > Signed-off-by: Corentin Labbe Did you have a look at all the functions defined in bitfield.h? (including the magic macro-generated ones?) Perhaps those could be used here? I also share the concerns about the non-atomic RMW. Obviously correct beats short IMHO. > diff --git a/include/linux/setbits.h b/include/linux/setbits.h > new file mode 100644 > index 000000000000..c82faf8d7fe4 > --- /dev/null > +++ b/include/linux/setbits.h > @@ -0,0 +1,84 @@ > +/* SPDX-License-Identifier: GPL-2.0 */ > +#ifndef __LINUX_SETBITS_H > +#define __LINUX_SETBITS_H > + > +#include > + > +#define __setbits(rfn, wfn, addr, set) wfn((rfn(addr) | (set)), addr) > +#define __clrbits(rfn, wfn, addr, mask) wfn((rfn(addr) & ~(mask)), addr) > +#define __clrsetbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) & ~(mask)) | (set)), addr) > +#define __setclrbits(rfn, wfn, addr, mask, set) wfn(((rfn(addr) | (set)) & ~(mask)), addr) > + > +#ifndef setbits_le32 > +#define setbits_le32(addr, set) __setbits(readl, writel, addr, set) > +#endif > +#ifndef setbits_le32_relaxed > +#define setbits_le32_relaxed(addr, set) __setbits(readl_relaxed, writel_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le32 > +#define clrbits_le32(addr, mask) __clrbits(readl, writel, addr, mask) > +#endif > +#ifndef clrbits_le32_relaxed > +#define clrbits_le32_relaxed(addr, mask) __clrbits(readl_relaxed, writel_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le32 > +#define clrsetbits_le32(addr, mask, set) __clrsetbits(readl, writel, addr, mask, set) > +#endif > +#ifndef clrsetbits_le32_relaxed > +#define clrsetbits_le32_relaxed(addr, mask, set) __clrsetbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le32 > +#define setclrbits_le32(addr, mask, set) __setclrbits(readl, writel, addr, mask, set) > +#endif > +#ifndef setclrbits_le32_relaxed > +#define setclrbits_le32_relaxed(addr, mask, set) __setclrbits(readl_relaxed, \ > + writel_relaxed, \ > + addr, mask, set) > +#endif > + > +/* We cannot use CONFIG_64BIT as some x86 drivers use non-atomicwriteq() */ > +#if defined(writeq) && defined(readq) > +#ifndef setbits_le64 > +#define setbits_le64(addr, set) __setbits(readq, writeq, addr, set) > +#endif > +#ifndef setbits_le64_relaxed > +#define setbits_le64_relaxed(addr, set) __setbits(readq_relaxed, writeq_relaxed, \ > + addr, set) > +#endif > + > +#ifndef clrbits_le64 > +#define clrbits_le64(addr, mask) __clrbits(readq, writeq, addr, mask) > +#endif > +#ifndef clrbits_le64_relaxed > +#define clrbits_le64_relaxed(addr, mask) __clrbits(readq_relaxed, writeq_relaxed, \ > + addr, mask) > +#endif > + > +#ifndef clrsetbits_le64 > +#define clrsetbits_le64(addr, mask, set) __clrsetbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef clrsetbits_le64_relaxed > +#define clrsetbits_le64_relaxed(addr, mask, set) __clrsetbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#ifndef setclrbits_le64 > +#define setclrbits_le64(addr, mask, set) __setclrbits(readq, writeq, addr, mask, set) > +#endif > +#ifndef setclrbits_le64_relaxed > +#define setclrbits_le64_relaxed(addr, mask, set) __setclrbits(readq_relaxed, \ > + writeq_relaxed, \ > + addr, mask, set) > +#endif > + > +#endif /* writeq/readq */ > + > +#endif /* __LINUX_SETBITS_H */