* [Qemu-devel] [PATCH V4 0/5]
@ 2018-10-25 19:23 ` Peng Hao
0 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: qemu-devel, qemu-arm, Peng Hao
The first patches are simple cleanups:
- patch 1 move the pvpanic device with the 'ocmmon objects' so we compile
it once for the x86/arm/aarch64 archs,
- patch 2 simply renames ISA fields/definitions to generic ones.
Then instead of add/use the MMIO pvpanic device in the virt machine in an
unique patch, I split it in two distinct patches:
- patch 3 uses Peng Hao's work, but add the MMIO interface to the existing
device (no logical change).
- patch 4 is Peng Hao's work in the virt machine (no logical change).
- patch 5 add pvpanic device in acpi table in virt machine
v2 from Peng Hao is:
https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03433.html
v3 --> v4
patch 1,2 no modification.
patch 3, add TYPE_PANIC_MMIO for distinguishing different bus device,
virt + isa_pvpanic will abnormally terminate virtual machine.
patch 4, "pvpanic,mmio" --> "qemu,pvpanic-mmio".
patch 5, newly added.
Philippe Mathieu-Daudé (2):
hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
hw/misc/pvpanic: Cosmetic renaming
Peng Hao (3):
hw/misc/pvpanic: Add the MMIO interface
hw/arm/virt: Use the pvpanic device
hw/arm/virt: add pvpanic device in virt acpi table
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/virt-acpi-build.c | 16 ++++++++
hw/arm/virt.c | 21 ++++++++++
hw/misc/Makefile.objs | 2 +-
hw/misc/pvpanic.c | 78 ++++++++++++++++++++++++++++++-------
include/hw/arm/virt.h | 1 +
include/hw/misc/pvpanic.h | 2 +
7 files changed, 105 insertions(+), 16 deletions(-)
--
1.8.3.1
^ permalink raw reply [flat|nested] 24+ messages in thread* [Qemu-arm] [PATCH V4 1/5] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
2018-10-25 19:23 ` [Qemu-devel] " Peng Hao
@ 2018-10-25 19:23 ` Peng Hao
-1 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: qemu-arm, qemu-devel
From: Philippe Mathieu-Daudé <philmd@redhat.com>
The 'pvpanic' ISA device can be use by any machine with an ISA bus.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/misc/Makefile.objs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 6d50b03..24997d6 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o
common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o
common-obj-$(CONFIG_EDU) += edu.o
common-obj-$(CONFIG_PCA9552) += pca9552.o
+common-obj-$(CONFIG_PVPANIC) += pvpanic.o
common-obj-y += unimp.o
common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o
@@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o
obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o
obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o
-obj-$(CONFIG_PVPANIC) += pvpanic.o
obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o
obj-$(CONFIG_AUX) += auxbus.o
obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [Qemu-devel] [PATCH V4 1/5] hw/misc/pvpanic: Build the pvpanic device in $(common-obj)
@ 2018-10-25 19:23 ` Peng Hao
0 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: qemu-devel, qemu-arm
From: Philippe Mathieu-Daudé <philmd@redhat.com>
The 'pvpanic' ISA device can be use by any machine with an ISA bus.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/misc/Makefile.objs | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/hw/misc/Makefile.objs b/hw/misc/Makefile.objs
index 6d50b03..24997d6 100644
--- a/hw/misc/Makefile.objs
+++ b/hw/misc/Makefile.objs
@@ -8,6 +8,7 @@ common-obj-$(CONFIG_ISA_TESTDEV) += pc-testdev.o
common-obj-$(CONFIG_PCI_TESTDEV) += pci-testdev.o
common-obj-$(CONFIG_EDU) += edu.o
common-obj-$(CONFIG_PCA9552) += pca9552.o
+common-obj-$(CONFIG_PVPANIC) += pvpanic.o
common-obj-y += unimp.o
common-obj-$(CONFIG_FW_CFG_DMA) += vmcoreinfo.o
@@ -70,7 +71,6 @@ obj-$(CONFIG_IOTKIT_SECCTL) += iotkit-secctl.o
obj-$(CONFIG_IOTKIT_SYSCTL) += iotkit-sysctl.o
obj-$(CONFIG_IOTKIT_SYSINFO) += iotkit-sysinfo.o
-obj-$(CONFIG_PVPANIC) += pvpanic.o
obj-$(CONFIG_HYPERV_TESTDEV) += hyperv_testdev.o
obj-$(CONFIG_AUX) += auxbus.o
obj-$(CONFIG_ASPEED_SOC) += aspeed_scu.o aspeed_sdmc.o
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [Qemu-arm] [PATCH V4 2/5] hw/misc/pvpanic: Cosmetic renaming
2018-10-25 19:23 ` [Qemu-devel] " Peng Hao
@ 2018-10-25 19:23 ` Peng Hao
-1 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: qemu-arm, qemu-devel
From: Philippe Mathieu-Daudé <philmd@redhat.com>
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC (this just returns a generic Object),
- ISADevice parent_obj -> isadev,
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/misc/pvpanic.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..dd3aef2 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,7 +25,7 @@
/* The pv event value */
#define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj) \
+#define PVPANIC(obj) \
OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
@@ -46,9 +46,11 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
typedef struct PVPanicState {
- ISADevice parent_obj;
+ /* private */
+ ISADevice isadev;
- MemoryRegion io;
+ /* public */
+ MemoryRegion mr;
uint16_t ioport;
} PVPanicState;
@@ -75,15 +77,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
- PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+ PVPanicState *s = PVPANIC(obj);
- memory_region_init_io(&s->io, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
+ memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
- PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+ PVPanicState *s = PVPANIC(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,7 +98,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
- isa_register_ioport(d, &s->io, s->ioport);
+ isa_register_ioport(d, &s->mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH V4 2/5] hw/misc/pvpanic: Cosmetic renaming
@ 2018-10-25 19:23 ` Peng Hao
0 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: qemu-devel, qemu-arm
From: Philippe Mathieu-Daudé <philmd@redhat.com>
To ease the MMIO device addition in the next patch, rename:
- ISA_PVPANIC_DEVICE -> PVPANIC (this just returns a generic Object),
- ISADevice parent_obj -> isadev,
- MemoryRegion io -> mr.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/misc/pvpanic.c | 16 +++++++++-------
1 file changed, 9 insertions(+), 7 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index 9d8961b..dd3aef2 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -25,7 +25,7 @@
/* The pv event value */
#define PVPANIC_PANICKED (1 << PVPANIC_F_PANICKED)
-#define ISA_PVPANIC_DEVICE(obj) \
+#define PVPANIC(obj) \
OBJECT_CHECK(PVPanicState, (obj), TYPE_PVPANIC)
static void handle_event(int event)
@@ -46,9 +46,11 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
typedef struct PVPanicState {
- ISADevice parent_obj;
+ /* private */
+ ISADevice isadev;
- MemoryRegion io;
+ /* public */
+ MemoryRegion mr;
uint16_t ioport;
} PVPanicState;
@@ -75,15 +77,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
- PVPanicState *s = ISA_PVPANIC_DEVICE(obj);
+ PVPanicState *s = PVPANIC(obj);
- memory_region_init_io(&s->io, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
+ memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
- PVPanicState *s = ISA_PVPANIC_DEVICE(dev);
+ PVPanicState *s = PVPANIC(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -96,7 +98,7 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
- isa_register_ioport(d, &s->io, s->ioport);
+ isa_register_ioport(d, &s->mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread
* [Qemu-arm] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
2018-10-25 19:23 ` [Qemu-devel] " Peng Hao
@ 2018-10-25 19:23 ` Peng Hao
-1 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: Peng Hao, qemu-arm, qemu-devel
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/misc/pvpanic.c | 74 ++++++++++++++++++++++++++++++++++++++---------
include/hw/misc/pvpanic.h | 2 ++
2 files changed, 62 insertions(+), 14 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index dd3aef2..b575e01 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang <wency@cn.fujitsu.com>
* Hu Tao <hutao@cn.fujitsu.com>
+ * Peng Hao <peng.hao2@zte.com.cn>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -45,30 +47,48 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
+typedef struct PVPanicCommonState {
+ MemoryRegion mr;
+} PVPanicCommonState;
+
+typedef struct PVPanicISAState {
/* private */
ISADevice isadev;
+ uint16_t ioport;
+ /* public */
+ PVPanicCommonState common;
+} PVPanicISAState;
+
+typedef struct PVPanicMMIOState {
+ /* private */
+ SysBusDevice busdev;
/* public */
- MemoryRegion mr;
- uint16_t ioport;
-} PVPanicState;
+ PVPanicCommonState common;
+} PVPanicMMIOState;
+
+#define PVPANIC_ISA(obj) \
+ OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+
+#define PVPANIC_MMIO(obj) \
+ OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
+
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
- .read = pvpanic_ioport_read,
- .write = pvpanic_ioport_write,
+ .read = pvpanic_read,
+ .write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -77,15 +97,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
- PVPanicState *s = PVPANIC(obj);
+ PVPanicISAState *s = PVPANIC_ISA(obj);
- memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
+ memory_region_init_io(&s->common.mr, OBJECT(s), &pvpanic_ops, s, TYPE_PVPANIC, 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
- PVPanicState *s = PVPANIC(dev);
+ PVPanicISAState *s = PVPANIC_ISA(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -98,11 +118,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
- isa_register_ioport(d, &s->mr, s->ioport);
+ isa_register_ioport(d, &s->common.mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
- DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+ DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -118,14 +138,40 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void *data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent = TYPE_ISA_DEVICE,
- .instance_size = sizeof(PVPanicState),
+ .instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init = pvpanic_isa_class_init,
};
+static void pvpanic_mmio_initfn(Object *obj)
+{
+ PVPanicMMIOState *s = PVPANIC_MMIO(obj);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+ memory_region_init_io(&s->common.mr, OBJECT(s), &pvpanic_ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+ sysbus_init_mmio(sbd, &s->common.mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+ .name = TYPE_PVPANIC_MMIO,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(PVPanicMMIOState),
+ .instance_init = pvpanic_mmio_initfn,
+ .class_init = pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(&pvpanic_isa_info);
+ type_register_static(&pvpanic_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..c0d2d38 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -16,6 +16,8 @@
#define TYPE_PVPANIC "pvpanic"
+#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
+
#define PVPANIC_IOPORT_PROP "ioport"
static inline uint16_t pvpanic_port(void)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
@ 2018-10-25 19:23 ` Peng Hao
0 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: qemu-devel, qemu-arm, Peng Hao
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
hw/misc/pvpanic.c | 74 ++++++++++++++++++++++++++++++++++++++---------
include/hw/misc/pvpanic.h | 2 ++
2 files changed, 62 insertions(+), 14 deletions(-)
diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
index dd3aef2..b575e01 100644
--- a/hw/misc/pvpanic.c
+++ b/hw/misc/pvpanic.c
@@ -2,10 +2,12 @@
* QEMU simulated pvpanic device.
*
* Copyright Fujitsu, Corp. 2013
+ * Copyright (c) 2018 ZTE Ltd.
*
* Authors:
* Wen Congyang <wency@cn.fujitsu.com>
* Hu Tao <hutao@cn.fujitsu.com>
+ * Peng Hao <peng.hao2@zte.com.cn>
*
* This work is licensed under the terms of the GNU GPL, version 2 or later.
* See the COPYING file in the top-level directory.
@@ -45,30 +47,48 @@ static void handle_event(int event)
#include "hw/isa/isa.h"
-typedef struct PVPanicState {
+typedef struct PVPanicCommonState {
+ MemoryRegion mr;
+} PVPanicCommonState;
+
+typedef struct PVPanicISAState {
/* private */
ISADevice isadev;
+ uint16_t ioport;
+ /* public */
+ PVPanicCommonState common;
+} PVPanicISAState;
+
+typedef struct PVPanicMMIOState {
+ /* private */
+ SysBusDevice busdev;
/* public */
- MemoryRegion mr;
- uint16_t ioport;
-} PVPanicState;
+ PVPanicCommonState common;
+} PVPanicMMIOState;
+
+#define PVPANIC_ISA(obj) \
+ OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
+
+#define PVPANIC_MMIO(obj) \
+ OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
+
/* return supported events on read */
-static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
+static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
{
return PVPANIC_PANICKED;
}
-static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
+static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
unsigned size)
{
handle_event(val);
}
static const MemoryRegionOps pvpanic_ops = {
- .read = pvpanic_ioport_read,
- .write = pvpanic_ioport_write,
+ .read = pvpanic_read,
+ .write = pvpanic_write,
.impl = {
.min_access_size = 1,
.max_access_size = 1,
@@ -77,15 +97,15 @@ static const MemoryRegionOps pvpanic_ops = {
static void pvpanic_isa_initfn(Object *obj)
{
- PVPanicState *s = PVPANIC(obj);
+ PVPanicISAState *s = PVPANIC_ISA(obj);
- memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
+ memory_region_init_io(&s->common.mr, OBJECT(s), &pvpanic_ops, s, TYPE_PVPANIC, 1);
}
static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
{
ISADevice *d = ISA_DEVICE(dev);
- PVPanicState *s = PVPANIC(dev);
+ PVPanicISAState *s = PVPANIC_ISA(dev);
FWCfgState *fw_cfg = fw_cfg_find();
uint16_t *pvpanic_port;
@@ -98,11 +118,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
sizeof(*pvpanic_port));
- isa_register_ioport(d, &s->mr, s->ioport);
+ isa_register_ioport(d, &s->common.mr, s->ioport);
}
static Property pvpanic_isa_properties[] = {
- DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
+ DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
DEFINE_PROP_END_OF_LIST(),
};
@@ -118,14 +138,40 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void *data)
static TypeInfo pvpanic_isa_info = {
.name = TYPE_PVPANIC,
.parent = TYPE_ISA_DEVICE,
- .instance_size = sizeof(PVPanicState),
+ .instance_size = sizeof(PVPanicISAState),
.instance_init = pvpanic_isa_initfn,
.class_init = pvpanic_isa_class_init,
};
+static void pvpanic_mmio_initfn(Object *obj)
+{
+ PVPanicMMIOState *s = PVPANIC_MMIO(obj);
+ SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
+
+ memory_region_init_io(&s->common.mr, OBJECT(s), &pvpanic_ops, s,
+ TYPE_PVPANIC_MMIO, 2);
+ sysbus_init_mmio(sbd, &s->common.mr);
+}
+
+static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
+{
+ DeviceClass *dc = DEVICE_CLASS(klass);
+
+ set_bit(DEVICE_CATEGORY_MISC, dc->categories);
+}
+
+static TypeInfo pvpanic_mmio_info = {
+ .name = TYPE_PVPANIC_MMIO,
+ .parent = TYPE_SYS_BUS_DEVICE,
+ .instance_size = sizeof(PVPanicMMIOState),
+ .instance_init = pvpanic_mmio_initfn,
+ .class_init = pvpanic_mmio_class_init,
+};
+
static void pvpanic_register_types(void)
{
type_register_static(&pvpanic_isa_info);
+ type_register_static(&pvpanic_mmio_info);
}
type_init(pvpanic_register_types)
diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
index 1ee071a..c0d2d38 100644
--- a/include/hw/misc/pvpanic.h
+++ b/include/hw/misc/pvpanic.h
@@ -16,6 +16,8 @@
#define TYPE_PVPANIC "pvpanic"
+#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
+
#define PVPANIC_IOPORT_PROP "ioport"
static inline uint16_t pvpanic_port(void)
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
2018-10-25 19:23 ` [Qemu-devel] " Peng Hao
@ 2018-10-25 11:38 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 24+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-10-25 11:38 UTC (permalink / raw)
To: Peng Hao, peter.maydell; +Cc: qemu-arm, qemu-devel
On 25/10/18 21:23, Peng Hao wrote:
> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> hw/misc/pvpanic.c | 74 ++++++++++++++++++++++++++++++++++++++---------
> include/hw/misc/pvpanic.h | 2 ++
> 2 files changed, 62 insertions(+), 14 deletions(-)
>
> diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
> index dd3aef2..b575e01 100644
> --- a/hw/misc/pvpanic.c
> +++ b/hw/misc/pvpanic.c
> @@ -2,10 +2,12 @@
> * QEMU simulated pvpanic device.
> *
> * Copyright Fujitsu, Corp. 2013
> + * Copyright (c) 2018 ZTE Ltd.
> *
> * Authors:
> * Wen Congyang <wency@cn.fujitsu.com>
> * Hu Tao <hutao@cn.fujitsu.com>
> + * Peng Hao <peng.hao2@zte.com.cn>
> *
> * This work is licensed under the terms of the GNU GPL, version 2 or later.
> * See the COPYING file in the top-level directory.
> @@ -45,30 +47,48 @@ static void handle_event(int event)
>
> #include "hw/isa/isa.h"
>
> -typedef struct PVPanicState {
> +typedef struct PVPanicCommonState {
> + MemoryRegion mr;
> +} PVPanicCommonState;
Maybe we can drop this type now.
> +
> +typedef struct PVPanicISAState {
> /* private */
> ISADevice isadev;
Here goes this comment:
/* public */
> + uint16_t ioport;
> + /* public */
> + PVPanicCommonState common;
> +} PVPanicISAState;
> +
> +typedef struct PVPanicMMIOState {
> + /* private */
> + SysBusDevice busdev;
>
> /* public */
> - MemoryRegion mr;
> - uint16_t ioport;
> -} PVPanicState;
> + PVPanicCommonState common;
> +} PVPanicMMIOState;
> +
> +#define PVPANIC_ISA(obj) \
> + OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
> +
> +#define PVPANIC_MMIO(obj) \
> + OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
> +
>
> /* return supported events on read */
> -static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
> +static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
> {
> return PVPANIC_PANICKED;
> }
>
> -static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
> +static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
> unsigned size)
> {
> handle_event(val);
> }
>
> static const MemoryRegionOps pvpanic_ops = {
> - .read = pvpanic_ioport_read,
> - .write = pvpanic_ioport_write,
> + .read = pvpanic_read,
> + .write = pvpanic_write,
> .impl = {
> .min_access_size = 1,
> .max_access_size = 1,
> @@ -77,15 +97,15 @@ static const MemoryRegionOps pvpanic_ops = {
>
> static void pvpanic_isa_initfn(Object *obj)
> {
> - PVPanicState *s = PVPANIC(obj);
> + PVPanicISAState *s = PVPANIC_ISA(obj);
>
> - memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
> + memory_region_init_io(&s->common.mr, OBJECT(s), &pvpanic_ops, s, TYPE_PVPANIC, 1);
> }
>
> static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
> {
> ISADevice *d = ISA_DEVICE(dev);
> - PVPanicState *s = PVPANIC(dev);
> + PVPanicISAState *s = PVPANIC_ISA(dev);
> FWCfgState *fw_cfg = fw_cfg_find();
> uint16_t *pvpanic_port;
>
> @@ -98,11 +118,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
> fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
> sizeof(*pvpanic_port));
>
> - isa_register_ioport(d, &s->mr, s->ioport);
> + isa_register_ioport(d, &s->common.mr, s->ioport);
> }
>
> static Property pvpanic_isa_properties[] = {
> - DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
> + DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> @@ -118,14 +138,40 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void *data)
> static TypeInfo pvpanic_isa_info = {
> .name = TYPE_PVPANIC,
> .parent = TYPE_ISA_DEVICE,
> - .instance_size = sizeof(PVPanicState),
> + .instance_size = sizeof(PVPanicISAState),
> .instance_init = pvpanic_isa_initfn,
> .class_init = pvpanic_isa_class_init,
> };
>
> +static void pvpanic_mmio_initfn(Object *obj)
> +{
> + PVPanicMMIOState *s = PVPANIC_MMIO(obj);
> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> +
> + memory_region_init_io(&s->common.mr, OBJECT(s), &pvpanic_ops, s,
> + TYPE_PVPANIC_MMIO, 2);
> + sysbus_init_mmio(sbd, &s->common.mr);
> +}
> +
> +static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> +
> + set_bit(DEVICE_CATEGORY_MISC, dc->categories);
> +}
> +
> +static TypeInfo pvpanic_mmio_info = {
> + .name = TYPE_PVPANIC_MMIO,
> + .parent = TYPE_SYS_BUS_DEVICE,
> + .instance_size = sizeof(PVPanicMMIOState),
> + .instance_init = pvpanic_mmio_initfn,
> + .class_init = pvpanic_mmio_class_init,
> +};
> +
> static void pvpanic_register_types(void)
> {
> type_register_static(&pvpanic_isa_info);
> + type_register_static(&pvpanic_mmio_info);
> }
>
> type_init(pvpanic_register_types)
> diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
> index 1ee071a..c0d2d38 100644
> --- a/include/hw/misc/pvpanic.h
> +++ b/include/hw/misc/pvpanic.h
> @@ -16,6 +16,8 @@
>
> #define TYPE_PVPANIC "pvpanic"
>
> +#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
> +
> #define PVPANIC_IOPORT_PROP "ioport"
>
> static inline uint16_t pvpanic_port(void)
>
Depending of the response to Peter's question [*]:
I'd also like some confirmation from folks more familiar with the
current state of the art in guest-to-management-layer communication
that pvpanic is still the recommended way to achieve this goal,
and hasn't been obsoleted by something else.
I might work a bit on this patch next week.
[*] https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03861.html
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
@ 2018-10-25 11:38 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 24+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-10-25 11:38 UTC (permalink / raw)
To: Peng Hao, peter.maydell; +Cc: qemu-devel, qemu-arm
On 25/10/18 21:23, Peng Hao wrote:
> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> hw/misc/pvpanic.c | 74 ++++++++++++++++++++++++++++++++++++++---------
> include/hw/misc/pvpanic.h | 2 ++
> 2 files changed, 62 insertions(+), 14 deletions(-)
>
> diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
> index dd3aef2..b575e01 100644
> --- a/hw/misc/pvpanic.c
> +++ b/hw/misc/pvpanic.c
> @@ -2,10 +2,12 @@
> * QEMU simulated pvpanic device.
> *
> * Copyright Fujitsu, Corp. 2013
> + * Copyright (c) 2018 ZTE Ltd.
> *
> * Authors:
> * Wen Congyang <wency@cn.fujitsu.com>
> * Hu Tao <hutao@cn.fujitsu.com>
> + * Peng Hao <peng.hao2@zte.com.cn>
> *
> * This work is licensed under the terms of the GNU GPL, version 2 or later.
> * See the COPYING file in the top-level directory.
> @@ -45,30 +47,48 @@ static void handle_event(int event)
>
> #include "hw/isa/isa.h"
>
> -typedef struct PVPanicState {
> +typedef struct PVPanicCommonState {
> + MemoryRegion mr;
> +} PVPanicCommonState;
Maybe we can drop this type now.
> +
> +typedef struct PVPanicISAState {
> /* private */
> ISADevice isadev;
Here goes this comment:
/* public */
> + uint16_t ioport;
> + /* public */
> + PVPanicCommonState common;
> +} PVPanicISAState;
> +
> +typedef struct PVPanicMMIOState {
> + /* private */
> + SysBusDevice busdev;
>
> /* public */
> - MemoryRegion mr;
> - uint16_t ioport;
> -} PVPanicState;
> + PVPanicCommonState common;
> +} PVPanicMMIOState;
> +
> +#define PVPANIC_ISA(obj) \
> + OBJECT_CHECK(PVPanicISAState, (obj), TYPE_PVPANIC)
> +
> +#define PVPANIC_MMIO(obj) \
> + OBJECT_CHECK(PVPanicMMIOState, (obj), TYPE_PVPANIC_MMIO)
> +
>
> /* return supported events on read */
> -static uint64_t pvpanic_ioport_read(void *opaque, hwaddr addr, unsigned size)
> +static uint64_t pvpanic_read(void *opaque, hwaddr addr, unsigned size)
> {
> return PVPANIC_PANICKED;
> }
>
> -static void pvpanic_ioport_write(void *opaque, hwaddr addr, uint64_t val,
> +static void pvpanic_write(void *opaque, hwaddr addr, uint64_t val,
> unsigned size)
> {
> handle_event(val);
> }
>
> static const MemoryRegionOps pvpanic_ops = {
> - .read = pvpanic_ioport_read,
> - .write = pvpanic_ioport_write,
> + .read = pvpanic_read,
> + .write = pvpanic_write,
> .impl = {
> .min_access_size = 1,
> .max_access_size = 1,
> @@ -77,15 +97,15 @@ static const MemoryRegionOps pvpanic_ops = {
>
> static void pvpanic_isa_initfn(Object *obj)
> {
> - PVPanicState *s = PVPANIC(obj);
> + PVPanicISAState *s = PVPANIC_ISA(obj);
>
> - memory_region_init_io(&s->mr, OBJECT(s), &pvpanic_ops, s, "pvpanic", 1);
> + memory_region_init_io(&s->common.mr, OBJECT(s), &pvpanic_ops, s, TYPE_PVPANIC, 1);
> }
>
> static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
> {
> ISADevice *d = ISA_DEVICE(dev);
> - PVPanicState *s = PVPANIC(dev);
> + PVPanicISAState *s = PVPANIC_ISA(dev);
> FWCfgState *fw_cfg = fw_cfg_find();
> uint16_t *pvpanic_port;
>
> @@ -98,11 +118,11 @@ static void pvpanic_isa_realizefn(DeviceState *dev, Error **errp)
> fw_cfg_add_file(fw_cfg, "etc/pvpanic-port", pvpanic_port,
> sizeof(*pvpanic_port));
>
> - isa_register_ioport(d, &s->mr, s->ioport);
> + isa_register_ioport(d, &s->common.mr, s->ioport);
> }
>
> static Property pvpanic_isa_properties[] = {
> - DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicState, ioport, 0x505),
> + DEFINE_PROP_UINT16(PVPANIC_IOPORT_PROP, PVPanicISAState, ioport, 0x505),
> DEFINE_PROP_END_OF_LIST(),
> };
>
> @@ -118,14 +138,40 @@ static void pvpanic_isa_class_init(ObjectClass *klass, void *data)
> static TypeInfo pvpanic_isa_info = {
> .name = TYPE_PVPANIC,
> .parent = TYPE_ISA_DEVICE,
> - .instance_size = sizeof(PVPanicState),
> + .instance_size = sizeof(PVPanicISAState),
> .instance_init = pvpanic_isa_initfn,
> .class_init = pvpanic_isa_class_init,
> };
>
> +static void pvpanic_mmio_initfn(Object *obj)
> +{
> + PVPanicMMIOState *s = PVPANIC_MMIO(obj);
> + SysBusDevice *sbd = SYS_BUS_DEVICE(obj);
> +
> + memory_region_init_io(&s->common.mr, OBJECT(s), &pvpanic_ops, s,
> + TYPE_PVPANIC_MMIO, 2);
> + sysbus_init_mmio(sbd, &s->common.mr);
> +}
> +
> +static void pvpanic_mmio_class_init(ObjectClass *klass, void *data)
> +{
> + DeviceClass *dc = DEVICE_CLASS(klass);
> +
> + set_bit(DEVICE_CATEGORY_MISC, dc->categories);
> +}
> +
> +static TypeInfo pvpanic_mmio_info = {
> + .name = TYPE_PVPANIC_MMIO,
> + .parent = TYPE_SYS_BUS_DEVICE,
> + .instance_size = sizeof(PVPanicMMIOState),
> + .instance_init = pvpanic_mmio_initfn,
> + .class_init = pvpanic_mmio_class_init,
> +};
> +
> static void pvpanic_register_types(void)
> {
> type_register_static(&pvpanic_isa_info);
> + type_register_static(&pvpanic_mmio_info);
> }
>
> type_init(pvpanic_register_types)
> diff --git a/include/hw/misc/pvpanic.h b/include/hw/misc/pvpanic.h
> index 1ee071a..c0d2d38 100644
> --- a/include/hw/misc/pvpanic.h
> +++ b/include/hw/misc/pvpanic.h
> @@ -16,6 +16,8 @@
>
> #define TYPE_PVPANIC "pvpanic"
>
> +#define TYPE_PVPANIC_MMIO "pvpanic-mmio"
> +
> #define PVPANIC_IOPORT_PROP "ioport"
>
> static inline uint16_t pvpanic_port(void)
>
Depending of the response to Peter's question [*]:
I'd also like some confirmation from folks more familiar with the
current state of the art in guest-to-management-layer communication
that pvpanic is still the recommended way to achieve this goal,
and hasn't been obsoleted by something else.
I might work a bit on this patch next week.
[*] https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03861.html
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [Qemu-arm] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
2018-10-25 11:38 ` Philippe Mathieu-Daudé
@ 2018-10-25 11:48 ` peng.hao2
-1 siblings, 0 replies; 24+ messages in thread
From: peng.hao2 @ 2018-10-25 11:48 UTC (permalink / raw)
To: philmd; +Cc: peter.maydell, qemu-arm, qemu-devel
[-- Attachment #1.1: Type: text/plain, Size: 2159 bytes --]
>> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>> ---
>> hw/misc/pvpanic.c | 74 ++++++++++++++++++++++++++++++++++++++---------
>> include/hw/misc/pvpanic.h | 2 ++
>> 2 files changed, 62 insertions(+), 14 deletions(-)
>>
>> diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
>> index dd3aef2..b575e01 100644
>> --- a/hw/misc/pvpanic.c
>> +++ b/hw/misc/pvpanic.c
>> @@ -2,10 +2,12 @@
>> * QEMU simulated pvpanic device.
>> *
>> * Copyright Fujitsu, Corp. 2013
>> + * Copyright (c) 2018 ZTE Ltd.
>> *
>> * Authors:
>> * Wen Congyang <wency@cn.fujitsu.com>
>> * Hu Tao <hutao@cn.fujitsu.com>
>> + * Peng Hao <peng.hao2@zte.com.cn>
>> *
>> * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> * See the COPYING file in the top-level directory.
>> @@ -45,30 +47,48 @@ static void handle_event(int event)
>>
>> #include "hw/isa/isa.h"
>>
>> -typedef struct PVPanicState {
>> +typedef struct PVPanicCommonState {
>> + MemoryRegion mr;
>> +} PVPanicCommonState;
>
>Maybe we can drop this type now.
>
yeah, just keeping PVPanicISAState and PVPanicMMIOState is fine.
>> +
>> +typedef struct PVPanicISAState {
>> /* private */
>> ISADevice isadev;
>
>Here goes this comment:
>
>/* public */
>
>> + uint16_t ioport;
>> + /* public */
>> + PVPanicCommonState common;
>> +} PVPanicISAState;
>> +
>> +typedef struct PVPanicMMIOState {
>> + /* private */
>> + SysBusDevice busdev;
>>
[...]
>>
>
>Depending of the response to Peter's question [*]:
>
>I'd also like some confirmation from folks more familiar with the
>current state of the art in guest-to-management-layer communication
>that pvpanic is still the recommended way to achieve this goal,
>and hasn't been obsoleted by something else.
>
Because this pvpanic device is used when GUEST OS panics. At this point, communication with QEMU can not rely on any driver,
and only the simplest IO or MMIO can be used.
>I might work a bit on this patch next week.
>
>[*] https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03861.html
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
@ 2018-10-25 11:48 ` peng.hao2
0 siblings, 0 replies; 24+ messages in thread
From: peng.hao2 @ 2018-10-25 11:48 UTC (permalink / raw)
To: philmd; +Cc: peter.maydell, qemu-devel, qemu-arm
>> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
>> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
>> ---
>> hw/misc/pvpanic.c | 74 ++++++++++++++++++++++++++++++++++++++---------
>> include/hw/misc/pvpanic.h | 2 ++
>> 2 files changed, 62 insertions(+), 14 deletions(-)
>>
>> diff --git a/hw/misc/pvpanic.c b/hw/misc/pvpanic.c
>> index dd3aef2..b575e01 100644
>> --- a/hw/misc/pvpanic.c
>> +++ b/hw/misc/pvpanic.c
>> @@ -2,10 +2,12 @@
>> * QEMU simulated pvpanic device.
>> *
>> * Copyright Fujitsu, Corp. 2013
>> + * Copyright (c) 2018 ZTE Ltd.
>> *
>> * Authors:
>> * Wen Congyang <wency@cn.fujitsu.com>
>> * Hu Tao <hutao@cn.fujitsu.com>
>> + * Peng Hao <peng.hao2@zte.com.cn>
>> *
>> * This work is licensed under the terms of the GNU GPL, version 2 or later.
>> * See the COPYING file in the top-level directory.
>> @@ -45,30 +47,48 @@ static void handle_event(int event)
>>
>> #include "hw/isa/isa.h"
>>
>> -typedef struct PVPanicState {
>> +typedef struct PVPanicCommonState {
>> + MemoryRegion mr;
>> +} PVPanicCommonState;
>
>Maybe we can drop this type now.
>
yeah, just keeping PVPanicISAState and PVPanicMMIOState is fine.
>> +
>> +typedef struct PVPanicISAState {
>> /* private */
>> ISADevice isadev;
>
>Here goes this comment:
>
>/* public */
>
>> + uint16_t ioport;
>> + /* public */
>> + PVPanicCommonState common;
>> +} PVPanicISAState;
>> +
>> +typedef struct PVPanicMMIOState {
>> + /* private */
>> + SysBusDevice busdev;
>>
[...]
>>
>
>Depending of the response to Peter's question [*]:
>
>I'd also like some confirmation from folks more familiar with the
>current state of the art in guest-to-management-layer communication
>that pvpanic is still the recommended way to achieve this goal,
>and hasn't been obsoleted by something else.
>
Because this pvpanic device is used when GUEST OS panics. At this point, communication with QEMU can not rely on any driver,
and only the simplest IO or MMIO can be used.
>I might work a bit on this patch next week.
>
>[*] https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg03861.html
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Qemu-arm] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
2018-10-25 11:38 ` Philippe Mathieu-Daudé
@ 2018-11-08 0:55 ` peng.hao2
-1 siblings, 0 replies; 24+ messages in thread
From: peng.hao2 @ 2018-11-08 0:55 UTC (permalink / raw)
To: philmd; +Cc: peter.maydell, qemu-arm, qemu-devel
[-- Attachment #1.1: Type: text/plain, Size: 220 bytes --]
Hi philmd,
Are there any problems with this series of patches "pvpanic: add mmio interface"?
The kernel part of this series of patches has been upstream.
git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc.git
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Qemu-arm] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
2018-10-25 11:38 ` Philippe Mathieu-Daudé
@ 2018-11-08 9:38 ` Peter Maydell
-1 siblings, 0 replies; 24+ messages in thread
From: Peter Maydell @ 2018-11-08 9:38 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Paolo Bonzini, Peng Hao, Stefan Hajnoczi, QEMU Developers,
qemu-arm
On 25 October 2018 at 12:38, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
> Depending of the response to Peter's question [*]:
>
> I'd also like some confirmation from folks more familiar with the
> current state of the art in guest-to-management-layer communication
> that pvpanic is still the recommended way to achieve this goal,
> and hasn't been obsoleted by something else.
Paolo? Stefan?
thanks
-- PMM
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Qemu-devel] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
@ 2018-11-08 9:38 ` Peter Maydell
0 siblings, 0 replies; 24+ messages in thread
From: Peter Maydell @ 2018-11-08 9:38 UTC (permalink / raw)
To: Philippe Mathieu-Daudé
Cc: Peng Hao, QEMU Developers, qemu-arm, Paolo Bonzini,
Stefan Hajnoczi
On 25 October 2018 at 12:38, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
> Depending of the response to Peter's question [*]:
>
> I'd also like some confirmation from folks more familiar with the
> current state of the art in guest-to-management-layer communication
> that pvpanic is still the recommended way to achieve this goal,
> and hasn't been obsoleted by something else.
Paolo? Stefan?
thanks
-- PMM
^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Qemu-arm] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
2018-11-08 9:38 ` [Qemu-devel] " Peter Maydell
@ 2018-11-12 11:25 ` Stefan Hajnoczi
-1 siblings, 0 replies; 24+ messages in thread
From: Stefan Hajnoczi @ 2018-11-12 11:25 UTC (permalink / raw)
To: Peter Maydell
Cc: Paolo Bonzini, Peng Hao, Philippe Mathieu-Daudé,
QEMU Developers, qemu-arm
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On Thu, Nov 08, 2018 at 09:38:54AM +0000, Peter Maydell wrote:
> On 25 October 2018 at 12:38, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
> > Depending of the response to Peter's question [*]:
> >
> > I'd also like some confirmation from folks more familiar with the
> > current state of the art in guest-to-management-layer communication
> > that pvpanic is still the recommended way to achieve this goal,
> > and hasn't been obsoleted by something else.
>
> Paolo? Stefan?
Sorry, I've never followed pvpanic and don't know what the current
approach is.
Stefan
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^ permalink raw reply [flat|nested] 24+ messages in thread
* Re: [Qemu-devel] [PATCH V4 3/5] hw/misc/pvpanic: Add the MMIO interface
@ 2018-11-12 11:25 ` Stefan Hajnoczi
0 siblings, 0 replies; 24+ messages in thread
From: Stefan Hajnoczi @ 2018-11-12 11:25 UTC (permalink / raw)
To: Peter Maydell
Cc: Philippe Mathieu-Daudé, Peng Hao, QEMU Developers, qemu-arm,
Paolo Bonzini
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On Thu, Nov 08, 2018 at 09:38:54AM +0000, Peter Maydell wrote:
> On 25 October 2018 at 12:38, Philippe Mathieu-Daudé <philmd@redhat.com> wrote:
> > Depending of the response to Peter's question [*]:
> >
> > I'd also like some confirmation from folks more familiar with the
> > current state of the art in guest-to-management-layer communication
> > that pvpanic is still the recommended way to achieve this goal,
> > and hasn't been obsoleted by something else.
>
> Paolo? Stefan?
Sorry, I've never followed pvpanic and don't know what the current
approach is.
Stefan
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^ permalink raw reply [flat|nested] 24+ messages in thread
* [Qemu-arm] [PATCH V4 4/5] hw/arm/virt: Use the pvpanic device
2018-10-25 19:23 ` [Qemu-devel] " Peng Hao
@ 2018-10-25 19:23 ` Peng Hao
-1 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: Peng Hao, qemu-arm, qemu-devel
add pvpanic device in aarch64 virt machine.
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/virt.c | 21 +++++++++++++++++++++
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/default-configs/aarch64-softmmu.mak b/default-configs/aarch64-softmmu.mak
index 6f790f0..57c6ca5 100644
--- a/default-configs/aarch64-softmmu.mak
+++ b/default-configs/aarch64-softmmu.mak
@@ -9,3 +9,4 @@ CONFIG_DPCD=y
CONFIG_XLNX_ZYNQMP=y
CONFIG_XLNX_ZYNQMP_ARM=y
CONFIG_ARM_SMMUV3=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9f67782..ffe8d00 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x09030000, 0x00001000 },
[VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },
[VIRT_SMMU] = { 0x09050000, 0x00020000 },
+ [VIRT_PVPANIC_MMIO] = { 0x09060000, 0x00000002 },
[VIRT_MMIO] = { 0x0a000000, 0x00000200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
@@ -190,6 +192,23 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+ char *nodename;
+ hwaddr base = vms->memmap[VIRT_PVPANIC_MMIO].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC_MMIO].size;
+
+ sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+ nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+ qemu_fdt_add_subnode(vms->fdt, nodename);
+ qemu_fdt_setprop_string(vms->fdt, nodename,
+ "compatible", "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(&vms->fdt_size);
@@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+ create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..ba54b84 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+ VIRT_PVPANIC_MMIO,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH V4 4/5] hw/arm/virt: Use the pvpanic device
@ 2018-10-25 19:23 ` Peng Hao
0 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: qemu-devel, qemu-arm, Peng Hao
add pvpanic device in aarch64 virt machine.
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
---
default-configs/aarch64-softmmu.mak | 1 +
hw/arm/virt.c | 21 +++++++++++++++++++++
include/hw/arm/virt.h | 1 +
3 files changed, 23 insertions(+)
diff --git a/default-configs/aarch64-softmmu.mak b/default-configs/aarch64-softmmu.mak
index 6f790f0..57c6ca5 100644
--- a/default-configs/aarch64-softmmu.mak
+++ b/default-configs/aarch64-softmmu.mak
@@ -9,3 +9,4 @@ CONFIG_DPCD=y
CONFIG_XLNX_ZYNQMP=y
CONFIG_XLNX_ZYNQMP_ARM=y
CONFIG_ARM_SMMUV3=y
+CONFIG_PVPANIC=y
diff --git a/hw/arm/virt.c b/hw/arm/virt.c
index 9f67782..ffe8d00 100644
--- a/hw/arm/virt.c
+++ b/hw/arm/virt.c
@@ -59,6 +59,7 @@
#include "qapi/visitor.h"
#include "standard-headers/linux/input.h"
#include "hw/arm/smmuv3.h"
+#include "hw/misc/pvpanic.h"
#define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
@@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
[VIRT_GPIO] = { 0x09030000, 0x00001000 },
[VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },
[VIRT_SMMU] = { 0x09050000, 0x00020000 },
+ [VIRT_PVPANIC_MMIO] = { 0x09060000, 0x00000002 },
[VIRT_MMIO] = { 0x0a000000, 0x00000200 },
/* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
[VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
@@ -190,6 +192,23 @@ static bool cpu_type_valid(const char *cpu)
return false;
}
+static void create_pvpanic_device(const VirtMachineState *vms)
+{
+ char *nodename;
+ hwaddr base = vms->memmap[VIRT_PVPANIC_MMIO].base;
+ hwaddr size = vms->memmap[VIRT_PVPANIC_MMIO].size;
+
+ sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
+
+ nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
+ qemu_fdt_add_subnode(vms->fdt, nodename);
+ qemu_fdt_setprop_string(vms->fdt, nodename,
+ "compatible", "qemu,pvpanic-mmio");
+ qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
+ 2, base, 2, size);
+ g_free(nodename);
+}
+
static void create_fdt(VirtMachineState *vms)
{
void *fdt = create_device_tree(&vms->fdt_size);
@@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
+ create_pvpanic_device(vms);
+
create_gic(vms, pic);
fdt_add_pmu_nodes(vms);
diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
index 4cc57a7..ba54b84 100644
--- a/include/hw/arm/virt.h
+++ b/include/hw/arm/virt.h
@@ -66,6 +66,7 @@ enum {
VIRT_GIC_REDIST,
VIRT_GIC_REDIST2,
VIRT_SMMU,
+ VIRT_PVPANIC_MMIO,
VIRT_UART,
VIRT_MMIO,
VIRT_RTC,
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* Re: [Qemu-arm] [PATCH V4 4/5] hw/arm/virt: Use the pvpanic device
2018-10-25 19:23 ` [Qemu-devel] " Peng Hao
@ 2018-10-25 11:28 ` Philippe Mathieu-Daudé
-1 siblings, 0 replies; 24+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-10-25 11:28 UTC (permalink / raw)
To: Peng Hao, peter.maydell; +Cc: qemu-arm, qemu-devel
Hi,
On 25/10/18 21:23, Peng Hao wrote:
> add pvpanic device in aarch64 virt machine.
>
> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> default-configs/aarch64-softmmu.mak | 1 +
> hw/arm/virt.c | 21 +++++++++++++++++++++
> include/hw/arm/virt.h | 1 +
> 3 files changed, 23 insertions(+)
>
> diff --git a/default-configs/aarch64-softmmu.mak b/default-configs/aarch64-softmmu.mak
> index 6f790f0..57c6ca5 100644
> --- a/default-configs/aarch64-softmmu.mak
> +++ b/default-configs/aarch64-softmmu.mak
> @@ -9,3 +9,4 @@ CONFIG_DPCD=y
> CONFIG_XLNX_ZYNQMP=y
> CONFIG_XLNX_ZYNQMP_ARM=y
> CONFIG_ARM_SMMUV3=y
> +CONFIG_PVPANIC=y
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 9f67782..ffe8d00 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -59,6 +59,7 @@
> #include "qapi/visitor.h"
> #include "standard-headers/linux/input.h"
> #include "hw/arm/smmuv3.h"
> +#include "hw/misc/pvpanic.h"
>
> #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
> static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
> @@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
> [VIRT_GPIO] = { 0x09030000, 0x00001000 },
> [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },
> [VIRT_SMMU] = { 0x09050000, 0x00020000 },
> + [VIRT_PVPANIC_MMIO] = { 0x09060000, 0x00000002 },
> [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
> [VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
> @@ -190,6 +192,23 @@ static bool cpu_type_valid(const char *cpu)
> return false;
> }
>
> +static void create_pvpanic_device(const VirtMachineState *vms)
> +{
> + char *nodename;
> + hwaddr base = vms->memmap[VIRT_PVPANIC_MMIO].base;
> + hwaddr size = vms->memmap[VIRT_PVPANIC_MMIO].size;
> +
> + sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
> +
> + nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
Can you add a link in the cover linking to the kernel side series?
> + qemu_fdt_add_subnode(vms->fdt, nodename);
> + qemu_fdt_setprop_string(vms->fdt, nodename,
> + "compatible", "qemu,pvpanic-mmio");
> + qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
> + 2, base, 2, size);
> + g_free(nodename);
> +}
> +
> static void create_fdt(VirtMachineState *vms)
> {
> void *fdt = create_device_tree(&vms->fdt_size);
> @@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
>
> create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
>
> + create_pvpanic_device(vms);
> +
> create_gic(vms, pic);
>
> fdt_add_pmu_nodes(vms);
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 4cc57a7..ba54b84 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -66,6 +66,7 @@ enum {
> VIRT_GIC_REDIST,
> VIRT_GIC_REDIST2,
> VIRT_SMMU,
> + VIRT_PVPANIC_MMIO,
All those enums are MMIO, so we can simply use VIRT_PVPANIC here.
> VIRT_UART,
> VIRT_MMIO,
> VIRT_RTC,
>
^ permalink raw reply [flat|nested] 24+ messages in thread* Re: [Qemu-devel] [PATCH V4 4/5] hw/arm/virt: Use the pvpanic device
@ 2018-10-25 11:28 ` Philippe Mathieu-Daudé
0 siblings, 0 replies; 24+ messages in thread
From: Philippe Mathieu-Daudé @ 2018-10-25 11:28 UTC (permalink / raw)
To: Peng Hao, peter.maydell; +Cc: qemu-devel, qemu-arm
Hi,
On 25/10/18 21:23, Peng Hao wrote:
> add pvpanic device in aarch64 virt machine.
>
> Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
> ---
> default-configs/aarch64-softmmu.mak | 1 +
> hw/arm/virt.c | 21 +++++++++++++++++++++
> include/hw/arm/virt.h | 1 +
> 3 files changed, 23 insertions(+)
>
> diff --git a/default-configs/aarch64-softmmu.mak b/default-configs/aarch64-softmmu.mak
> index 6f790f0..57c6ca5 100644
> --- a/default-configs/aarch64-softmmu.mak
> +++ b/default-configs/aarch64-softmmu.mak
> @@ -9,3 +9,4 @@ CONFIG_DPCD=y
> CONFIG_XLNX_ZYNQMP=y
> CONFIG_XLNX_ZYNQMP_ARM=y
> CONFIG_ARM_SMMUV3=y
> +CONFIG_PVPANIC=y
> diff --git a/hw/arm/virt.c b/hw/arm/virt.c
> index 9f67782..ffe8d00 100644
> --- a/hw/arm/virt.c
> +++ b/hw/arm/virt.c
> @@ -59,6 +59,7 @@
> #include "qapi/visitor.h"
> #include "standard-headers/linux/input.h"
> #include "hw/arm/smmuv3.h"
> +#include "hw/misc/pvpanic.h"
>
> #define DEFINE_VIRT_MACHINE_LATEST(major, minor, latest) \
> static void virt_##major##_##minor##_class_init(ObjectClass *oc, \
> @@ -143,6 +144,7 @@ static const MemMapEntry a15memmap[] = {
> [VIRT_GPIO] = { 0x09030000, 0x00001000 },
> [VIRT_SECURE_UART] = { 0x09040000, 0x00001000 },
> [VIRT_SMMU] = { 0x09050000, 0x00020000 },
> + [VIRT_PVPANIC_MMIO] = { 0x09060000, 0x00000002 },
> [VIRT_MMIO] = { 0x0a000000, 0x00000200 },
> /* ...repeating for a total of NUM_VIRTIO_TRANSPORTS, each of that size */
> [VIRT_PLATFORM_BUS] = { 0x0c000000, 0x02000000 },
> @@ -190,6 +192,23 @@ static bool cpu_type_valid(const char *cpu)
> return false;
> }
>
> +static void create_pvpanic_device(const VirtMachineState *vms)
> +{
> + char *nodename;
> + hwaddr base = vms->memmap[VIRT_PVPANIC_MMIO].base;
> + hwaddr size = vms->memmap[VIRT_PVPANIC_MMIO].size;
> +
> + sysbus_create_simple(TYPE_PVPANIC_MMIO, base, NULL);
> +
> + nodename = g_strdup_printf("/pvpanic-mmio@%" PRIx64, base);
Can you add a link in the cover linking to the kernel side series?
> + qemu_fdt_add_subnode(vms->fdt, nodename);
> + qemu_fdt_setprop_string(vms->fdt, nodename,
> + "compatible", "qemu,pvpanic-mmio");
> + qemu_fdt_setprop_sized_cells(vms->fdt, nodename, "reg",
> + 2, base, 2, size);
> + g_free(nodename);
> +}
> +
> static void create_fdt(VirtMachineState *vms)
> {
> void *fdt = create_device_tree(&vms->fdt_size);
> @@ -1531,6 +1550,8 @@ static void machvirt_init(MachineState *machine)
>
> create_flash(vms, sysmem, secure_sysmem ? secure_sysmem : sysmem);
>
> + create_pvpanic_device(vms);
> +
> create_gic(vms, pic);
>
> fdt_add_pmu_nodes(vms);
> diff --git a/include/hw/arm/virt.h b/include/hw/arm/virt.h
> index 4cc57a7..ba54b84 100644
> --- a/include/hw/arm/virt.h
> +++ b/include/hw/arm/virt.h
> @@ -66,6 +66,7 @@ enum {
> VIRT_GIC_REDIST,
> VIRT_GIC_REDIST2,
> VIRT_SMMU,
> + VIRT_PVPANIC_MMIO,
All those enums are MMIO, so we can simply use VIRT_PVPANIC here.
> VIRT_UART,
> VIRT_MMIO,
> VIRT_RTC,
>
^ permalink raw reply [flat|nested] 24+ messages in thread
* [Qemu-arm] [PATCH V4 5/5] hw/arm/virt: add pvpanic device in virt acpi table
2018-10-25 19:23 ` [Qemu-devel] " Peng Hao
@ 2018-10-25 19:23 ` Peng Hao
-1 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: Peng Hao, qemu-arm, qemu-devel
add pvpanic device in virt acpi table, so when kenrel command line uses
acpi=force, kernel can get info from acpi table in aarch64.
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
---
hw/arm/virt-acpi-build.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..d126cee 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -61,6 +61,21 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
}
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry *pvpanic_memmap)
+{
+ Aml *dev = aml_device("PANC");
+ aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+ aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+ Aml *crs = aml_resource_template();
+ aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+ aml_append(dev, aml_name_decl("_CRS", crs));
+
+ aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
{
@@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
acpi_dsdt_add_cpus(scope, vms->smp_cpus);
acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
+ acpi_dsdt_add_pvpanic(scope, &memmap[VIRT_PVPANIC_MMIO]);
acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]);
acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
--
1.8.3.1
^ permalink raw reply related [flat|nested] 24+ messages in thread* [Qemu-devel] [PATCH V4 5/5] hw/arm/virt: add pvpanic device in virt acpi table
@ 2018-10-25 19:23 ` Peng Hao
0 siblings, 0 replies; 24+ messages in thread
From: Peng Hao @ 2018-10-25 19:23 UTC (permalink / raw)
To: peter.maydell, philmd; +Cc: qemu-devel, qemu-arm, Peng Hao
add pvpanic device in virt acpi table, so when kenrel command line uses
acpi=force, kernel can get info from acpi table in aarch64.
Signed-off-by: Peng Hao <peng.hao2@zte.com.cn>
---
hw/arm/virt-acpi-build.c | 16 ++++++++++++++++
1 file changed, 16 insertions(+)
diff --git a/hw/arm/virt-acpi-build.c b/hw/arm/virt-acpi-build.c
index 5785fb6..d126cee 100644
--- a/hw/arm/virt-acpi-build.c
+++ b/hw/arm/virt-acpi-build.c
@@ -61,6 +61,21 @@ static void acpi_dsdt_add_cpus(Aml *scope, int smp_cpus)
}
}
+static void acpi_dsdt_add_pvpanic(Aml *scope, const MemMapEntry *pvpanic_memmap)
+{
+ Aml *dev = aml_device("PANC");
+ aml_append(dev, aml_name_decl("_HID", aml_string("QEMU0001")));
+ aml_append(dev, aml_name_decl("_UID", aml_int(0)));
+
+ Aml *crs = aml_resource_template();
+ aml_append(crs, aml_memory32_fixed(pvpanic_memmap->base,
+ pvpanic_memmap->size, AML_READ_WRITE));
+
+ aml_append(dev, aml_name_decl("_CRS", crs));
+
+ aml_append(scope, dev);
+}
+
static void acpi_dsdt_add_uart(Aml *scope, const MemMapEntry *uart_memmap,
uint32_t uart_irq)
{
@@ -770,6 +785,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, VirtMachineState *vms)
acpi_dsdt_add_cpus(scope, vms->smp_cpus);
acpi_dsdt_add_uart(scope, &memmap[VIRT_UART],
(irqmap[VIRT_UART] + ARM_SPI_BASE));
+ acpi_dsdt_add_pvpanic(scope, &memmap[VIRT_PVPANIC_MMIO]);
acpi_dsdt_add_flash(scope, &memmap[VIRT_FLASH]);
acpi_dsdt_add_fw_cfg(scope, &memmap[VIRT_FW_CFG]);
acpi_dsdt_add_virtio(scope, &memmap[VIRT_MMIO],
--
1.8.3.1
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