From mboxrd@z Thu Jan 1 00:00:00 1970 From: Ville =?iso-8859-1?Q?Syrj=E4l=E4?= Subject: Re: [PATCH v3 06/10] drm/i915: Unmask PSR interruptions before assert IIR Date: Fri, 26 Oct 2018 20:06:27 +0300 Message-ID: <20181026170627.GD9144@intel.com> References: <20181026011737.23684-1-jose.souza@intel.com> <20181026011737.23684-6-jose.souza@intel.com> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Received: from mga11.intel.com (mga11.intel.com [192.55.52.93]) by gabe.freedesktop.org (Postfix) with ESMTPS id F2B986E4DF for ; Fri, 26 Oct 2018 17:06:31 +0000 (UTC) Content-Disposition: inline In-Reply-To: <20181026011737.23684-6-jose.souza@intel.com> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: intel-gfx-bounces@lists.freedesktop.org Sender: "Intel-gfx" To: =?iso-8859-1?Q?Jos=E9?= Roberto de Souza Cc: intel-gfx@lists.freedesktop.org, Dhinakaran Pandiyan List-Id: intel-gfx@lists.freedesktop.org T24gVGh1LCBPY3QgMjUsIDIwMTggYXQgMDY6MTc6MzNQTSAtMDcwMCwgSm9zw6kgUm9iZXJ0byBk ZSBTb3V6YSB3cm90ZToKPiBUaGUgSUlSIHJlZ2lzdGVyIGlzIGEgcmVzdWx0IG9mIGEgQU5EIG9w ZXJhdGlvbiBiZXR3ZWVuIHRoZSBtYXNrCj4gcmVnaXN0ZXIgYW5kIHRoZSBhY3R1YWwgaW50ZXJy dXB0aW9uIHN0YXRlIHNvIGNoZWNraW5nIElJUiBiZWZvcmUKPiB1bm1hc2sgaW50ZXJydXB0aW9u cyB3aWxsIG5ldmVyIGdldCBhbnkgZXJyb3JzIGV2ZW4gaWYgdGhleSBleGl0cy4KCklJUiBpcyB0 aGUgbGF0Y2hlZCBzdGF0ZS4gVGhlIG9ubHkgdGhpbmcgd2Ugd2FudCB0byBhc3NlcnQgaXMgdGhh dCB3ZQpkaWRuJ3QgbGVhdmUgYW55dGhpbmcgaW4gSUlSIGFmdGVyIHdlIG1hc2tlZCB2aWEgSU1S LiBKdXN0IGxpa2UKR0VOM19JUlFfSU5JVCgpICYgY28uCgo+IAo+IENjOiBEaGluYWthcmFuIFBh bmRpeWFuIDxkaGluYWthcmFuLnBhbmRpeWFuQGludGVsLmNvbT4KPiBTaWduZWQtb2ZmLWJ5OiBK b3PDqSBSb2JlcnRvIGRlIFNvdXphIDxqb3NlLnNvdXphQGludGVsLmNvbT4KPiAtLS0KPiAgZHJp dmVycy9ncHUvZHJtL2k5MTUvaTkxNV9pcnEuYyB8IDQgKystLQo+ICAxIGZpbGUgY2hhbmdlZCwg MiBpbnNlcnRpb25zKCspLCAyIGRlbGV0aW9ucygtKQo+IAo+IGRpZmYgLS1naXQgYS9kcml2ZXJz L2dwdS9kcm0vaTkxNS9pOTE1X2lycS5jIGIvZHJpdmVycy9ncHUvZHJtL2k5MTUvaTkxNV9pcnEu Ywo+IGluZGV4IDVkMWY1MzcyMzM4OC4uMjE3NTZlOWE3NTIzIDEwMDY0NAo+IC0tLSBhL2RyaXZl cnMvZ3B1L2RybS9pOTE1L2k5MTVfaXJxLmMKPiArKysgYi9kcml2ZXJzL2dwdS9kcm0vaTkxNS9p OTE1X2lycS5jCj4gQEAgLTQwODYsOCArNDA4Niw4IEBAIHN0YXRpYyBpbnQgaXJvbmxha2VfaXJx X3Bvc3RpbnN0YWxsKHN0cnVjdCBkcm1fZGV2aWNlICpkZXYpCj4gIAl9Cj4gIAo+ICAJaWYgKElT X0hBU1dFTEwoZGV2X3ByaXYpKSB7Cj4gLQkJZ2VuM19hc3NlcnRfaWlyX2lzX3plcm8oZGV2X3By aXYsIEVEUF9QU1JfSUlSKTsKPiAgCQlpbnRlbF9wc3JfaXJxX2NvbnRyb2woZGV2X3ByaXYsIGRl dl9wcml2LT5wc3IuZGVidWcpOwo+ICsJCWdlbjNfYXNzZXJ0X2lpcl9pc196ZXJvKGRldl9wcml2 LCBFRFBfUFNSX0lJUik7Cj4gIAkJZGlzcGxheV9tYXNrIHw9IERFX0VEUF9QU1JfSU5UX0hTVzsK PiAgCX0KPiAgCj4gQEAgLTQyMzIsOCArNDIzMiw4IEBAIHN0YXRpYyB2b2lkIGdlbjhfZGVfaXJx X3Bvc3RpbnN0YWxsKHN0cnVjdCBkcm1faTkxNV9wcml2YXRlICpkZXZfcHJpdikKPiAgCWVsc2Ug aWYgKElTX0JST0FEV0VMTChkZXZfcHJpdikpCj4gIAkJZGVfcG9ydF9lbmFibGVzIHw9IEdFTjhf UE9SVF9EUF9BX0hPVFBMVUc7Cj4gIAo+IC0JZ2VuM19hc3NlcnRfaWlyX2lzX3plcm8oZGV2X3By aXYsIEVEUF9QU1JfSUlSKTsKPiAgCWludGVsX3Bzcl9pcnFfY29udHJvbChkZXZfcHJpdiwgZGV2 X3ByaXYtPnBzci5kZWJ1Zyk7Cj4gKwlnZW4zX2Fzc2VydF9paXJfaXNfemVybyhkZXZfcHJpdiwg RURQX1BTUl9JSVIpOwo+ICAKPiAgCWZvcl9lYWNoX3BpcGUoZGV2X3ByaXYsIHBpcGUpIHsKPiAg CQlkZXZfcHJpdi0+ZGVfaXJxX21hc2tbcGlwZV0gPSB+ZGVfcGlwZV9tYXNrZWQ7Cj4gLS0gCj4g Mi4xOS4xCj4gCj4gX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19f X18KPiBJbnRlbC1nZnggbWFpbGluZyBsaXN0Cj4gSW50ZWwtZ2Z4QGxpc3RzLmZyZWVkZXNrdG9w Lm9yZwo+IGh0dHBzOi8vbGlzdHMuZnJlZWRlc2t0b3Aub3JnL21haWxtYW4vbGlzdGluZm8vaW50 ZWwtZ2Z4CgotLSAKVmlsbGUgU3lyasOkbMOkCkludGVsCl9fX19fX19fX19fX19fX19fX19fX19f X19fX19fX19fX19fX19fX19fX19fX19fCkludGVsLWdmeCBtYWlsaW5nIGxpc3QKSW50ZWwtZ2Z4 QGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczovL2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWls bWFuL2xpc3RpbmZvL2ludGVsLWdmeAo=