From: Fredrik Noring <noring@nocrew.org>
To: Aleksandar Markovic <aleksandar.markovic@rt-rk.com>,
Aleksandar Markovic <amarkovic@wavecomp.com>
Cc: qemu-devel@nongnu.org, aurelien@aurel32.net,
smarkovic@wavecomp.com, pjovanovic@wavecomp.com,
juergenurban@gmx.de, "Maciej W. Rozycki" <macro@linux-mips.org>
Subject: Re: [Qemu-devel] [PATCH 0/3] target/mips: Rename MMI-related code elements
Date: Fri, 26 Oct 2018 23:17:08 +0200 [thread overview]
Message-ID: <20181026211708.GA22187@sx9> (raw)
In-Reply-To: <1540586148-11285-1-git-send-email-aleksandar.markovic@rt-rk.com>
Hi Aleksandar,
> This series renames MMI-related code elements so that they do not
> contain TX79 substring. Tx79 is one of CPUs that support MMI ASE.
> Opcodes and other code elements should be as generic as possible,
> and should not contain CPU name if they are supported by multiple
> CPUs. In cases when there is a single-CPU-specific opcode, an
> anoter special convention should apply, like, for example,
> MMI_OPC__TX79_XXX or MMI_OPC__R5900_YYY. So far these cases were
> not identified, but there will be some in the future. But overall,
> the great MMI opcodes are shared (stay the same) between different
> CPUs that support MMI.
>
> Aleksandar Markovic (3):
> target/mips: Rename MMI-related masks
> target/mips: Rename MMI-related opcodes
> target/mips: Rename MMI-related functions
>
> target/mips/translate.c | 518 ++++++++++++++++++++++++------------------------
> 1 file changed, 259 insertions(+), 259 deletions(-)
This is interesting. Could you name a few other ISAs, beside the R5900
and the TX79, that have 128-bit GPRs and equivalent MMIs?
Fredrik
prev parent reply other threads:[~2018-10-26 21:17 UTC|newest]
Thread overview: 5+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-10-26 20:35 [Qemu-devel] [PATCH 0/3] target/mips: Rename MMI-related code elements Aleksandar Markovic
2018-10-26 20:35 ` [Qemu-devel] [PATCH 1/3] target/mips: Rename MMI-related masks Aleksandar Markovic
2018-10-26 20:35 ` [Qemu-devel] [PATCH 2/3] target/mips: Rename MMI-related opcodes Aleksandar Markovic
2018-10-26 20:35 ` [Qemu-devel] [PATCH 3/3] target/mips: Rename MMI-related functions Aleksandar Markovic
2018-10-26 21:17 ` Fredrik Noring [this message]
Reply instructions:
You may reply publicly to this message via plain-text email
using any one of the following methods:
* Save the following mbox file, import it into your mail client,
and reply-to-all from there: mbox
Avoid top-posting and favor interleaved quoting:
https://en.wikipedia.org/wiki/Posting_style#Interleaved_style
* Reply using the --to, --cc, and --in-reply-to
switches of git-send-email(1):
git send-email \
--in-reply-to=20181026211708.GA22187@sx9 \
--to=noring@nocrew.org \
--cc=aleksandar.markovic@rt-rk.com \
--cc=amarkovic@wavecomp.com \
--cc=aurelien@aurel32.net \
--cc=juergenurban@gmx.de \
--cc=macro@linux-mips.org \
--cc=pjovanovic@wavecomp.com \
--cc=qemu-devel@nongnu.org \
--cc=smarkovic@wavecomp.com \
/path/to/YOUR_REPLY
https://kernel.org/pub/software/scm/git/docs/git-send-email.html
* If your mail client supports setting the In-Reply-To header
via mailto: links, try the mailto: link
Be sure your reply has a Subject: header at the top and a blank line
before the message body.
This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.