diff for duplicates of <20181031071413.GI10386@tiger> diff --git a/a/1.txt b/N1/1.txt index a38d8fa..404403b 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -108,46 +108,46 @@ On Wed, Oct 17, 2018 at 11:49:40AM +0000, Bhaskar Upadhaya wrote: > +&i2c0 { > + status = "okay"; > + -> + i2c-mux at 77 { +> + i2c-mux@77 { > + compatible = "nxp,pca9847"; > + reg = <0x77>; > + #address-cells = <1>; > + #size-cells = <0>; > + -> + i2c at 2 { +> + i2c@2 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x2>; > + -> + current-monitor at 40 { +> + current-monitor@40 { > + compatible = "ti,ina220"; > + reg = <0x40>; > + shunt-resistor = <1000>; > + }; > + -> + current-monitor at 41 { +> + current-monitor@41 { > + compatible = "ti,ina220"; > + reg = <0x41>; > + shunt-resistor = <1000>; > + }; > + }; > + -> + i2c at 3 { +> + i2c@3 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x3>; > + -> + rtc at 51 { +> + rtc@51 { > + compatible = "nxp,pcf2129"; > + reg = <0x51>; > + }; > + -> + eeprom at 56 { +> + eeprom@56 { > + compatible = "atmel,24c512"; > + reg = <0x56>; > + }; > + -> + eeprom at 57 { +> + eeprom@57 { > + compatible = "atmel,24c512"; > + reg = <0x57>; > + }; @@ -192,30 +192,30 @@ On Wed, Oct 17, 2018 at 11:49:40AM +0000, Bhaskar Upadhaya wrote: Have a newline between properties and child node. -> + i2c-mux at 77 { +> + i2c-mux@77 { > + compatible = "nxp,pca9847"; > + reg = <0x77>; > + #address-cells = <1>; > + #size-cells = <0>; > + -> + i2c at 2 { +> + i2c@2 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x02>; > + -> + current-monitor at 40 { +> + current-monitor@40 { > + compatible = "ti,ina220"; > + reg = <0x40>; > + shunt-resistor = <500>; > + }; > + }; > + -> + i2c at 3 { +> + i2c@3 { > + #address-cells = <1>; > + #size-cells = <0>; > + reg = <0x3>; > + -> + rtc at 51 { +> + rtc@51 { > + compatible = "nxp,pcf2129"; > + reg = <0x51>; > + }; @@ -261,7 +261,7 @@ Have a newline between properties and child node. > + #address-cells = <1>; > + #size-cells = <0>; > + -> + cpu0: cpu at 0 { +> + cpu0: cpu@0 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72"; > + reg = <0x0>; @@ -271,7 +271,7 @@ Have a newline between properties and child node. > + cpu-idle-states = <&CPU_PH20>; > + }; > + -> + cpu1: cpu at 1 { +> + cpu1: cpu@1 { > + device_type = "cpu"; > + compatible = "arm,cortex-a72"; > + reg = <0x1>; @@ -306,7 +306,7 @@ Not sure what's the point of this node without any properties. > + }; > + }; > + -> + memory at 80000000 { +> + memory@80000000 { > + device_type = "memory"; > + }; @@ -340,7 +340,7 @@ encoding address and size. > + IRQ_TYPE_LEVEL_LOW)>; > + }; > + -> + gic: interrupt-controller at 6000000 { +> + gic: interrupt-controller@6000000 { > + compatible= "arm,gic-v3"; > + #address-cells = <2>; > + #size-cells = <2>; @@ -351,7 +351,7 @@ encoding address and size. > + interrupt-controller; > + interrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) | > + IRQ_TYPE_LEVEL_LOW)>; -> + its: gic-its at 6020000 { +> + its: gic-its@6020000 { > + compatible = "arm,gic-v3-its"; > + msi-controller; > + reg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */ @@ -364,33 +364,33 @@ encoding address and size. > + #size-cells = <2>; > + ranges; > + -> + ddr: memory-controller at 1080000 { +> + ddr: memory-controller@1080000 { > + compatible = "fsl,qoriq-memory-controller"; > + reg = <0x0 0x1080000 0x0 0x1000>; > + interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>; > + big-endian; > + }; > + -> + dcfg: syscon at 1e00000 { +> + dcfg: syscon@1e00000 { > + compatible = "fsl,ls1028a-dcfg", "syscon"; > + reg = <0x0 0x1e00000 0x0 0x10000>; > + big-endian; > + }; > + -> + scfg: syscon at 1fc0000 { +> + scfg: syscon@1fc0000 { > + compatible = "fsl,ls1028a-scfg", "syscon"; > + reg = <0x0 0x1fc0000 0x0 0x10000>; > + big-endian; > + }; > + -> + clockgen: clock-controller at 1300000 { +> + clockgen: clock-controller@1300000 { > + compatible = "fsl,ls1028a-clockgen"; > + reg = <0x0 0x1300000 0x0 0xa0000>; > + #clock-cells = <2>; > + clocks = <&sysclk>; > + }; > + -> + i2c0: i2c at 2000000 { +> + i2c0: i2c@2000000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -400,7 +400,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + i2c1: i2c at 2010000 { +> + i2c1: i2c@2010000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -410,7 +410,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + i2c2: i2c at 2020000 { +> + i2c2: i2c@2020000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -420,7 +420,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + i2c3: i2c at 2030000 { +> + i2c3: i2c@2030000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -430,7 +430,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + i2c4: i2c at 2040000 { +> + i2c4: i2c@2040000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -440,7 +440,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + i2c5: i2c at 2050000 { +> + i2c5: i2c@2050000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -450,7 +450,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + i2c6: i2c at 2060000 { +> + i2c6: i2c@2060000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -460,7 +460,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + i2c7: i2c at 2070000 { +> + i2c7: i2c@2070000 { > + compatible = "fsl,vf610-i2c"; > + #address-cells = <1>; > + #size-cells = <0>; @@ -470,7 +470,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + duart0: serial at 21c0500 { +> + duart0: serial@21c0500 { > + compatible = "fsl,ns16550", "ns16550a"; > + reg = <0x00 0x21c0500 0x0 0x100>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; @@ -478,7 +478,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + duart1: serial at 21c0600 { +> + duart1: serial@21c0600 { > + compatible = "fsl,ns16550", "ns16550a"; > + reg = <0x00 0x21c0600 0x0 0x100>; > + interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>; @@ -486,7 +486,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + gpio1: gpio at 2300000 { +> + gpio1: gpio@2300000 { > + compatible = "fsl,qoriq-gpio"; > + reg = <0x0 0x2300000 0x0 0x10000>; > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; @@ -496,7 +496,7 @@ encoding address and size. > + #interrupt-cells = <2>; > + }; > + -> + gpio2: gpio at 2310000 { +> + gpio2: gpio@2310000 { > + compatible = "fsl,qoriq-gpio"; > + reg = <0x0 0x2310000 0x0 0x10000>; > + interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>; @@ -506,7 +506,7 @@ encoding address and size. > + #interrupt-cells = <2>; > + }; > + -> + gpio3: gpio at 2320000 { +> + gpio3: gpio@2320000 { > + compatible = "fsl,qoriq-gpio"; > + reg = <0x0 0x2320000 0x0 0x10000>; > + interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>; @@ -516,7 +516,7 @@ encoding address and size. > + #interrupt-cells = <2>; > + }; > + -> + wdog0: watchdog at 23c0000 { +> + wdog0: watchdog@23c0000 { > + compatible = "fsl,ls1028a-wdt", "fsl,imx21-wdt"; > + reg = <0x0 0x23c0000 0x0 0x10000>; > + interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>; @@ -525,7 +525,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + sata: sata at 3200000 { +> + sata: sata@3200000 { > + compatible = "fsl,ls1028a-ahci"; > + reg = <0x0 0x3200000 0x0 0x10000>, > + <0x0 0x20140520 0x0 0x4>; @@ -535,7 +535,7 @@ encoding address and size. > + status = "disabled"; > + }; > + -> + smmu: iommu at 5000000 { +> + smmu: iommu@5000000 { > + compatible = "arm,mmu-500"; > + reg = <0 0x5000000 0 0x800000>; > + #global-interrupts = <8>; @@ -603,5 +603,5 @@ Shawn > > _______________________________________________ > linux-arm-kernel mailing list -> linux-arm-kernel at lists.infradead.org +> linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel diff --git a/a/content_digest b/N1/content_digest index e901852..3e4aaea 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,8 +1,14 @@ "ref\01539760132-3386-1-git-send-email-Bhaskar.Upadhaya@nxp.com\0" - "From\0shawnguo@kernel.org (Shawn Guo)\0" - "Subject\0[PATCH v2 1/2] arm64: dts: Add support for NXP LS1028A SoC\0" + "From\0Shawn Guo <shawnguo@kernel.org>\0" + "Subject\0Re: [PATCH v2 1/2] arm64: dts: Add support for NXP LS1028A SoC\0" "Date\0Wed, 31 Oct 2018 15:14:16 +0800\0" - "To\0linux-arm-kernel@lists.infradead.org\0" + "To\0Bhaskar Upadhaya <bhaskar.upadhaya@nxp.com>\0" + "Cc\0devicetree@vger.kernel.org <devicetree@vger.kernel.org>" + Sudhanshu Gupta <sudhanshu.gupta@nxp.com> + Harninder Rai <harninder.rai@nxp.com> + Rajesh Bhagat <rajesh.bhagat@nxp.com> + Leo Li <leoyang.li@nxp.com> + " linux-arm-kernel@lists.infradead.org <linux-arm-kernel@lists.infradead.org>\0" "\00:1\0" "b\0" "On Wed, Oct 17, 2018 at 11:49:40AM +0000, Bhaskar Upadhaya wrote:\n" @@ -115,46 +121,46 @@ "> +&i2c0 {\n" "> +\tstatus = \"okay\";\n" "> +\n" - "> +\ti2c-mux at 77 {\n" + "> +\ti2c-mux@77 {\n" "> +\t\tcompatible = \"nxp,pca9847\";\n" "> +\t\treg = <0x77>;\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\ti2c at 2 {\n" + "> +\t\ti2c@2 {\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\treg = <0x2>;\n" "> +\n" - "> +\t\t\tcurrent-monitor at 40 {\n" + "> +\t\t\tcurrent-monitor@40 {\n" "> +\t\t\t\tcompatible = \"ti,ina220\";\n" "> +\t\t\t\treg = <0x40>;\n" "> +\t\t\t\tshunt-resistor = <1000>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\tcurrent-monitor at 41 {\n" + "> +\t\t\tcurrent-monitor@41 {\n" "> +\t\t\t\tcompatible = \"ti,ina220\";\n" "> +\t\t\t\treg = <0x41>;\n" "> +\t\t\t\tshunt-resistor = <1000>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c at 3 {\n" + "> +\t\ti2c@3 {\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\treg = <0x3>;\n" "> +\n" - "> +\t\t\trtc at 51 {\n" + "> +\t\t\trtc@51 {\n" "> +\t\t\t\tcompatible = \"nxp,pcf2129\";\n" "> +\t\t\t\treg = <0x51>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\teeprom at 56 {\n" + "> +\t\t\teeprom@56 {\n" "> +\t\t\t\tcompatible = \"atmel,24c512\";\n" "> +\t\t\t\treg = <0x56>;\n" "> +\t\t\t};\n" "> +\n" - "> +\t\t\teeprom at 57 {\n" + "> +\t\t\teeprom@57 {\n" "> +\t\t\t\tcompatible = \"atmel,24c512\";\n" "> +\t\t\t\treg = <0x57>;\n" "> +\t\t\t};\n" @@ -199,30 +205,30 @@ "\n" "Have a newline between properties and child node.\n" "\n" - "> +\ti2c-mux at 77 {\n" + "> +\ti2c-mux@77 {\n" "> +\t\tcompatible = \"nxp,pca9847\";\n" "> +\t\treg = <0x77>;\n" "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\ti2c at 2 {\n" + "> +\t\ti2c@2 {\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\treg = <0x02>;\n" "> +\n" - "> +\t\t\tcurrent-monitor at 40 {\n" + "> +\t\t\tcurrent-monitor@40 {\n" "> +\t\t\t\tcompatible = \"ti,ina220\";\n" "> +\t\t\t\treg = <0x40>;\n" "> +\t\t\t\tshunt-resistor = <500>;\n" "> +\t\t\t};\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c at 3 {\n" + "> +\t\ti2c@3 {\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" "> +\t\t\treg = <0x3>;\n" "> +\n" - "> +\t\t\trtc at 51 {\n" + "> +\t\t\trtc@51 {\n" "> +\t\t\t\tcompatible = \"nxp,pcf2129\";\n" "> +\t\t\t\treg = <0x51>;\n" "> +\t\t\t};\n" @@ -268,7 +274,7 @@ "> +\t\t#address-cells = <1>;\n" "> +\t\t#size-cells = <0>;\n" "> +\n" - "> +\t\tcpu0: cpu at 0 {\n" + "> +\t\tcpu0: cpu@0 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a72\";\n" "> +\t\t\treg = <0x0>;\n" @@ -278,7 +284,7 @@ "> +\t\t\tcpu-idle-states = <&CPU_PH20>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tcpu1: cpu at 1 {\n" + "> +\t\tcpu1: cpu@1 {\n" "> +\t\t\tdevice_type = \"cpu\";\n" "> +\t\t\tcompatible = \"arm,cortex-a72\";\n" "> +\t\t\treg = <0x1>;\n" @@ -313,7 +319,7 @@ "> +\t\t};\n" "> +\t};\n" "> +\n" - "> +\tmemory at 80000000 {\n" + "> +\tmemory@80000000 {\n" "> +\t\tdevice_type = \"memory\";\n" "> +\t};\n" "\n" @@ -347,7 +353,7 @@ "> +\t\t\t\t\t IRQ_TYPE_LEVEL_LOW)>;\n" "> +\t};\n" "> +\n" - "> +\tgic: interrupt-controller at 6000000 {\n" + "> +\tgic: interrupt-controller@6000000 {\n" "> +\t\tcompatible= \"arm,gic-v3\";\n" "> +\t\t#address-cells = <2>;\n" "> +\t\t#size-cells = <2>;\n" @@ -358,7 +364,7 @@ "> +\t\tinterrupt-controller;\n" "> +\t\tinterrupts = <GIC_PPI 9 (GIC_CPU_MASK_RAW(0xf) |\n" "> +\t\t\t\t\t IRQ_TYPE_LEVEL_LOW)>;\n" - "> +\t\tits: gic-its at 6020000 {\n" + "> +\t\tits: gic-its@6020000 {\n" "> +\t\t\tcompatible = \"arm,gic-v3-its\";\n" "> +\t\t\tmsi-controller;\n" "> +\t\t\treg = <0x0 0x06020000 0 0x20000>;/* GIC Translater */\n" @@ -371,33 +377,33 @@ "> +\t\t#size-cells = <2>;\n" "> +\t\tranges;\n" "> +\n" - "> +\t\tddr: memory-controller at 1080000 {\n" + "> +\t\tddr: memory-controller@1080000 {\n" "> +\t\t\tcompatible = \"fsl,qoriq-memory-controller\";\n" "> +\t\t\treg = <0x0 0x1080000 0x0 0x1000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;\n" "> +\t\t\tbig-endian;\n" "> +\t\t};\n" "> +\n" - "> +\t\tdcfg: syscon at 1e00000 {\n" + "> +\t\tdcfg: syscon@1e00000 {\n" "> +\t\t\tcompatible = \"fsl,ls1028a-dcfg\", \"syscon\";\n" "> +\t\t\treg = <0x0 0x1e00000 0x0 0x10000>;\n" "> +\t\t\tbig-endian;\n" "> +\t\t};\n" "> +\n" - "> +\t\tscfg: syscon at 1fc0000 {\n" + "> +\t\tscfg: syscon@1fc0000 {\n" "> +\t\t\tcompatible = \"fsl,ls1028a-scfg\", \"syscon\";\n" "> +\t\t\treg = <0x0 0x1fc0000 0x0 0x10000>;\n" "> +\t\t\tbig-endian;\n" "> +\t\t};\n" "> +\n" - "> +\t\tclockgen: clock-controller at 1300000 {\n" + "> +\t\tclockgen: clock-controller@1300000 {\n" "> +\t\t\tcompatible = \"fsl,ls1028a-clockgen\";\n" "> +\t\t\treg = <0x0 0x1300000 0x0 0xa0000>;\n" "> +\t\t\t#clock-cells = <2>;\n" "> +\t\t\tclocks = <&sysclk>;\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c0: i2c at 2000000 {\n" + "> +\t\ti2c0: i2c@2000000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -407,7 +413,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c1: i2c at 2010000 {\n" + "> +\t\ti2c1: i2c@2010000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -417,7 +423,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c2: i2c at 2020000 {\n" + "> +\t\ti2c2: i2c@2020000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -427,7 +433,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c3: i2c at 2030000 {\n" + "> +\t\ti2c3: i2c@2030000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -437,7 +443,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c4: i2c at 2040000 {\n" + "> +\t\ti2c4: i2c@2040000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -447,7 +453,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c5: i2c at 2050000 {\n" + "> +\t\ti2c5: i2c@2050000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -457,7 +463,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c6: i2c at 2060000 {\n" + "> +\t\ti2c6: i2c@2060000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -467,7 +473,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\ti2c7: i2c at 2070000 {\n" + "> +\t\ti2c7: i2c@2070000 {\n" "> +\t\t\tcompatible = \"fsl,vf610-i2c\";\n" "> +\t\t\t#address-cells = <1>;\n" "> +\t\t\t#size-cells = <0>;\n" @@ -477,7 +483,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tduart0: serial at 21c0500 {\n" + "> +\t\tduart0: serial@21c0500 {\n" "> +\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n" "> +\t\t\treg = <0x00 0x21c0500 0x0 0x100>;\n" "> +\t\t\tinterrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -485,7 +491,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tduart1: serial at 21c0600 {\n" + "> +\t\tduart1: serial@21c0600 {\n" "> +\t\t\tcompatible = \"fsl,ns16550\", \"ns16550a\";\n" "> +\t\t\treg = <0x00 0x21c0600 0x0 0x100>;\n" "> +\t\t\tinterrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -493,7 +499,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tgpio1: gpio at 2300000 {\n" + "> +\t\tgpio1: gpio@2300000 {\n" "> +\t\t\tcompatible = \"fsl,qoriq-gpio\";\n" "> +\t\t\treg = <0x0 0x2300000 0x0 0x10000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -503,7 +509,7 @@ "> +\t\t\t#interrupt-cells = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tgpio2: gpio at 2310000 {\n" + "> +\t\tgpio2: gpio@2310000 {\n" "> +\t\t\tcompatible = \"fsl,qoriq-gpio\";\n" "> +\t\t\treg = <0x0 0x2310000 0x0 0x10000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -513,7 +519,7 @@ "> +\t\t\t#interrupt-cells = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\tgpio3: gpio at 2320000 {\n" + "> +\t\tgpio3: gpio@2320000 {\n" "> +\t\t\tcompatible = \"fsl,qoriq-gpio\";\n" "> +\t\t\treg = <0x0 0x2320000 0x0 0x10000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -523,7 +529,7 @@ "> +\t\t\t#interrupt-cells = <2>;\n" "> +\t\t};\n" "> +\n" - "> +\t\twdog0: watchdog at 23c0000 {\n" + "> +\t\twdog0: watchdog@23c0000 {\n" "> +\t\t\tcompatible = \"fsl,ls1028a-wdt\", \"fsl,imx21-wdt\";\n" "> +\t\t\treg = <0x0 0x23c0000 0x0 0x10000>;\n" "> +\t\t\tinterrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;\n" @@ -532,7 +538,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsata: sata at 3200000 {\n" + "> +\t\tsata: sata@3200000 {\n" "> +\t\t\tcompatible = \"fsl,ls1028a-ahci\";\n" "> +\t\t\treg = <0x0 0x3200000 0x0 0x10000>,\n" "> +\t\t\t\t<0x0 0x20140520 0x0 0x4>;\n" @@ -542,7 +548,7 @@ "> +\t\t\tstatus = \"disabled\";\n" "> +\t\t};\n" "> +\n" - "> +\t\tsmmu: iommu at 5000000 {\n" + "> +\t\tsmmu: iommu@5000000 {\n" "> +\t\t\tcompatible = \"arm,mmu-500\";\n" "> +\t\t\treg = <0 0x5000000 0 0x800000>;\n" "> +\t\t\t#global-interrupts = <8>;\n" @@ -610,7 +616,7 @@ "> \n" "> _______________________________________________\n" "> linux-arm-kernel mailing list\n" - "> linux-arm-kernel at lists.infradead.org\n" + "> linux-arm-kernel@lists.infradead.org\n" > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -8cb4bc5b54ee4a86c8a326b76a66ce15876b9fd584678d6ce930f8d6611b6a30 +9899238be2c830b0bd3b03a2db4dfe3aa40bb9c5321ac151db3dfb917a4313ad
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