Re: [v4 7/7] drm/i915/fec: Disable FEC state.

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Tue, Oct 30, 2018 at 05:45:17PM -0700, Anusha Srivatsa wrote:
> Set the suitable bits in DP_TP_CTL to stop
> bit correction when DSC is disabled.
> 
> v2:
> - rebased.
> - Add additional check for compression state. (Gaurav)
> 
> v3: rebased.
> 
> v4:
> - Move the code to the proper spot according to spec (Ville)
> - Use proper checks (manasi)
> 
> Cc: Gaurav K Singh <gaurav.k.singh@intel.com>
> Cc: Jani Nikula <jani.nikula@linux.intel.com>
> Cc: Ville Syrjala <ville.syrjala@linux.intel.com>
> Cc: Manasi Navare <manasi.d.navare@intel.com>
> Signed-off-by: Anusha Srivatsa <anusha.srivatsa@intel.com>
> ---
>  drivers/gpu/drm/i915/intel_ddi.c | 32 ++++++++++++++++++++++++++++++++
>  drivers/gpu/drm/i915/intel_drv.h |  2 ++
>  2 files changed, 34 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/intel_ddi.c b/drivers/gpu/drm/i915/intel_ddi.c
> index f03f44f332c7..d28280c3b299 100644
> --- a/drivers/gpu/drm/i915/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/intel_ddi.c
> @@ -2915,6 +2915,31 @@ void intel_dp_enable_fec_state(struct intel_dp *intel_dp,
>  		DRM_ERROR("Timed out waiting for FEC Enable Status\n");
>  }
>  
> +void intel_dp_disable_fec_state(struct intel_dp *intel_dp,
> +				const struct intel_crtc_state *crtc_state)

Same comments as for the enable.

> +{
> +	struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> +	struct intel_digital_port *intel_dig_port = dp_to_dig_port(intel_dp);
> +	enum port port = intel_dig_port->base.port;
> +	u32 val;
> +	u8 dsc_en_state;
> +
> +	if (!crtc_state->fec_enable)
> +		return;
> +
> +	if (!crtc_state->dsc_params.compression_enable)
> +		return;

Not needed.

> +
> +	drm_dp_dpcd_readb(&intel_dp->aux, DP_DSC_ENABLE, &dsc_en_state);

Why? Just disable FEC. fec_enable has already told us that it was
enabled.

> +
> +	if (!dsc_en_state) {
> +		val = I915_READ(DP_TP_CTL(port));
> +		val &= ~DP_TP_CTL_FEC_ENABLE;
> +		I915_WRITE(DP_TP_CTL(port), val);
> +		POSTING_READ(DP_TP_CTL(port));
> +	}
> +}
> +
>  static void intel_ddi_pre_enable_dp(struct intel_encoder *encoder,
>  				    const struct intel_crtc_state *crtc_state,
>  				    const struct drm_connector_state *conn_state)
> @@ -3055,7 +3080,11 @@ static void intel_ddi_pre_enable(struct intel_encoder *encoder,
>  static void intel_disable_ddi_buf(struct intel_encoder *encoder)
>  {
>  	struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +	struct intel_digital_port *dig_port = enc_to_dig_port(&encoder->base);
> +	struct intel_dp *intel_dp = &dig_port->dp;
> +	struct intel_crtc_state *crtc_state;
>  	enum port port = encoder->port;
> +

Bogus whitespace.

>  	bool wait = false;
>  	u32 val;
>  
> @@ -3071,6 +3100,9 @@ static void intel_disable_ddi_buf(struct intel_encoder *encoder)
>  	val |= DP_TP_CTL_LINK_TRAIN_PAT1;
>  	I915_WRITE(DP_TP_CTL(port), val);
>  
> +	/* Disable FEC in DP Sink */

Incorrect comment.

> +	intel_dp_disable_fec_state(intel_dp, crtc_state);
> +
>  	if (wait)
>  		intel_wait_ddi_buf_idle(dev_priv, port);
>  }
> diff --git a/drivers/gpu/drm/i915/intel_drv.h b/drivers/gpu/drm/i915/intel_drv.h
> index 1cdfa9c5da43..4ed04fad83b7 100644
> --- a/drivers/gpu/drm/i915/intel_drv.h
> +++ b/drivers/gpu/drm/i915/intel_drv.h
> @@ -1801,6 +1801,8 @@ void intel_dp_sink_set_fec_ready(struct intel_dp *intel_dp,
>  				 int state);
>  void intel_dp_enable_fec_state(struct intel_dp *intel_dp,
>  			       const struct intel_crtc_state *crtc_state);
> +void intel_dp_disable_fec_state(struct intel_dp *intel_dp,
> +				const struct intel_crtc_state *crtc_state);
>  void intel_dp_encoder_reset(struct drm_encoder *encoder);
>  void intel_dp_encoder_suspend(struct intel_encoder *intel_encoder);
>  void intel_dp_encoder_destroy(struct drm_encoder *encoder);
> -- 
> 2.17.1

-- 
Ville Syrjälä
Intel
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