diff for duplicates of <20181102004122.GA22741@andestech.com> diff --git a/a/1.txt b/N1/1.txt index e2fa3e8..3e03078 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -1,5 +1,5 @@ On Thu, Nov 01, 2018 at 10:50:04AM -0700, Palmer Dabbelt wrote: -> On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao at andestech.com wrote: +> On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao@andestech.com wrote: > >On Wed, Oct 31, 2018 at 07:17:45AM -0700, Christoph Hellwig wrote: > >>On Wed, Oct 31, 2018 at 04:46:10PM +0530, Anup Patel wrote: > >>> I agree that we need a place for vendor-specific ISA extensions and @@ -37,3 +37,9 @@ Currently no, but the future is hard to see. As long as the extensible freedom claimed by the RISC-V foundation remains true, such extensions may have their role to play. Don't worry now, I was just to give a example that in some possible vendor-specific cases the kernel cannot keep itself from involving. + + +_______________________________________________ +linux-riscv mailing list +linux-riscv@lists.infradead.org +http://lists.infradead.org/mailman/listinfo/linux-riscv diff --git a/a/content_digest b/N1/content_digest index 82b2501..19206d1 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -1,13 +1,23 @@ "ref\020181101005541.GA25604@andestech.com\0" "ref\0mhng-22ded2c8-7f87-4acc-b017-627e369cf874@palmer-si-x1c4\0" - "From\0alankao@andestech.com (Alan Kao)\0" - "Subject\0[RFC 0/2] RISC-V: A proposal to add vendor-specific code\0" + "From\0Alan Kao <alankao@andestech.com>\0" + "Subject\0Re: [RFC 0/2] RISC-V: A proposal to add vendor-specific code\0" "Date\0Fri, 2 Nov 2018 08:41:22 +0800\0" - "To\0linux-riscv@lists.infradead.org\0" + "To\0Palmer Dabbelt <palmer@sifive.com>\0" + "Cc\0zong@andestech.com" + aou@eecs.berkeley.edu + Arnd Bergmann <arnd@arndb.de> + greentime@andestech.com + anup@brainfault.org + linux-kernel@vger.kernel.org + Christoph Hellwig <hch@infradead.org> + vincentc@andestech.com + linux-riscv@lists.infradead.org + " deanbo422@gmail.com\0" "\00:1\0" "b\0" "On Thu, Nov 01, 2018 at 10:50:04AM -0700, Palmer Dabbelt wrote:\n" - "> On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao at andestech.com wrote:\n" + "> On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao@andestech.com wrote:\n" "> >On Wed, Oct 31, 2018 at 07:17:45AM -0700, Christoph Hellwig wrote:\n" "> >>On Wed, Oct 31, 2018 at 04:46:10PM +0530, Anup Patel wrote:\n" "> >>> I agree that we need a place for vendor-specific ISA extensions and\n" @@ -44,6 +54,12 @@ "Currently no, but the future is hard to see. As long as the extensible freedom\n" "claimed by the RISC-V foundation remains true, such extensions may have their\n" "role to play. Don't worry now, I was just to give a example that in some \n" - possible vendor-specific cases the kernel cannot keep itself from involving. + "possible vendor-specific cases the kernel cannot keep itself from involving.\n" + "\n" + "\n" + "_______________________________________________\n" + "linux-riscv mailing list\n" + "linux-riscv@lists.infradead.org\n" + http://lists.infradead.org/mailman/listinfo/linux-riscv -67d9a08795867aef10e682103ea26202671219b004c85e69aa3863f43b3e2a49 +8b5b9d749289fc697bfe714060a567f3b72e30b6014e80c2957da28af867673c
diff --git a/a/1.txt b/N2/1.txt index e2fa3e8..106ecb6 100644 --- a/a/1.txt +++ b/N2/1.txt @@ -1,5 +1,5 @@ On Thu, Nov 01, 2018 at 10:50:04AM -0700, Palmer Dabbelt wrote: -> On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao at andestech.com wrote: +> On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao@andestech.com wrote: > >On Wed, Oct 31, 2018 at 07:17:45AM -0700, Christoph Hellwig wrote: > >>On Wed, Oct 31, 2018 at 04:46:10PM +0530, Anup Patel wrote: > >>> I agree that we need a place for vendor-specific ISA extensions and diff --git a/a/content_digest b/N2/content_digest index 82b2501..c1dffd1 100644 --- a/a/content_digest +++ b/N2/content_digest @@ -1,13 +1,23 @@ "ref\020181101005541.GA25604@andestech.com\0" "ref\0mhng-22ded2c8-7f87-4acc-b017-627e369cf874@palmer-si-x1c4\0" - "From\0alankao@andestech.com (Alan Kao)\0" - "Subject\0[RFC 0/2] RISC-V: A proposal to add vendor-specific code\0" + "From\0Alan Kao <alankao@andestech.com>\0" + "Subject\0Re: [RFC 0/2] RISC-V: A proposal to add vendor-specific code\0" "Date\0Fri, 2 Nov 2018 08:41:22 +0800\0" - "To\0linux-riscv@lists.infradead.org\0" + "To\0Palmer Dabbelt <palmer@sifive.com>\0" + "Cc\0Christoph Hellwig <hch@infradead.org>" + <anup@brainfault.org> + <zong@andestech.com> + <aou@eecs.berkeley.edu> + Arnd Bergmann <arnd@arndb.de> + <greentime@andestech.com> + <linux-kernel@vger.kernel.org> + <vincentc@andestech.com> + <linux-riscv@lists.infradead.org> + " <deanbo422@gmail.com>\0" "\00:1\0" "b\0" "On Thu, Nov 01, 2018 at 10:50:04AM -0700, Palmer Dabbelt wrote:\n" - "> On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao at andestech.com wrote:\n" + "> On Wed, 31 Oct 2018 17:55:42 PDT (-0700), alankao@andestech.com wrote:\n" "> >On Wed, Oct 31, 2018 at 07:17:45AM -0700, Christoph Hellwig wrote:\n" "> >>On Wed, Oct 31, 2018 at 04:46:10PM +0530, Anup Patel wrote:\n" "> >>> I agree that we need a place for vendor-specific ISA extensions and\n" @@ -46,4 +56,4 @@ "role to play. Don't worry now, I was just to give a example that in some \n" possible vendor-specific cases the kernel cannot keep itself from involving. -67d9a08795867aef10e682103ea26202671219b004c85e69aa3863f43b3e2a49 +3e409908d52567edaeb29638b3de4ed32234eaa634d45cabf003cacdbe5affdb
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