Re: [PATCH] drm/i915/icl: Fix power well 2 wrt. DC-off toggling order

["Ville Syrjälä" <ville.syrjala@linux.intel.com>]

On Fri, Nov 02, 2018 at 08:22:00PM +0200, Imre Deak wrote:
> To enable DC5/6 power well 2 has to be disabled as for previous
> platforms, so fix things up.
> 
> Bspec: 4234
> Fixes: 67ca07e7ac10 ("drm/i915/icl: Add power well support")
> Cc: Animesh Manna <animesh.manna@intel.com>
> Cc: Paulo Zanoni <paulo.r.zanoni@intel.com>
> Cc: Ville Syrjälä <ville.syrjala@linux.intel.com>
> Signed-off-by: Imre Deak <imre.deak@intel.com>

Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com>

> ---
>  drivers/gpu/drm/i915/intel_runtime_pm.c | 12 ++++++------
>  1 file changed, 6 insertions(+), 6 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/intel_runtime_pm.c b/drivers/gpu/drm/i915/intel_runtime_pm.c
> index 763912c0245c..c9c1477e648b 100644
> --- a/drivers/gpu/drm/i915/intel_runtime_pm.c
> +++ b/drivers/gpu/drm/i915/intel_runtime_pm.c
> @@ -2799,6 +2799,12 @@ static const struct i915_power_well_desc icl_power_wells[] = {
>  		},
>  	},
>  	{
> +		.name = "DC off",
> +		.domains = ICL_DISPLAY_DC_OFF_POWER_DOMAINS,
> +		.ops = &gen9_dc_off_power_well_ops,
> +		.id = DISP_PW_ID_NONE,
> +	},
> +	{
>  		.name = "power well 2",
>  		.domains = ICL_PW_2_POWER_DOMAINS,
>  		.ops = &hsw_power_well_ops,
> @@ -2810,12 +2816,6 @@ static const struct i915_power_well_desc icl_power_wells[] = {
>  		},
>  	},
>  	{
> -		.name = "DC off",
> -		.domains = ICL_DISPLAY_DC_OFF_POWER_DOMAINS,
> -		.ops = &gen9_dc_off_power_well_ops,
> -		.id = DISP_PW_ID_NONE,
> -	},
> -	{
>  		.name = "power well 3",
>  		.domains = ICL_PW_3_POWER_DOMAINS,
>  		.ops = &hsw_power_well_ops,
> -- 
> 2.13.2

-- 
Ville Syrjälä
Intel
_______________________________________________
Intel-gfx mailing list
Intel-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailman/listinfo/intel-gfx