diff for duplicates of <20181111121359.0e946523@archlinux> diff --git a/a/1.txt b/N1/1.txt index 175791a..fdd5042 100644 --- a/a/1.txt +++ b/N1/1.txt @@ -3,27 +3,25 @@ Stefan Popa <stefan.popa@analog.com> wrote: > The ad7124-4 and ad7124-8 are a family of 4 and 8 channel sigma-delta ADCs > with 24-bit precision and reference. ->=20 +> > Three power modes are available which in turn affect the output data rate: > * Full power: 9.38 SPS to 19,200 SPS > * Mid power: 2.34 SPS to 4800 SPS > * Low power: 1.17 SPS to 2400 SPS ->=20 +> > The ad7124-4 can be configured to have four differential inputs, while > ad7124-8 can have 8. Moreover, ad7124 also supports per channel > configuration. Each configuration consists of gain, reference source, > output data rate and bipolar/unipolar configuration. One question around the offset. -Voltage =3D (raw value + offset) * scale. -So I think the offset should simply be half the raw value range, not depend= -ent +Voltage = (raw value + offset) * scale. +So I think the offset should simply be half the raw value range, not dependent on the current gain? Perhaps I'm missing something. -The other thing that I think needs to be dropped is the use of hardware gai= -n. +The other thing that I think needs to be dropped is the use of hardware gain. It was never intended for this use case and means we effectively have two interfaces for the same thing. Scale and hardwaregain. @@ -31,13 +29,11 @@ Otherwise, looking very nice. Jonathan ->=20 +> > Datasheets: -> Link: http://www.analog.com/media/en/technical-documentation/data-sheets/= -AD7124-4.pdf -> Link: http://www.analog.com/media/en/technical-documentation/data-sheets/= -ad7124-8.pdf ->=20 +> Link: http://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-4.pdf +> Link: http://www.analog.com/media/en/technical-documentation/data-sheets/ad7124-8.pdf +> > Signed-off-by: Stefan Popa <stefan.popa@analog.com> > --- > Changes in v2: @@ -46,33 +42,26 @@ ad7124-8.pdf > - Removed channel, address, scan_index and shift fields from > ad7124_channel_template. > - Added a sanity check for val2 in ad7124_write_raw(). -> - Used the "reg" property to get the channel address and "adi,diff-chann= -els" -> for the differential pins. The "adi,channel-number" property was remov= -ed. -> - When calling regulator_get_optional, the probe is given up in case of = -error, +> - Used the "reg" property to get the channel address and "adi,diff-channels" +> for the differential pins. The "adi,channel-number" property was removed. +> - When calling regulator_get_optional, the probe is given up in case of error, > but continues in case of -ENODEV. -> - clk_disable_unprepare() is called before ad_sd_cleanup_buffer_and_trig= -ger +> - clk_disable_unprepare() is called before ad_sd_cleanup_buffer_and_trigger > in ad7124_remove(). > Changes in v4: -> - Added the .shift and .endianness fields as part of the ad7124_channel_= -template. +> - Added the .shift and .endianness fields as part of the ad7124_channel_template. > - Made the gain configurable from the user space. > - Removed the odr_hz and gain properties from the DT. -> - Used the bipolar and diff-channels properties defined in the new adc.t= -xt doc. +> - Used the bipolar and diff-channels properties defined in the new adc.txt doc. > - Misc style fixes. ->=20 +> > MAINTAINERS | 7 + > drivers/iio/adc/Kconfig | 11 + > drivers/iio/adc/Makefile | 1 + -> drivers/iio/adc/ad7124.c | 676 +++++++++++++++++++++++++++++++++++++++++= -++++++ +> drivers/iio/adc/ad7124.c | 676 +++++++++++++++++++++++++++++++++++++++++++++++ > 4 files changed, 695 insertions(+) > create mode 100644 drivers/iio/adc/ad7124.c ->=20 +> > diff --git a/MAINTAINERS b/MAINTAINERS > index f642044..3a1bfcb 100644 > --- a/MAINTAINERS @@ -80,7 +69,7 @@ xt doc. > @@ -839,6 +839,13 @@ S: Supported > F: drivers/iio/dac/ad5758.c > F: Documentation/devicetree/bindings/iio/dac/ad5758.txt -> =20 +> > +ANALOG DEVICES INC AD7124 DRIVER > +M: Stefan Popa <stefan.popa@analog.com> > +L: linux-iio@vger.kernel.org @@ -98,7 +87,7 @@ xt doc. > @@ -10,6 +10,17 @@ config AD_SIGMA_DELTA > select IIO_BUFFER > select IIO_TRIGGERED_BUFFER -> =20 +> > +config AD7124 > + tristate "Analog Devices AD7124 and similar sigma-delta ADCs driver" > + depends on SPI_MASTER @@ -118,13 +107,13 @@ xt doc. > --- a/drivers/iio/adc/Makefile > +++ b/drivers/iio/adc/Makefile > @@ -5,6 +5,7 @@ -> =20 +> > # When adding new entries keep the list in alphabetical order -> obj-$(CONFIG_AD_SIGMA_DELTA) +=3D ad_sigma_delta.o -> +obj-$(CONFIG_AD7124) +=3D ad7124.o -> obj-$(CONFIG_AD7266) +=3D ad7266.o -> obj-$(CONFIG_AD7291) +=3D ad7291.o -> obj-$(CONFIG_AD7298) +=3D ad7298.o +> obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o +> +obj-$(CONFIG_AD7124) += ad7124.o +> obj-$(CONFIG_AD7266) += ad7266.o +> obj-$(CONFIG_AD7291) += ad7291.o +> obj-$(CONFIG_AD7298) += ad7298.o > diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c > new file mode 100644 > index 0000000..64d2aa7 @@ -217,21 +206,21 @@ xt doc. > + AD7124_FULL_POWER, > +}; > + -> +static const unsigned int ad7124_gain[8] =3D { +> +static const unsigned int ad7124_gain[8] = { > + 1, 2, 4, 8, 16, 32, 64, 128 > +}; > + -> +static const int ad7124_master_clk_freq_hz[3] =3D { -> + [AD7124_LOW_POWER] =3D 76800, -> + [AD7124_MID_POWER] =3D 153600, -> + [AD7124_FULL_POWER] =3D 614400, +> +static const int ad7124_master_clk_freq_hz[3] = { +> + [AD7124_LOW_POWER] = 76800, +> + [AD7124_MID_POWER] = 153600, +> + [AD7124_FULL_POWER] = 614400, > +}; > + -> +static const char * const ad7124_ref_names[] =3D { -> + [AD7124_REFIN1] =3D "refin1", -> + [AD7124_REFIN2] =3D "refin2", -> + [AD7124_INT_REF] =3D "int", -> + [AD7124_AVDD_REF] =3D "avdd", +> +static const char * const ad7124_ref_names[] = { +> + [AD7124_REFIN1] = "refin1", +> + [AD7124_REFIN2] = "refin2", +> + [AD7124_INT_REF] = "int", +> + [AD7124_AVDD_REF] = "avdd", > +}; > + > +struct ad7124_chip_info { @@ -257,21 +246,21 @@ xt doc. > + unsigned int num_channels; > +}; > + -> +static const struct iio_chan_spec ad7124_channel_template =3D { -> + .type =3D IIO_VOLTAGE, -> + .indexed =3D 1, -> + .differential =3D 1, -> + .info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) | +> +static const struct iio_chan_spec ad7124_channel_template = { +> + .type = IIO_VOLTAGE, +> + .indexed = 1, +> + .differential = 1, +> + .info_mask_separate = BIT(IIO_CHAN_INFO_RAW) | > + BIT(IIO_CHAN_INFO_SCALE) | > + BIT(IIO_CHAN_INFO_OFFSET) | > + BIT(IIO_CHAN_INFO_SAMP_FREQ) | > + BIT(IIO_CHAN_INFO_HARDWAREGAIN), -> + .scan_type =3D { -> + .sign =3D 'u', -> + .realbits =3D 24, -> + .storagebits =3D 32, -> + .shift =3D 8, -> + .endianness =3D IIO_BE, +> + .scan_type = { +> + .sign = 'u', +> + .realbits = 24, +> + .storagebits = 32, +> + .shift = 8, +> + .endianness = IIO_BE, > + }, > +}; @@ -280,17 +269,17 @@ xt doc. > + struct iio_chan_spec const *chan, > + int *val, int *val2, long info) > +{ -> + struct ad7124_state *st =3D iio_priv(indio_dev); +> + struct ad7124_state *st = iio_priv(indio_dev); > + int idx, ret; > + > + switch (info) { > + case IIO_CHAN_INFO_RAW: -> + ret =3D ad_sigma_delta_single_conversion(indio_dev, chan, val); +> + ret = ad_sigma_delta_single_conversion(indio_dev, chan, val); > + if (ret < 0) > + return ret; > + > + /* After the conversion is performed, disable the channel */ -> + ret =3D ad_sd_write_reg(&st->sd, +> + ret = ad_sd_write_reg(&st->sd, > + AD7124_CHANNEL(chan->address), 2, > + st->channel_config[chan->address].ain | > + AD7124_CHANNEL_EN(0)); @@ -299,41 +288,41 @@ xt doc. > + > + return IIO_VAL_INT; > + case IIO_CHAN_INFO_SCALE: -> + idx =3D st->channel_config[chan->address].pga_bits; -> + *val =3D st->channel_config[chan->address].vref_mv / +> + idx = st->channel_config[chan->address].pga_bits; +> + *val = st->channel_config[chan->address].vref_mv / > + ad7124_gain[idx]; Given the gains are all a power of 2. You 'could' apply them to *val2 instead? Might give better precision. I haven't checked! > + if (st->channel_config[chan->address].bipolar) -> + *val2 =3D chan->scan_type.realbits - 1; +> + *val2 = chan->scan_type.realbits - 1; > + else -> + *val2 =3D chan->scan_type.realbits; +> + *val2 = chan->scan_type.realbits; > + > + return IIO_VAL_FRACTIONAL_LOG2; > + case IIO_CHAN_INFO_OFFSET: > + if (st->channel_config[chan->address].bipolar) { -> + /* Code =3D 2^(n =E2=88=92 1) =C3=97 ((Ain =C3=97 Gain / Vref) + 1) */ -> + idx =3D st->channel_config[chan->address].pga_bits; -> + *val =3D -(st->channel_config[chan->address].vref_mv / +> + /* Code = 2^(n − 1) × ((Ain × Gain / Vref) + 1) */ +> + idx = st->channel_config[chan->address].pga_bits; +> + *val = -(st->channel_config[chan->address].vref_mv / > + ad7124_gain[idx]); This one surprised me. Offset is applied before gain and I think this part is symmetric when bipolar, so I think should just be based on the raw adc counts as half the full range? > + } else { -> + *val =3D 0; +> + *val = 0; > + } > + > + return IIO_VAL_INT; > + case IIO_CHAN_INFO_SAMP_FREQ: -> + *val =3D st->channel_config[chan->address].odr; +> + *val = st->channel_config[chan->address].odr; > + > + return IIO_VAL_INT; > + case IIO_CHAN_INFO_HARDWAREGAIN: -> + idx =3D st->channel_config[chan->address].pga_bits; -> + *val =3D ad7124_gain[idx]; +> + idx = st->channel_config[chan->address].pga_bits; +> + *val = ad7124_gain[idx]; Hmm. Normally hardwaregain is reserved for those cases where scale doesn't work. Scale is definitely the preferred option and it'll take a pretty persuasive argument to convince me otherwise. diff --git a/a/content_digest b/N1/content_digest index 07eac8a..158e6c8 100644 --- a/a/content_digest +++ b/N1/content_digest @@ -17,27 +17,25 @@ "\n" "> The ad7124-4 and ad7124-8 are a family of 4 and 8 channel sigma-delta ADCs\n" "> with 24-bit precision and reference.\n" - ">=20\n" + "> \n" "> Three power modes are available which in turn affect the output data rate:\n" "> * Full power: 9.38 SPS to 19,200 SPS\n" "> * Mid power: 2.34 SPS to 4800 SPS\n" "> * Low power: 1.17 SPS to 2400 SPS\n" - ">=20\n" + "> \n" "> The ad7124-4 can be configured to have four differential inputs, while\n" "> ad7124-8 can have 8. Moreover, ad7124 also supports per channel\n" "> configuration. Each configuration consists of gain, reference source,\n" "> output data rate and bipolar/unipolar configuration.\n" "\n" "One question around the offset.\n" - "Voltage =3D (raw value + offset) * scale.\n" - "So I think the offset should simply be half the raw value range, not depend=\n" - "ent\n" + "Voltage = (raw value + offset) * scale.\n" + "So I think the offset should simply be half the raw value range, not dependent\n" "on the current gain?\n" "\n" "Perhaps I'm missing something.\n" "\n" - "The other thing that I think needs to be dropped is the use of hardware gai=\n" - "n.\n" + "The other thing that I think needs to be dropped is the use of hardware gain.\n" "It was never intended for this use case and means we effectively have two\n" "interfaces for the same thing. Scale and hardwaregain.\n" "\n" @@ -45,13 +43,11 @@ "\n" "Jonathan\n" "\n" - ">=20\n" + "> \n" "> Datasheets:\n" - "> Link: http://www.analog.com/media/en/technical-documentation/data-sheets/=\n" - "AD7124-4.pdf\n" - "> Link: http://www.analog.com/media/en/technical-documentation/data-sheets/=\n" - "ad7124-8.pdf\n" - ">=20\n" + "> Link: http://www.analog.com/media/en/technical-documentation/data-sheets/AD7124-4.pdf\n" + "> Link: http://www.analog.com/media/en/technical-documentation/data-sheets/ad7124-8.pdf\n" + "> \n" "> Signed-off-by: Stefan Popa <stefan.popa@analog.com>\n" "> ---\n" "> Changes in v2:\n" @@ -60,33 +56,26 @@ "> \t- Removed channel, address, scan_index and shift fields from\n" "> \t ad7124_channel_template.\n" "> \t- Added a sanity check for val2 in ad7124_write_raw().\n" - "> \t- Used the \"reg\" property to get the channel address and \"adi,diff-chann=\n" - "els\"\n" - "> \t for the differential pins. The \"adi,channel-number\" property was remov=\n" - "ed.\n" - "> \t- When calling regulator_get_optional, the probe is given up in case of =\n" - "error,\n" + "> \t- Used the \"reg\" property to get the channel address and \"adi,diff-channels\"\n" + "> \t for the differential pins. The \"adi,channel-number\" property was removed.\n" + "> \t- When calling regulator_get_optional, the probe is given up in case of error,\n" "> \t but continues in case of -ENODEV.\n" - "> \t- clk_disable_unprepare() is called before ad_sd_cleanup_buffer_and_trig=\n" - "ger\n" + "> \t- clk_disable_unprepare() is called before ad_sd_cleanup_buffer_and_trigger\n" "> \t in ad7124_remove().\n" "> Changes in v4:\n" - "> \t- Added the .shift and .endianness fields as part of the ad7124_channel_=\n" - "template.\n" + "> \t- Added the .shift and .endianness fields as part of the ad7124_channel_template.\n" "> \t- Made the gain configurable from the user space.\n" "> \t- Removed the odr_hz and gain properties from the DT.\n" - "> \t- Used the bipolar and diff-channels properties defined in the new adc.t=\n" - "xt doc.\n" + "> \t- Used the bipolar and diff-channels properties defined in the new adc.txt doc.\n" "> \t- Misc style fixes.\n" - ">=20\n" + "> \n" "> MAINTAINERS | 7 +\n" "> drivers/iio/adc/Kconfig | 11 +\n" "> drivers/iio/adc/Makefile | 1 +\n" - "> drivers/iio/adc/ad7124.c | 676 +++++++++++++++++++++++++++++++++++++++++=\n" - "++++++\n" + "> drivers/iio/adc/ad7124.c | 676 +++++++++++++++++++++++++++++++++++++++++++++++\n" "> 4 files changed, 695 insertions(+)\n" "> create mode 100644 drivers/iio/adc/ad7124.c\n" - ">=20\n" + "> \n" "> diff --git a/MAINTAINERS b/MAINTAINERS\n" "> index f642044..3a1bfcb 100644\n" "> --- a/MAINTAINERS\n" @@ -94,7 +83,7 @@ "> @@ -839,6 +839,13 @@ S:\tSupported\n" "> F:\tdrivers/iio/dac/ad5758.c\n" "> F:\tDocumentation/devicetree/bindings/iio/dac/ad5758.txt\n" - "> =20\n" + "> \n" "> +ANALOG DEVICES INC AD7124 DRIVER\n" "> +M:\tStefan Popa <stefan.popa@analog.com>\n" "> +L:\tlinux-iio@vger.kernel.org\n" @@ -112,7 +101,7 @@ "> @@ -10,6 +10,17 @@ config AD_SIGMA_DELTA\n" "> \tselect IIO_BUFFER\n" "> \tselect IIO_TRIGGERED_BUFFER\n" - "> =20\n" + "> \n" "> +config AD7124\n" "> +\ttristate \"Analog Devices AD7124 and similar sigma-delta ADCs driver\"\n" "> +\tdepends on SPI_MASTER\n" @@ -132,13 +121,13 @@ "> --- a/drivers/iio/adc/Makefile\n" "> +++ b/drivers/iio/adc/Makefile\n" "> @@ -5,6 +5,7 @@\n" - "> =20\n" + "> \n" "> # When adding new entries keep the list in alphabetical order\n" - "> obj-$(CONFIG_AD_SIGMA_DELTA) +=3D ad_sigma_delta.o\n" - "> +obj-$(CONFIG_AD7124) +=3D ad7124.o\n" - "> obj-$(CONFIG_AD7266) +=3D ad7266.o\n" - "> obj-$(CONFIG_AD7291) +=3D ad7291.o\n" - "> obj-$(CONFIG_AD7298) +=3D ad7298.o\n" + "> obj-$(CONFIG_AD_SIGMA_DELTA) += ad_sigma_delta.o\n" + "> +obj-$(CONFIG_AD7124) += ad7124.o\n" + "> obj-$(CONFIG_AD7266) += ad7266.o\n" + "> obj-$(CONFIG_AD7291) += ad7291.o\n" + "> obj-$(CONFIG_AD7298) += ad7298.o\n" "> diff --git a/drivers/iio/adc/ad7124.c b/drivers/iio/adc/ad7124.c\n" "> new file mode 100644\n" "> index 0000000..64d2aa7\n" @@ -231,21 +220,21 @@ "> +\tAD7124_FULL_POWER,\n" "> +};\n" "> +\n" - "> +static const unsigned int ad7124_gain[8] =3D {\n" + "> +static const unsigned int ad7124_gain[8] = {\n" "> +\t1, 2, 4, 8, 16, 32, 64, 128\n" "> +};\n" "> +\n" - "> +static const int ad7124_master_clk_freq_hz[3] =3D {\n" - "> +\t[AD7124_LOW_POWER] =3D 76800,\n" - "> +\t[AD7124_MID_POWER] =3D 153600,\n" - "> +\t[AD7124_FULL_POWER] =3D 614400,\n" + "> +static const int ad7124_master_clk_freq_hz[3] = {\n" + "> +\t[AD7124_LOW_POWER] = 76800,\n" + "> +\t[AD7124_MID_POWER] = 153600,\n" + "> +\t[AD7124_FULL_POWER] = 614400,\n" "> +};\n" "> +\n" - "> +static const char * const ad7124_ref_names[] =3D {\n" - "> +\t[AD7124_REFIN1] =3D \"refin1\",\n" - "> +\t[AD7124_REFIN2] =3D \"refin2\",\n" - "> +\t[AD7124_INT_REF] =3D \"int\",\n" - "> +\t[AD7124_AVDD_REF] =3D \"avdd\",\n" + "> +static const char * const ad7124_ref_names[] = {\n" + "> +\t[AD7124_REFIN1] = \"refin1\",\n" + "> +\t[AD7124_REFIN2] = \"refin2\",\n" + "> +\t[AD7124_INT_REF] = \"int\",\n" + "> +\t[AD7124_AVDD_REF] = \"avdd\",\n" "> +};\n" "> +\n" "> +struct ad7124_chip_info {\n" @@ -271,21 +260,21 @@ "> +\tunsigned int num_channels;\n" "> +};\n" "> +\n" - "> +static const struct iio_chan_spec ad7124_channel_template =3D {\n" - "> +\t.type =3D IIO_VOLTAGE,\n" - "> +\t.indexed =3D 1,\n" - "> +\t.differential =3D 1,\n" - "> +\t.info_mask_separate =3D BIT(IIO_CHAN_INFO_RAW) |\n" + "> +static const struct iio_chan_spec ad7124_channel_template = {\n" + "> +\t.type = IIO_VOLTAGE,\n" + "> +\t.indexed = 1,\n" + "> +\t.differential = 1,\n" + "> +\t.info_mask_separate = BIT(IIO_CHAN_INFO_RAW) |\n" "> +\t\tBIT(IIO_CHAN_INFO_SCALE) |\n" "> +\t\tBIT(IIO_CHAN_INFO_OFFSET) |\n" "> +\t\tBIT(IIO_CHAN_INFO_SAMP_FREQ) |\n" "> +\t\tBIT(IIO_CHAN_INFO_HARDWAREGAIN),\n" - "> +\t.scan_type =3D {\n" - "> +\t\t.sign =3D 'u',\n" - "> +\t\t.realbits =3D 24,\n" - "> +\t\t.storagebits =3D 32,\n" - "> +\t\t.shift =3D 8,\n" - "> +\t\t.endianness =3D IIO_BE,\n" + "> +\t.scan_type = {\n" + "> +\t\t.sign = 'u',\n" + "> +\t\t.realbits = 24,\n" + "> +\t\t.storagebits = 32,\n" + "> +\t\t.shift = 8,\n" + "> +\t\t.endianness = IIO_BE,\n" "> +\t},\n" "> +};\n" "\n" @@ -294,17 +283,17 @@ "> +\t\t\t struct iio_chan_spec const *chan,\n" "> +\t\t\t int *val, int *val2, long info)\n" "> +{\n" - "> +\tstruct ad7124_state *st =3D iio_priv(indio_dev);\n" + "> +\tstruct ad7124_state *st = iio_priv(indio_dev);\n" "> +\tint idx, ret;\n" "> +\n" "> +\tswitch (info) {\n" "> +\tcase IIO_CHAN_INFO_RAW:\n" - "> +\t\tret =3D ad_sigma_delta_single_conversion(indio_dev, chan, val);\n" + "> +\t\tret = ad_sigma_delta_single_conversion(indio_dev, chan, val);\n" "> +\t\tif (ret < 0)\n" "> +\t\t\treturn ret;\n" "> +\n" "> +\t\t/* After the conversion is performed, disable the channel */\n" - "> +\t\tret =3D ad_sd_write_reg(&st->sd,\n" + "> +\t\tret = ad_sd_write_reg(&st->sd,\n" "> +\t\t\t\t AD7124_CHANNEL(chan->address), 2,\n" "> +\t\t\t\t st->channel_config[chan->address].ain |\n" "> +\t\t\t\t AD7124_CHANNEL_EN(0));\n" @@ -313,41 +302,41 @@ "> +\n" "> +\t\treturn IIO_VAL_INT;\n" "> +\tcase IIO_CHAN_INFO_SCALE:\n" - "> +\t\tidx =3D st->channel_config[chan->address].pga_bits;\n" - "> +\t\t*val =3D st->channel_config[chan->address].vref_mv /\n" + "> +\t\tidx = st->channel_config[chan->address].pga_bits;\n" + "> +\t\t*val = st->channel_config[chan->address].vref_mv /\n" "> +\t\t\tad7124_gain[idx];\n" "\n" "Given the gains are all a power of 2. You 'could' apply them to\n" "*val2 instead? Might give better precision. I haven't checked!\n" "\n" "> +\t\tif (st->channel_config[chan->address].bipolar)\n" - "> +\t\t\t*val2 =3D chan->scan_type.realbits - 1;\n" + "> +\t\t\t*val2 = chan->scan_type.realbits - 1;\n" "> +\t\telse\n" - "> +\t\t\t*val2 =3D chan->scan_type.realbits;\n" + "> +\t\t\t*val2 = chan->scan_type.realbits;\n" "> +\n" "> +\t\treturn IIO_VAL_FRACTIONAL_LOG2;\n" "> +\tcase IIO_CHAN_INFO_OFFSET:\n" "> +\t\tif (st->channel_config[chan->address].bipolar) {\n" - "> +\t\t\t/* Code =3D 2^(n =E2=88=92 1) =C3=97 ((Ain =C3=97 Gain / Vref) + 1) */\n" - "> +\t\t\tidx =3D st->channel_config[chan->address].pga_bits;\n" - "> +\t\t\t*val =3D -(st->channel_config[chan->address].vref_mv /\n" + "> +\t\t\t/* Code = 2^(n \342\210\222 1) \303\227 ((Ain \303\227 Gain / Vref) + 1) */\n" + "> +\t\t\tidx = st->channel_config[chan->address].pga_bits;\n" + "> +\t\t\t*val = -(st->channel_config[chan->address].vref_mv /\n" "> +\t\t\t\t ad7124_gain[idx]);\n" "This one surprised me. Offset is applied before gain and I think this part\n" "is symmetric when bipolar, so I think should just be based on the raw adc\n" "counts as half the full range?\n" "\n" "> +\t\t} else {\n" - "> +\t\t\t*val =3D 0;\n" + "> +\t\t\t*val = 0;\n" "> +\t\t}\n" "> +\n" "> +\t\treturn IIO_VAL_INT;\n" "> +\tcase IIO_CHAN_INFO_SAMP_FREQ:\n" - "> +\t\t*val =3D st->channel_config[chan->address].odr;\n" + "> +\t\t*val = st->channel_config[chan->address].odr;\n" "> +\n" "> +\t\treturn IIO_VAL_INT;\n" "> +\tcase IIO_CHAN_INFO_HARDWAREGAIN:\n" - "> +\t\tidx =3D st->channel_config[chan->address].pga_bits;\n" - "> +\t\t*val =3D ad7124_gain[idx];\n" + "> +\t\tidx = st->channel_config[chan->address].pga_bits;\n" + "> +\t\t*val = ad7124_gain[idx];\n" "Hmm. Normally hardwaregain is reserved for those cases where scale\n" "doesn't work. Scale is definitely the preferred option and it'll\n" "take a pretty persuasive argument to convince me otherwise.\n" @@ -366,4 +355,4 @@ "\n" ... -534d538a5a8abbde1b0f831892bd7f3d16beac51adecbd720c1bc2a08643ab6a +5b612a169b2a4482d717d636c7e1b4dcb3a5dd7754cbb2df788a533a23203a80
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