From: Christoph Hellwig <hch@lst.de>
To: "Maciej W. Rozycki" <macro@linux-mips.org>
Cc: Ralf Baechle <ralf@linux-mips.org>,
Paul Burton <paul.burton@mips.com>,
Christoph Hellwig <hch@lst.de>,
linux-mips@linux-mips.org, linux-kernel@vger.kernel.org
Subject: Re: [PATCH v3 1/3] MIPS: SiByte: Set 32-bit bus mask for BCM1250 PCI
Date: Wed, 14 Nov 2018 16:37:06 +0100 [thread overview]
Message-ID: <20181114153706.GA28823@lst.de> (raw)
In-Reply-To: <alpine.LFD.2.21.1811132035050.9637@eddie.linux-mips.org>
Looks fine,
Reviewed-by: Christoph Hellwig <hch@lst.de>
next prev parent reply other threads:[~2018-11-14 15:37 UTC|newest]
Thread overview: 10+ messages / expand[flat|nested] mbox.gz Atom feed top
2018-11-13 22:42 [PATCH v3 0/3] MIPS: SiByte: Handle PCI DMA with 64-bit memory addressing Maciej W. Rozycki
2018-11-13 22:42 ` [PATCH v3 1/3] MIPS: SiByte: Set 32-bit bus mask for BCM1250 PCI Maciej W. Rozycki
2018-11-14 15:37 ` Christoph Hellwig [this message]
2018-11-13 22:42 ` [PATCH v3 2/3] MIPS: SiByte: Enable ZONE_DMA32 for LittleSur Maciej W. Rozycki
2018-11-14 15:37 ` Christoph Hellwig
2018-11-13 22:42 ` [PATCH v3 3/3] MIPS: SiByte: Enable swiotlb for SWARM, LittleSur and BigSur Maciej W. Rozycki
2018-11-14 15:38 ` Christoph Hellwig
2018-11-15 23:56 ` [PATCH v4 " Maciej W. Rozycki
2018-11-19 19:06 ` [PATCH v3 0/3] MIPS: SiByte: Handle PCI DMA with 64-bit memory addressing Paul Burton
2018-11-19 19:06 ` Paul Burton
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