From mboxrd@z Thu Jan 1 00:00:00 1970 From: Matthias Kaehlcke Subject: Re: [PATCH 2/2] drm/msm/dsi: Get PHY ref clock from the DT Date: Wed, 14 Nov 2018 13:08:56 -0800 Message-ID: <20181114210856.GK22824@google.com> References: <20181102214534.184593-1-mka@chromium.org> <20181102214534.184593-2-mka@chromium.org> <20181105173304.GJ154160@art_vandelay> Mime-Version: 1.0 Content-Type: text/plain; charset="utf-8" Content-Transfer-Encoding: base64 Return-path: Content-Disposition: inline In-Reply-To: <20181105173304.GJ154160@art_vandelay> List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: freedreno-bounces-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org Sender: "Freedreno" To: Sean Paul Cc: Mark Rutland , devicetree-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Archit Taneja , Rajesh Yadav , David Airlie , linux-arm-msm-u79uwXL29TY76Z2rM5mHXA@public.gmane.org, Douglas Anderson , dri-devel-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, Stephen Boyd , Rob Clark , Rob Herring , Sean Paul , freedreno-PD4FTy7X32lNgt0PjOBp9y5qC8QIuHrW@public.gmane.org, linux-kernel-u79uwXL29TY76Z2rM5mHXA@public.gmane.org List-Id: linux-arm-msm@vger.kernel.org T24gTW9uLCBOb3YgMDUsIDIwMTggYXQgMTI6MzM6MDRQTSAtMDUwMCwgU2VhbiBQYXVsIHdyb3Rl Ogo+IE9uIEZyaSwgTm92IDAyLCAyMDE4IGF0IDAyOjQ1OjM0UE0gLTA3MDAsIE1hdHRoaWFzIEth ZWhsY2tlIHdyb3RlOgo+ID4gR2V0IHRoZSBQSFkgcmVmIGNsb2NrIGZyb20gdGhlIGRldmljZSB0 cmVlIGluc3RlYWQgb2YgaGFyZGNvZGluZwo+ID4gaXRzIG5hbWUgYW5kIHJhdGUuCj4gPiAKPiA+ IFNpZ25lZC1vZmYtYnk6IE1hdHRoaWFzIEthZWhsY2tlIDxta2FAY2hyb21pdW0ub3JnPgo+ID4g LS0tCj4gPiAgZHJpdmVycy9ncHUvZHJtL21zbS9kc2kvcGxsL2RzaV9wbGxfMTBubS5jIHwgMTEg KysrKysrKysrKy0KPiA+ICAxIGZpbGUgY2hhbmdlZCwgMTAgaW5zZXJ0aW9ucygrKSwgMSBkZWxl dGlvbigtKQo+ID4gCj4gPiBkaWZmIC0tZ2l0IGEvZHJpdmVycy9ncHUvZHJtL21zbS9kc2kvcGxs L2RzaV9wbGxfMTBubS5jIGIvZHJpdmVycy9ncHUvZHJtL21zbS9kc2kvcGxsL2RzaV9wbGxfMTBu bS5jCj4gPiBpbmRleCA0YzAzZjBiNzM0M2VkLi4xMDE2ZWI1MGRmOGY1IDEwMDY0NAo+ID4gLS0t IGEvZHJpdmVycy9ncHUvZHJtL21zbS9kc2kvcGxsL2RzaV9wbGxfMTBubS5jCj4gPiArKysgYi9k cml2ZXJzL2dwdS9kcm0vbXNtL2RzaS9wbGwvZHNpX3BsbF8xMG5tLmMKPiA+IEBAIC05MSw2ICs5 MSw4IEBAIHN0cnVjdCBkc2lfcGxsXzEwbm0gewo+ID4gIAl2b2lkIF9faW9tZW0gKnBoeV9jbW5f bW1pbzsKPiA+ICAJdm9pZCBfX2lvbWVtICptbWlvOwo+ID4gIAo+ID4gKwlzdHJ1Y3QgY2xrICp2 Y29fcmVmX2NsazsKPiA+ICsKPiA+ICAJdTY0IHZjb19yZWZfY2xrX3JhdGU7Cj4gPiAgCXU2NCB2 Y29fY3VycmVudF9yYXRlOwo+ID4gIAo+ID4gQEAgLTYzMCw3ICs2MzIsOCBAQCBzdGF0aWMgaW50 IHBsbF8xMG5tX3JlZ2lzdGVyKHN0cnVjdCBkc2lfcGxsXzEwbm0gKnBsbF8xMG5tKQo+ID4gIAlj aGFyIGNsa19uYW1lWzMyXSwgcGFyZW50WzMyXSwgdmNvX25hbWVbMzJdOwo+ID4gIAljaGFyIHBh cmVudDJbMzJdLCBwYXJlbnQzWzMyXSwgcGFyZW50NFszMl07Cj4gPiAgCXN0cnVjdCBjbGtfaW5p dF9kYXRhIHZjb19pbml0ID0gewo+ID4gLQkJLnBhcmVudF9uYW1lcyA9IChjb25zdCBjaGFyICpb XSl7ICJ4byIgfSwKPiA+ICsJCS5wYXJlbnRfbmFtZXMgPSAoY29uc3QgY2hhciAqW10pewo+ID4g KwkJCV9fY2xrX2dldF9uYW1lKHBsbF8xMG5tLT52Y29fcmVmX2NsaykgfSwKPiA+ICAJCS5udW1f cGFyZW50cyA9IDEsCj4gCj4gWW91IHNob3VsZCBjaGVjayB0aGUgcmV0dXJuIG9mIF9fY2xrX2dl dF9uYW1lKCkgc2luY2UgeW91J3JlIHNldHRpbmcgbnVtX3BhcmVudHMKPiB0byAxLgoKSXMgdGhh dCBhY3R1YWxseSBuZWVkZWQ/IF9fY2xrX2dldF9uYW1lKCkgb25seSByZXR1cm5zIE5VTEwgaWYg dGhlCnBhc3NlZCBjbG9jayBpcyBOVUxMLCBhbmQgdGhpcyBjYW4ndCBoYXBwZW4gaGVyZSBzaW5j ZSBfaW5pdCgpIGZhaWxzCmlmIHRoZSBjbG9jayBjYW4ndCBiZSBvYnRhaW5lZCwgb3IgYW0gSSBt aXNzaW5nIHNvbWV0aGluZyBoZXJlPwoKPiBBbHNvLCB5b3Ugc2hvdWxkIHJldmVydCB0aGUgcGF0 Y2ggdGhhdCBoYXJkY29kZXMgMTkuMk1IeiBhcyBwYXJ0IG9mIHRoaXMKPiBzZXQuCgpPb29wcywg dGhpcyBzb21laG93IGdvdCBkcm9wcGVkIHdoZW4gbW92aW5nIHRoZSBwYXRjaCBmcm9tIG15IHdv cmtpbmcKdHJlZSB0byB0aGUgcmVwbyBJIHVzZSBmb3IgdXBzdHJlYW1pbmcuCgo+ID4gIAkJLm5h bWUgPSB2Y29fbmFtZSwKPiA+ICAJCS5mbGFncyA9IENMS19JR05PUkVfVU5VU0VELAo+ID4gQEAg LTc4Niw2ICs3ODksMTIgQEAgc3RydWN0IG1zbV9kc2lfcGxsICptc21fZHNpX3BsbF8xMG5tX2lu aXQoc3RydWN0IHBsYXRmb3JtX2RldmljZSAqcGRldiwgaW50IGlkKQo+ID4gIAlwbGxfMTBubS0+ aWQgPSBpZDsKPiA+ICAJcGxsXzEwbm1fbGlzdFtpZF0gPSBwbGxfMTBubTsKPiA+ICAKPiA+ICsJ cGxsXzEwbm0tPnZjb19yZWZfY2xrID0gZGV2bV9jbGtfZ2V0KCZwZGV2LT5kZXYsICJyZWYiKTsK PiA+ICsJaWYgKElTX0VSUihwbGxfMTBubS0+dmNvX3JlZl9jbGspKSB7Cj4gPiArCQlkZXZfZXJy KCZwZGV2LT5kZXYsICJjb3VsZG4ndCBnZXQgJ3JlZicgY2xvY2tcbiIpOwo+IAo+IFBsZWFzZSBw cmludCB0aGUgZXJyb3IgbWVzc2FnZQoKT2ssIGV4Y2VwdCBmb3IgLUVQUk9CRV9ERUZFUiBhcyBw ZXIgU3RlcGhlbidzIGNvbW1lbnQuCgo+ID4gKwkJcmV0dXJuICh2b2lkICopcGxsXzEwbm0tPnZj b19yZWZfY2xrOwo+IAo+IFVzZSBFUlJfQ0FTVCBoZXJlCgpXaWxsIGRvCgpDaGVlcnMKCk1hdHRo aWFzCl9fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fX19fCkZyZWVk cmVubyBtYWlsaW5nIGxpc3QKRnJlZWRyZW5vQGxpc3RzLmZyZWVkZXNrdG9wLm9yZwpodHRwczov L2xpc3RzLmZyZWVkZXNrdG9wLm9yZy9tYWlsbWFuL2xpc3RpbmZvL2ZyZWVkcmVubwo= From mboxrd@z Thu Jan 1 00:00:00 1970 Return-Path: X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on aws-us-west-2-korg-lkml-1.web.codeaurora.org X-Spam-Level: X-Spam-Status: No, score=-9.2 required=3.0 tests=DKIMWL_WL_HIGH,DKIM_SIGNED, DKIM_VALID,DKIM_VALID_AU,HEADER_FROM_DIFFERENT_DOMAINS,INCLUDES_PATCH, MAILING_LIST_MULTI,SIGNED_OFF_BY,SPF_PASS,USER_AGENT_MUTT autolearn=ham autolearn_force=no version=3.4.0 Received: from mail.kernel.org (mail.kernel.org [198.145.29.99]) by smtp.lore.kernel.org (Postfix) with ESMTP id EFAD7C43441 for ; Wed, 14 Nov 2018 21:09:00 +0000 (UTC) Received: from vger.kernel.org (vger.kernel.org [209.132.180.67]) by mail.kernel.org (Postfix) with ESMTP id AEF4B2175B for ; Wed, 14 Nov 2018 21:09:00 +0000 (UTC) Authentication-Results: mail.kernel.org; dkim=pass (1024-bit key) header.d=chromium.org header.i=@chromium.org header.b="Mu2d72Bv" DMARC-Filter: OpenDMARC Filter v1.3.2 mail.kernel.org AEF4B2175B Authentication-Results: mail.kernel.org; dmarc=fail (p=none dis=none) header.from=chromium.org Authentication-Results: mail.kernel.org; spf=none smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1728223AbeKOHNt (ORCPT ); Thu, 15 Nov 2018 02:13:49 -0500 Received: from mail-pl1-f193.google.com ([209.85.214.193]:41862 "EHLO mail-pl1-f193.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1725756AbeKOHNs (ORCPT ); Thu, 15 Nov 2018 02:13:48 -0500 Received: by mail-pl1-f193.google.com with SMTP id p16-v6so8353170plr.8 for ; Wed, 14 Nov 2018 13:08:58 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=chromium.org; s=google; h=date:from:to:cc:subject:message-id:references:mime-version :content-disposition:in-reply-to:user-agent; bh=hhATIM5ddoaIRg5Yx2uWaB9QBa3qEhdoYToowwuZbBQ=; b=Mu2d72Bvcdw5uYffN3WnUAZuS6Fdg5tz+fQv2/959rAN9WT2uNi1T1Dg7p+imzNosy +XWo4k10dHnHoki2hxVzJBSc5MDjadt9zW5rUB/Yj1ocIYKUZlnOxeABVcZ9oQjTfXdu gFseBCfNoJ/yVWaXDLxv7Q7QxRZ/BdQ3Rc34s= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:date:from:to:cc:subject:message-id:references :mime-version:content-disposition:in-reply-to:user-agent; bh=hhATIM5ddoaIRg5Yx2uWaB9QBa3qEhdoYToowwuZbBQ=; b=Qg4bRb7MqTMm6F4nY1sK5Hfpt81qqIRlV9OQXNrAi3nQb6mcIHorFR57LXNZ+X8iD7 b3/QTaGmFHUPTrScMn6Gq+txRjx/O980qZrDPWkkq++tWBE104cOD0R5T2yHTf55U3Rs +c1V3BVX+FRPX2dXThiIs6tmmj0Ap5V6uWzAvzwi4kelI16w4OakZ9kNOZGdbKkLrril 563SGWiFPTw5qAHjraDbc7roSftmtzEF7o8PAzuUMK++YivEMl5ROnTEDwrNuK+1HgTM xLVc/4CRJdoBpnFs2TmMgv6t/5Hf5kfYUMpTPqhGzxD/Awk6edou/3X7FdWzysAq8yMf k1kw== X-Gm-Message-State: AGRZ1gJPovChhHTCh7e/HKvD9imiFp3C0m+C+g4it/r32s9kuVsRu0yU Nn6R0UseegRe/JZZU//Gepeiww== X-Google-Smtp-Source: AJdET5fsYhv02r+pmTyedA1XasgmKnyU5mbW2/qVMHb/Tp2rRPe40NsLQAQrG+QLTq7kl/OQWOYbMg== X-Received: by 2002:a17:902:8d83:: with SMTP id v3-v6mr3497412plo.162.1542229738013; Wed, 14 Nov 2018 13:08:58 -0800 (PST) Received: from localhost ([2620:15c:202:1:b6af:f85:ed6c:ac6a]) by smtp.gmail.com with ESMTPSA id a73sm9250299pfa.7.2018.11.14.13.08.57 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Wed, 14 Nov 2018 13:08:57 -0800 (PST) Date: Wed, 14 Nov 2018 13:08:56 -0800 From: Matthias Kaehlcke To: Sean Paul Cc: Rob Clark , David Airlie , Rob Herring , Mark Rutland , devicetree@vger.kernel.org, Archit Taneja , Rajesh Yadav , linux-arm-msm@vger.kernel.org, Douglas Anderson , dri-devel@lists.freedesktop.org, Stephen Boyd , Sean Paul , freedreno@lists.freedesktop.org, linux-kernel@vger.kernel.org Subject: Re: [Freedreno] [PATCH 2/2] drm/msm/dsi: Get PHY ref clock from the DT Message-ID: <20181114210856.GK22824@google.com> References: <20181102214534.184593-1-mka@chromium.org> <20181102214534.184593-2-mka@chromium.org> <20181105173304.GJ154160@art_vandelay> MIME-Version: 1.0 Content-Type: text/plain; charset=utf-8 Content-Disposition: inline In-Reply-To: <20181105173304.GJ154160@art_vandelay> User-Agent: Mutt/1.9.2 (2017-12-15) Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org On Mon, Nov 05, 2018 at 12:33:04PM -0500, Sean Paul wrote: > On Fri, Nov 02, 2018 at 02:45:34PM -0700, Matthias Kaehlcke wrote: > > Get the PHY ref clock from the device tree instead of hardcoding > > its name and rate. > > > > Signed-off-by: Matthias Kaehlcke > > --- > > drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c | 11 ++++++++++- > > 1 file changed, 10 insertions(+), 1 deletion(-) > > > > diff --git a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c > > index 4c03f0b7343ed..1016eb50df8f5 100644 > > --- a/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c > > +++ b/drivers/gpu/drm/msm/dsi/pll/dsi_pll_10nm.c > > @@ -91,6 +91,8 @@ struct dsi_pll_10nm { > > void __iomem *phy_cmn_mmio; > > void __iomem *mmio; > > > > + struct clk *vco_ref_clk; > > + > > u64 vco_ref_clk_rate; > > u64 vco_current_rate; > > > > @@ -630,7 +632,8 @@ static int pll_10nm_register(struct dsi_pll_10nm *pll_10nm) > > char clk_name[32], parent[32], vco_name[32]; > > char parent2[32], parent3[32], parent4[32]; > > struct clk_init_data vco_init = { > > - .parent_names = (const char *[]){ "xo" }, > > + .parent_names = (const char *[]){ > > + __clk_get_name(pll_10nm->vco_ref_clk) }, > > .num_parents = 1, > > You should check the return of __clk_get_name() since you're setting num_parents > to 1. Is that actually needed? __clk_get_name() only returns NULL if the passed clock is NULL, and this can't happen here since _init() fails if the clock can't be obtained, or am I missing something here? > Also, you should revert the patch that hardcodes 19.2MHz as part of this > set. Ooops, this somehow got dropped when moving the patch from my working tree to the repo I use for upstreaming. > > .name = vco_name, > > .flags = CLK_IGNORE_UNUSED, > > @@ -786,6 +789,12 @@ struct msm_dsi_pll *msm_dsi_pll_10nm_init(struct platform_device *pdev, int id) > > pll_10nm->id = id; > > pll_10nm_list[id] = pll_10nm; > > > > + pll_10nm->vco_ref_clk = devm_clk_get(&pdev->dev, "ref"); > > + if (IS_ERR(pll_10nm->vco_ref_clk)) { > > + dev_err(&pdev->dev, "couldn't get 'ref' clock\n"); > > Please print the error message Ok, except for -EPROBE_DEFER as per Stephen's comment. > > + return (void *)pll_10nm->vco_ref_clk; > > Use ERR_CAST here Will do Cheers Matthias