All of lore.kernel.org
 help / color / mirror / Atom feed
diff for duplicates of <20181117231047.GA2225@minitux>

diff --git a/a/1.txt b/N1/1.txt
index 42c6883..775edc5 100644
--- a/a/1.txt
+++ b/N1/1.txt
@@ -47,7 +47,7 @@ Bjorn
 > +		#address-cells = <1>;
 > +		#size-cells = <0>;
 > +
-> +		CPU0: cpu@100 {
+> +		CPU0: cpu at 100 {
 > +			device_type = "cpu";
 > +			compatible = "arm,cortex-a53";
 > +			reg = <0x100>;
@@ -55,7 +55,7 @@ Bjorn
 > +			next-level-cache = <&L2_0>;
 > +		};
 > +
-> +		CPU1: cpu@101 {
+> +		CPU1: cpu at 101 {
 > +			device_type = "cpu";
 > +			compatible = "arm,cortex-a53";
 > +			reg = <0x101>;
@@ -63,7 +63,7 @@ Bjorn
 > +			next-level-cache = <&L2_0>;
 > +		};
 > +
-> +		CPU2: cpu@102 {
+> +		CPU2: cpu at 102 {
 > +			device_type = "cpu";
 > +			compatible = "arm,cortex-a53";
 > +			reg = <0x102>;
@@ -71,7 +71,7 @@ Bjorn
 > +			next-level-cache = <&L2_0>;
 > +		};
 > +
-> +		CPU3: cpu@103 {
+> +		CPU3: cpu at 103 {
 > +			device_type = "cpu";
 > +			compatible = "arm,cortex-a53";
 > +			reg = <0x103>;
@@ -85,7 +85,7 @@ Bjorn
 > +		};
 > +	};
 > +
-> +	memory@80000000 {
+> +	memory at 80000000 {
 > +		device_type = "memory";
 > +		/* We expect the bootloader to fill in the size */
 > +		reg = <0 0x80000000 0 0>;
@@ -96,13 +96,13 @@ Bjorn
 > +		method = "smc";
 > +	};
 > +
-> +	soc: soc@0 {
+> +	soc: soc at 0 {
 > +		#address-cells = <1>;
 > +		#size-cells = <1>;
 > +		ranges = <0 0 0 0xffffffff>;
 > +		compatible = "simple-bus";
 > +
-> +		gcc: clock-controller@1800000 {
+> +		gcc: clock-controller at 1800000 {
 > +			compatible = "qcom,gcc-qcs404";
 > +			reg = <0x01800000 0x80000>;
 > +			#clock-cells = <1>;
@@ -111,7 +111,7 @@ Bjorn
 > +			assigned-clock-rates = <19200000>;
 > +		};
 > +
-> +		blsp1_uart2: serial@78b1000 {
+> +		blsp1_uart2: serial at 78b1000 {
 > +			compatible = "qcom,msm-uartdm-v1.4", "qcom,msm-uartdm";
 > +			reg = <0x078b1000 0x200>;
 > +			interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
@@ -120,7 +120,7 @@ Bjorn
 > +			status = "okay";
 > +		};
 > +
-> +		intc: interrupt-controller@b000000 {
+> +		intc: interrupt-controller at b000000 {
 > +			compatible = "qcom,msm-qgic2";
 > +			interrupt-controller;
 > +			#interrupt-cells = <3>;
@@ -128,7 +128,7 @@ Bjorn
 > +			      <0x0b002000 0x1000>;
 > +		};
 > +
-> +		timer@b120000 {
+> +		timer at b120000 {
 > +			#address-cells = <1>;
 > +			#size-cells = <1>;
 > +			ranges;
@@ -136,7 +136,7 @@ Bjorn
 > +			reg = <0x0b120000 0x1000>;
 > +			clock-frequency = <19200000>;
 > +
-> +			frame@b121000 {
+> +			frame at b121000 {
 > +				frame-number = <0>;
 > +				interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,
 > +					     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
@@ -144,42 +144,42 @@ Bjorn
 > +				      <0x0b122000 0x1000>;
 > +			};
 > +
-> +			frame@b123000 {
+> +			frame at b123000 {
 > +				frame-number = <1>;
 > +				interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 > +				reg = <0x0b123000 0x1000>;
 > +				status = "disabled";
 > +			};
 > +
-> +			frame@b124000 {
+> +			frame at b124000 {
 > +				frame-number = <2>;
 > +				interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 > +				reg = <0x0b124000 0x1000>;
 > +				status = "disabled";
 > +			};
 > +
-> +			frame@b125000 {
+> +			frame at b125000 {
 > +				frame-number = <3>;
 > +				interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 > +				reg = <0x0b125000 0x1000>;
 > +				status = "disabled";
 > +			};
 > +
-> +			frame@b126000 {
+> +			frame at b126000 {
 > +				frame-number = <4>;
 > +				interrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;
 > +				reg = <0x0b126000 0x1000>;
 > +				status = "disabled";
 > +			};
 > +
-> +			frame@b127000 {
+> +			frame at b127000 {
 > +				frame-number = <5>;
 > +				interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
 > +				reg = <0xb127000 0x1000>;
 > +				status = "disabled";
 > +			};
 > +
-> +			frame@b128000 {
+> +			frame at b128000 {
 > +				frame-number = <6>;
 > +				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
 > +				reg = <0x0b128000 0x1000>;
diff --git a/a/content_digest b/N1/content_digest
index a5d8601..a7ccce5 100644
--- a/a/content_digest
+++ b/N1/content_digest
@@ -1,13 +1,9 @@
  "ref\020181109094417.12109-1-vkoul@kernel.org\0"
  "ref\020181109094417.12109-2-vkoul@kernel.org\0"
- "From\0Bjorn Andersson <bjorn.andersson@linaro.org>\0"
- "Subject\0Re: [PATCH v5 01/18] arm64: dts: qcom: qcs404: add base dts files\0"
+ "From\0bjorn.andersson@linaro.org (Bjorn Andersson)\0"
+ "Subject\0[PATCH v5 01/18] arm64: dts: qcom: qcs404: add base dts files\0"
  "Date\0Sat, 17 Nov 2018 15:10:47 -0800\0"
- "To\0Vinod Koul <vkoul@kernel.org>\0"
- "Cc\0Andy Gross <andy.gross@linaro.org>"
-  linux-arm-kernel@lists.infradead.org
-  linux-kernel@vger.kernel.org
- " linux-arm-msm@vger.kernel.org\0"
+ "To\0linux-arm-kernel@lists.infradead.org\0"
  "\00:1\0"
  "b\0"
  "On Fri 09 Nov 01:44 PST 2018, Vinod Koul wrote:\n"
@@ -59,7 +55,7 @@
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <0>;\n"
  "> +\n"
- "> +\t\tCPU0: cpu@100 {\n"
+ "> +\t\tCPU0: cpu at 100 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"arm,cortex-a53\";\n"
  "> +\t\t\treg = <0x100>;\n"
@@ -67,7 +63,7 @@
  "> +\t\t\tnext-level-cache = <&L2_0>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tCPU1: cpu@101 {\n"
+ "> +\t\tCPU1: cpu at 101 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"arm,cortex-a53\";\n"
  "> +\t\t\treg = <0x101>;\n"
@@ -75,7 +71,7 @@
  "> +\t\t\tnext-level-cache = <&L2_0>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tCPU2: cpu@102 {\n"
+ "> +\t\tCPU2: cpu at 102 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"arm,cortex-a53\";\n"
  "> +\t\t\treg = <0x102>;\n"
@@ -83,7 +79,7 @@
  "> +\t\t\tnext-level-cache = <&L2_0>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tCPU3: cpu@103 {\n"
+ "> +\t\tCPU3: cpu at 103 {\n"
  "> +\t\t\tdevice_type = \"cpu\";\n"
  "> +\t\t\tcompatible = \"arm,cortex-a53\";\n"
  "> +\t\t\treg = <0x103>;\n"
@@ -97,7 +93,7 @@
  "> +\t\t};\n"
  "> +\t};\n"
  "> +\n"
- "> +\tmemory@80000000 {\n"
+ "> +\tmemory at 80000000 {\n"
  "> +\t\tdevice_type = \"memory\";\n"
  "> +\t\t/* We expect the bootloader to fill in the size */\n"
  "> +\t\treg = <0 0x80000000 0 0>;\n"
@@ -108,13 +104,13 @@
  "> +\t\tmethod = \"smc\";\n"
  "> +\t};\n"
  "> +\n"
- "> +\tsoc: soc@0 {\n"
+ "> +\tsoc: soc at 0 {\n"
  "> +\t\t#address-cells = <1>;\n"
  "> +\t\t#size-cells = <1>;\n"
  "> +\t\tranges = <0 0 0 0xffffffff>;\n"
  "> +\t\tcompatible = \"simple-bus\";\n"
  "> +\n"
- "> +\t\tgcc: clock-controller@1800000 {\n"
+ "> +\t\tgcc: clock-controller at 1800000 {\n"
  "> +\t\t\tcompatible = \"qcom,gcc-qcs404\";\n"
  "> +\t\t\treg = <0x01800000 0x80000>;\n"
  "> +\t\t\t#clock-cells = <1>;\n"
@@ -123,7 +119,7 @@
  "> +\t\t\tassigned-clock-rates = <19200000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tblsp1_uart2: serial@78b1000 {\n"
+ "> +\t\tblsp1_uart2: serial at 78b1000 {\n"
  "> +\t\t\tcompatible = \"qcom,msm-uartdm-v1.4\", \"qcom,msm-uartdm\";\n"
  "> +\t\t\treg = <0x078b1000 0x200>;\n"
  "> +\t\t\tinterrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -132,7 +128,7 @@
  "> +\t\t\tstatus = \"okay\";\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\tintc: interrupt-controller@b000000 {\n"
+ "> +\t\tintc: interrupt-controller at b000000 {\n"
  "> +\t\t\tcompatible = \"qcom,msm-qgic2\";\n"
  "> +\t\t\tinterrupt-controller;\n"
  "> +\t\t\t#interrupt-cells = <3>;\n"
@@ -140,7 +136,7 @@
  "> +\t\t\t      <0x0b002000 0x1000>;\n"
  "> +\t\t};\n"
  "> +\n"
- "> +\t\ttimer@b120000 {\n"
+ "> +\t\ttimer at b120000 {\n"
  "> +\t\t\t#address-cells = <1>;\n"
  "> +\t\t\t#size-cells = <1>;\n"
  "> +\t\t\tranges;\n"
@@ -148,7 +144,7 @@
  "> +\t\t\treg = <0x0b120000 0x1000>;\n"
  "> +\t\t\tclock-frequency = <19200000>;\n"
  "> +\n"
- "> +\t\t\tframe@b121000 {\n"
+ "> +\t\t\tframe at b121000 {\n"
  "> +\t\t\t\tframe-number = <0>;\n"
  "> +\t\t\t\tinterrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>,\n"
  "> +\t\t\t\t\t     <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;\n"
@@ -156,42 +152,42 @@
  "> +\t\t\t\t      <0x0b122000 0x1000>;\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tframe@b123000 {\n"
+ "> +\t\t\tframe at b123000 {\n"
  "> +\t\t\t\tframe-number = <1>;\n"
  "> +\t\t\t\tinterrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t\treg = <0x0b123000 0x1000>;\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tframe@b124000 {\n"
+ "> +\t\t\tframe at b124000 {\n"
  "> +\t\t\t\tframe-number = <2>;\n"
  "> +\t\t\t\tinterrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t\treg = <0x0b124000 0x1000>;\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tframe@b125000 {\n"
+ "> +\t\t\tframe at b125000 {\n"
  "> +\t\t\t\tframe-number = <3>;\n"
  "> +\t\t\t\tinterrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t\treg = <0x0b125000 0x1000>;\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tframe@b126000 {\n"
+ "> +\t\t\tframe at b126000 {\n"
  "> +\t\t\t\tframe-number = <4>;\n"
  "> +\t\t\t\tinterrupts = <GIC_SPI 12 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t\treg = <0x0b126000 0x1000>;\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tframe@b127000 {\n"
+ "> +\t\t\tframe at b127000 {\n"
  "> +\t\t\t\tframe-number = <5>;\n"
  "> +\t\t\t\tinterrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t\treg = <0xb127000 0x1000>;\n"
  "> +\t\t\t\tstatus = \"disabled\";\n"
  "> +\t\t\t};\n"
  "> +\n"
- "> +\t\t\tframe@b128000 {\n"
+ "> +\t\t\tframe at b128000 {\n"
  "> +\t\t\t\tframe-number = <6>;\n"
  "> +\t\t\t\tinterrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;\n"
  "> +\t\t\t\treg = <0x0b128000 0x1000>;\n"
@@ -212,4 +208,4 @@
  "> 2.14.4\n"
  >
 
-fcc3954a521f42f741447d20629dbb3dc828e0d17f13f310715412670a201246
+2f7fc50944999ee026601ecca16d4892fe4ee38c18c3313a96fe45cf927a74af

This is an external index of several public inboxes,
see mirroring instructions on how to clone and mirror
all data and code used by this external index.